* mips-tdep.c, remote-mips.c, values.c, mdebugread.c,
config/mips/tm-mips.h: Add/fix bugs for 64-bit mips support. * defs.h: Cleanup; add prototypess * corefile.c: Change FIXME #ifdef * win32-nat.c: Include windefs instead of windows.h. * utils.c: Add routines for printing addresses and registers based on type size.
This commit is contained in:
parent
77814fa882
commit
28444bf3a1
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@ -1,3 +1,14 @@
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Mon Nov 11 12:59:00 1996 Dawn Perchik <dawn@critters.cygnus.com>
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* mips-tdep.c, remote-mips.c, values.c, mdebugread.c,
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config/mips/tm-mips.h: Add/fix bugs for 64-bit mips support.
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* defs.h: Cleanup; add prototypess
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* corefile.c: Change FIXME #ifdef
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* win32-nat.c: Include windefs instead of windows.h.
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* utils.c: Add routines for printing addresses and registers
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based on type size.
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Sat Nov 9 01:05:10 1996 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
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Sat Nov 9 01:05:10 1996 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
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* alpha-tdep.c (heuristic_proc_desc): Stop examining the prologue
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* alpha-tdep.c (heuristic_proc_desc): Stop examining the prologue
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@ -305,7 +305,7 @@ extern CORE_ADDR mips_frame_chain PARAMS ((struct frame_info *));
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/* Saved Pc. */
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/* Saved Pc. */
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#define FRAME_SAVED_PC(FRAME) (mips_frame_saved_pc(FRAME))
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#define FRAME_SAVED_PC(FRAME) (mips_frame_saved_pc(FRAME))
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extern int mips_frame_saved_pc PARAMS ((struct frame_info *));
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extern CORE_ADDR mips_frame_saved_pc PARAMS ((struct frame_info *));
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#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
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#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
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@ -479,6 +479,7 @@ extern void ecoff_relocate_efi PARAMS ((struct symbol *, CORE_ADDR));
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typedef struct mips_extra_func_info {
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typedef struct mips_extra_func_info {
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long numargs; /* number of args to procedure (was iopt) */
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long numargs; /* number of args to procedure (was iopt) */
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bfd_vma high_addr; /* upper address bound */
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PDR pdr; /* Procedure descriptor record */
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PDR pdr; /* Procedure descriptor record */
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} *mips_extra_func_info_t;
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} *mips_extra_func_info_t;
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@ -543,6 +544,8 @@ extern void fixup_sigtramp PARAMS ((void));
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/* Defined in mips-tdep.c and used in remote-mips.c */
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/* Defined in mips-tdep.c and used in remote-mips.c */
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extern char *mips_read_processor_type PARAMS ((void));
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extern char *mips_read_processor_type PARAMS ((void));
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#ifndef TARGET_MIPS
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#define TARGET_MIPS
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#define TARGET_MIPS
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#endif
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#endif /* TM_MIPS_H */
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#endif /* TM_MIPS_H */
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@ -137,7 +137,7 @@ specify_exec_file_hook (hook)
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void
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void
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close_exec_file ()
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close_exec_file ()
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{
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{
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#ifdef FIXME
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#if 0 /* FIXME */
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if (exec_bfd)
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if (exec_bfd)
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bfd_tempclose (exec_bfd);
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bfd_tempclose (exec_bfd);
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#endif
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#endif
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@ -146,7 +146,7 @@ close_exec_file ()
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void
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void
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reopen_exec_file ()
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reopen_exec_file ()
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{
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{
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#ifdef FIXME
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#if 0 /* FIXME */
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if (exec_bfd)
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if (exec_bfd)
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bfd_reopen (exec_bfd);
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bfd_reopen (exec_bfd);
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#endif
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#endif
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37
gdb/defs.h
37
gdb/defs.h
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@ -67,8 +67,12 @@ extern char *strsignal PARAMS ((int));
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typedef bfd_vma CORE_ADDR;
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typedef bfd_vma CORE_ADDR;
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#ifndef min
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#define min(a, b) ((a) < (b) ? (a) : (b))
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#define min(a, b) ((a) < (b) ? (a) : (b))
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#endif
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#ifndef max
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#define max(a, b) ((a) > (b) ? (a) : (b))
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#define max(a, b) ((a) > (b) ? (a) : (b))
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#endif
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/* Gdb does *lots* of string compares. Use macros to speed them up by
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/* Gdb does *lots* of string compares. Use macros to speed them up by
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avoiding function calls if the first characters are not the same. */
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avoiding function calls if the first characters are not the same. */
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@ -90,11 +94,17 @@ extern int sevenbit_strings;
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extern void quit PARAMS ((void));
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extern void quit PARAMS ((void));
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#ifdef QUIT
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/* do twice to force compiler warning */
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#define FIXME "FIXME"
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#define FIXME "ignoring redefinition of QUIT"
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#else
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#define QUIT { \
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#define QUIT { \
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if (quit_flag) quit (); \
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if (quit_flag) quit (); \
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if (interactive_hook) interactive_hook (); \
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if (interactive_hook) interactive_hook (); \
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PROGRESS (1); \
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PROGRESS (1); \
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}
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}
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#endif
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/* Command classes are top-level categories into which commands are broken
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/* Command classes are top-level categories into which commands are broken
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down for "help" purposes.
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down for "help" purposes.
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@ -207,10 +217,6 @@ extern char *chill_demangle PARAMS ((const char *));
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/* From utils.c */
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/* From utils.c */
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extern PTR xmalloc PARAMS ((long));
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extern PTR xrealloc PARAMS ((PTR, long));
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extern void notice_quit PARAMS ((void));
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extern void notice_quit PARAMS ((void));
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extern int strcmp_iw PARAMS ((const char *, const char *));
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extern int strcmp_iw PARAMS ((const char *, const char *));
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@ -330,6 +336,12 @@ extern void gdb_printchar PARAMS ((int, GDB_FILE *, int));
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extern void gdb_print_address PARAMS ((void *, GDB_FILE *));
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extern void gdb_print_address PARAMS ((void *, GDB_FILE *));
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typedef bfd_vma t_addr;
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typedef bfd_vma t_reg;
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extern char* paddr PARAMS ((t_addr addr));
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extern char* preg PARAMS ((t_reg reg));
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extern void fprintf_symbol_filtered PARAMS ((GDB_FILE *, char *,
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extern void fprintf_symbol_filtered PARAMS ((GDB_FILE *, char *,
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enum language, int));
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enum language, int));
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@ -559,9 +571,15 @@ extern char *strsave PARAMS ((const char *));
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extern char *mstrsave PARAMS ((void *, const char *));
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extern char *mstrsave PARAMS ((void *, const char *));
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#ifdef _WIN32 /* FIXME; was long, but this causes compile errors in msvc if already defined */
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extern PTR xmmalloc PARAMS ((PTR, size_t));
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extern PTR xmrealloc PARAMS ((PTR, PTR, size_t));
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#else
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extern PTR xmmalloc PARAMS ((PTR, long));
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extern PTR xmmalloc PARAMS ((PTR, long));
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extern PTR xmrealloc PARAMS ((PTR, PTR, long));
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extern PTR xmrealloc PARAMS ((PTR, PTR, long));
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#endif
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extern int parse_escape PARAMS ((char **));
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extern int parse_escape PARAMS ((char **));
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@ -627,8 +645,19 @@ extern char *getenv PARAMS ((const char *));
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#endif
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#endif
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#ifdef HAVE_STDLIB_H
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#ifdef HAVE_STDLIB_H
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#if defined(_MSC_VER) && !defined(__cplusplus)
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/* msvc defines these in stdlib.h for c code */
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#undef min
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#undef max
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#endif
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#include <stdlib.h>
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#include <stdlib.h>
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#endif
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#endif
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#ifndef min
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#define min(a, b) ((a) < (b) ? (a) : (b))
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#endif
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#ifndef max
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#define max(a, b) ((a) > (b) ? (a) : (b))
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#endif
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/* We take the address of fclose later, but some stdio's forget
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/* We take the address of fclose later, but some stdio's forget
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333
gdb/mips-tdep.c
333
gdb/mips-tdep.c
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@ -32,18 +32,27 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "symfile.h"
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#include "symfile.h"
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#include "objfiles.h"
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#include "objfiles.h"
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#include "gdbtypes.h"
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#include "gdbtypes.h"
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#include "target.h"
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#include "opcode/mips.h"
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#include "opcode/mips.h"
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#define VM_MIN_ADDRESS (unsigned)0x400000
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#define VM_MIN_ADDRESS (CORE_ADDR)0x400000
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/* FIXME: Put this declaration in frame.h. */
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/* FIXME: Put this declaration in frame.h. */
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extern struct obstack frame_cache_obstack;
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extern struct obstack frame_cache_obstack;
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/* FIXME! this code assumes 4-byte instructions. */
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#define MIPS_INSTLEN 4
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#define MIPS_NUMREGS 32 /* FIXME! how many on 64-bit mips? */
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typedef unsigned long t_inst;
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#if 0
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#if 0
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static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
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static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
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#endif
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#endif
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static int gdb_print_insn_mips PARAMS ((bfd_vma, disassemble_info *));
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static void mips_print_register PARAMS ((int, int));
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static void mips_print_register PARAMS ((int, int));
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static mips_extra_func_info_t
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static mips_extra_func_info_t
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@ -51,7 +60,7 @@ heuristic_proc_desc PARAMS ((CORE_ADDR, CORE_ADDR, struct frame_info *));
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static CORE_ADDR heuristic_proc_start PARAMS ((CORE_ADDR));
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static CORE_ADDR heuristic_proc_start PARAMS ((CORE_ADDR));
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static int read_next_frame_reg PARAMS ((struct frame_info *, int));
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static CORE_ADDR read_next_frame_reg PARAMS ((struct frame_info *, int));
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static void mips_set_fpu_command PARAMS ((char *, int,
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static void mips_set_fpu_command PARAMS ((char *, int,
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struct cmd_list_element *));
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struct cmd_list_element *));
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@ -181,7 +190,7 @@ struct {
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static unsigned int heuristic_fence_post = 0;
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static unsigned int heuristic_fence_post = 0;
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#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
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#define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
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#define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
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#define PROC_HIGH_ADDR(proc) ((proc)->high_addr) /* upper address bound */
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#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
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#define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
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#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
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#define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
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#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
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#define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
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@ -265,23 +274,26 @@ mips_find_saved_regs (fci)
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#ifndef SIGFRAME_BASE
|
#ifndef SIGFRAME_BASE
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/* To satisfy alignment restrictions, sigcontext is located 4 bytes
|
/* To satisfy alignment restrictions, sigcontext is located 4 bytes
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above the sigtramp frame. */
|
above the sigtramp frame. */
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#define SIGFRAME_BASE 4
|
#define SIGFRAME_BASE MIPS_REGSIZE
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#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
|
/* FIXME! Are these correct?? */
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#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
|
#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * MIPS_REGSIZE)
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#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 4 + 3 * 4)
|
#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * MIPS_REGSIZE)
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|
#define SIGFRAME_FPREGSAVE_OFF \
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|
(SIGFRAME_REGSAVE_OFF + MIPS_NUMREGS * MIPS_REGSIZE + 3 * MIPS_REGSIZE)
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#endif
|
#endif
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#ifndef SIGFRAME_REG_SIZE
|
#ifndef SIGFRAME_REG_SIZE
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#define SIGFRAME_REG_SIZE 4
|
/* FIXME! Is this correct?? */
|
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|
#define SIGFRAME_REG_SIZE MIPS_REGSIZE
|
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#endif
|
#endif
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if (fci->signal_handler_caller)
|
if (fci->signal_handler_caller)
|
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{
|
{
|
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for (ireg = 0; ireg < 32; ireg++)
|
for (ireg = 0; ireg < MIPS_NUMREGS; ireg++)
|
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{
|
{
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reg_position = fci->frame + SIGFRAME_REGSAVE_OFF
|
reg_position = fci->frame + SIGFRAME_REGSAVE_OFF
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+ ireg * SIGFRAME_REG_SIZE;
|
+ ireg * SIGFRAME_REG_SIZE;
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fci->saved_regs->regs[ireg] = reg_position;
|
fci->saved_regs->regs[ireg] = reg_position;
|
||||||
}
|
}
|
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for (ireg = 0; ireg < 32; ireg++)
|
for (ireg = 0; ireg < MIPS_NUMREGS; ireg++)
|
||||||
{
|
{
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reg_position = fci->frame + SIGFRAME_FPREGSAVE_OFF
|
reg_position = fci->frame + SIGFRAME_FPREGSAVE_OFF
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+ ireg * SIGFRAME_REG_SIZE;
|
+ ireg * SIGFRAME_REG_SIZE;
|
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|
@ -327,8 +339,8 @@ mips_find_saved_regs (fci)
|
||||||
|
|
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CORE_ADDR addr;
|
CORE_ADDR addr;
|
||||||
int status;
|
int status;
|
||||||
char buf[4];
|
char buf[MIPS_INSTLEN];
|
||||||
unsigned long inst;
|
t_inst inst;
|
||||||
|
|
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/* Bitmasks; set if we have found a save for the register. */
|
/* Bitmasks; set if we have found a save for the register. */
|
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unsigned long gen_save_found = 0;
|
unsigned long gen_save_found = 0;
|
||||||
|
@ -337,12 +349,12 @@ mips_find_saved_regs (fci)
|
||||||
for (addr = PROC_LOW_ADDR (proc_desc);
|
for (addr = PROC_LOW_ADDR (proc_desc);
|
||||||
addr < fci->pc /*&& (gen_mask != gen_save_found
|
addr < fci->pc /*&& (gen_mask != gen_save_found
|
||||||
|| float_mask != float_save_found)*/;
|
|| float_mask != float_save_found)*/;
|
||||||
addr += 4)
|
addr += MIPS_INSTLEN)
|
||||||
{
|
{
|
||||||
status = read_memory_nobpt (addr, buf, 4);
|
status = read_memory_nobpt (addr, buf, MIPS_INSTLEN);
|
||||||
if (status)
|
if (status)
|
||||||
memory_error (status, addr);
|
memory_error (status, addr);
|
||||||
inst = extract_unsigned_integer (buf, 4);
|
inst = extract_unsigned_integer (buf, MIPS_INSTLEN);
|
||||||
if (/* sw reg,n($sp) */
|
if (/* sw reg,n($sp) */
|
||||||
(inst & 0xffe00000) == 0xafa00000
|
(inst & 0xffe00000) == 0xafa00000
|
||||||
|
|
||||||
|
@ -381,7 +393,7 @@ mips_find_saved_regs (fci)
|
||||||
/* Fill in the offsets for the registers which gen_mask says
|
/* Fill in the offsets for the registers which gen_mask says
|
||||||
were saved. */
|
were saved. */
|
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reg_position = fci->frame + PROC_REG_OFFSET (proc_desc);
|
reg_position = fci->frame + PROC_REG_OFFSET (proc_desc);
|
||||||
for (ireg= 31; gen_mask; --ireg, gen_mask <<= 1)
|
for (ireg= MIPS_NUMREGS-1; gen_mask; --ireg, gen_mask <<= 1)
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if (gen_mask & 0x80000000)
|
if (gen_mask & 0x80000000)
|
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{
|
{
|
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fci->saved_regs->regs[ireg] = reg_position;
|
fci->saved_regs->regs[ireg] = reg_position;
|
||||||
|
@ -393,8 +405,14 @@ mips_find_saved_regs (fci)
|
||||||
|
|
||||||
/* The freg_offset points to where the first *double* register
|
/* The freg_offset points to where the first *double* register
|
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is saved. So skip to the high-order word. */
|
is saved. So skip to the high-order word. */
|
||||||
|
if (! GDB_TARGET_IS_MIPS64)
|
||||||
reg_position += 4;
|
reg_position += 4;
|
||||||
for (ireg = 31; float_mask; --ireg, float_mask <<= 1)
|
|
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|
/* FIXME! this code looks scary...
|
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|
* Looks like it's trying to do stuff with a register,
|
||||||
|
* but .... ???
|
||||||
|
*/
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|
for (ireg = MIPS_NUMREGS-1; float_mask; --ireg, float_mask <<= 1)
|
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if (float_mask & 0x80000000)
|
if (float_mask & 0x80000000)
|
||||||
{
|
{
|
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fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
|
fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
|
||||||
|
@ -404,7 +422,7 @@ mips_find_saved_regs (fci)
|
||||||
fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
|
fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
|
||||||
}
|
}
|
||||||
|
|
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static int
|
static CORE_ADDR
|
||||||
read_next_frame_reg(fi, regno)
|
read_next_frame_reg(fi, regno)
|
||||||
struct frame_info *fi;
|
struct frame_info *fi;
|
||||||
int regno;
|
int regno;
|
||||||
|
@ -426,10 +444,11 @@ read_next_frame_reg(fi, regno)
|
||||||
return read_register (regno);
|
return read_register (regno);
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
CORE_ADDR
|
||||||
mips_frame_saved_pc(frame)
|
mips_frame_saved_pc(frame)
|
||||||
struct frame_info *frame;
|
struct frame_info *frame;
|
||||||
{
|
{
|
||||||
|
CORE_ADDR saved_pc;
|
||||||
mips_extra_func_info_t proc_desc = frame->proc_desc;
|
mips_extra_func_info_t proc_desc = frame->proc_desc;
|
||||||
/* We have to get the saved pc from the sigcontext
|
/* We have to get the saved pc from the sigcontext
|
||||||
if it is a signal handler frame. */
|
if it is a signal handler frame. */
|
||||||
|
@ -437,9 +456,22 @@ mips_frame_saved_pc(frame)
|
||||||
: (proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM);
|
: (proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM);
|
||||||
|
|
||||||
if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
|
if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
|
||||||
return read_memory_integer(frame->frame - 4, 4);
|
saved_pc = read_memory_integer(frame->frame - MIPS_REGSIZE, MIPS_REGSIZE);
|
||||||
|
else
|
||||||
|
saved_pc = read_next_frame_reg(frame, pcreg);
|
||||||
|
|
||||||
return read_next_frame_reg(frame, pcreg);
|
if (GDB_TARGET_IS_MIPS64 && strcmp(current_target.to_shortname,"pmon")==0)
|
||||||
|
{
|
||||||
|
/* This hack is a work-around for PMON.
|
||||||
|
* The PMON version in the Vr4300 board has been
|
||||||
|
* compiled without the 64bit register access commands.
|
||||||
|
* Thus, the upper word of the PC may be sign extended to all 1s.
|
||||||
|
* If so, change it to zero. */
|
||||||
|
if (saved_pc >> 32 == (CORE_ADDR)0xffffffff)
|
||||||
|
saved_pc &= (CORE_ADDR)0xffffffff;
|
||||||
|
}
|
||||||
|
|
||||||
|
return saved_pc;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct mips_extra_func_info temp_proc_desc;
|
static struct mips_extra_func_info temp_proc_desc;
|
||||||
|
@ -463,7 +495,7 @@ heuristic_proc_start(pc)
|
||||||
fence = VM_MIN_ADDRESS;
|
fence = VM_MIN_ADDRESS;
|
||||||
|
|
||||||
/* search back for previous return */
|
/* search back for previous return */
|
||||||
for (start_pc -= 4; ; start_pc -= 4)
|
for (start_pc -= MIPS_INSTLEN; ; start_pc -= MIPS_INSTLEN) /* FIXME!! */
|
||||||
if (start_pc < fence)
|
if (start_pc < fence)
|
||||||
{
|
{
|
||||||
/* It's not clear to me why we reach this point when
|
/* It's not clear to me why we reach this point when
|
||||||
|
@ -498,11 +530,11 @@ Otherwise, you told GDB there was a function where there isn't one, or\n\
|
||||||
else if (ABOUT_TO_RETURN(start_pc))
|
else if (ABOUT_TO_RETURN(start_pc))
|
||||||
break;
|
break;
|
||||||
|
|
||||||
start_pc += 8; /* skip return, and its delay slot */
|
start_pc += 8; /* skip return, and its delay slot */ /* FIXME!! */
|
||||||
#if 0
|
#if 0
|
||||||
/* skip nops (usually 1) 0 - is this */
|
/* skip nops (usually 1) 0 - is this */
|
||||||
while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
|
while (start_pc < pc && read_memory_integer (start_pc, MIPS_INSTLEN) == 0)
|
||||||
start_pc += 4;
|
start_pc += MIPS_INSTLEN;
|
||||||
#endif
|
#endif
|
||||||
return start_pc;
|
return start_pc;
|
||||||
}
|
}
|
||||||
|
@ -514,9 +546,9 @@ heuristic_proc_desc(start_pc, limit_pc, next_frame)
|
||||||
{
|
{
|
||||||
CORE_ADDR sp = read_next_frame_reg (next_frame, SP_REGNUM);
|
CORE_ADDR sp = read_next_frame_reg (next_frame, SP_REGNUM);
|
||||||
CORE_ADDR cur_pc;
|
CORE_ADDR cur_pc;
|
||||||
int frame_size;
|
unsigned long frame_size;
|
||||||
int has_frame_reg = 0;
|
int has_frame_reg = 0;
|
||||||
int reg30 = 0; /* Value of $r30. Used by gcc for frame-pointer */
|
CORE_ADDR reg30 = 0; /* Value of $r30. Used by gcc for frame-pointer */
|
||||||
unsigned long reg_mask = 0;
|
unsigned long reg_mask = 0;
|
||||||
|
|
||||||
if (start_pc == 0) return NULL;
|
if (start_pc == 0) return NULL;
|
||||||
|
@ -528,14 +560,14 @@ heuristic_proc_desc(start_pc, limit_pc, next_frame)
|
||||||
limit_pc = start_pc + 200;
|
limit_pc = start_pc + 200;
|
||||||
restart:
|
restart:
|
||||||
frame_size = 0;
|
frame_size = 0;
|
||||||
for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
|
for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSTLEN) {
|
||||||
char buf[4];
|
char buf[MIPS_INSTLEN];
|
||||||
unsigned long word;
|
unsigned long word;
|
||||||
int status;
|
int status;
|
||||||
|
|
||||||
status = read_memory_nobpt (cur_pc, buf, 4);
|
status = (unsigned long) read_memory_nobpt (cur_pc, buf, MIPS_INSTLEN); /* FIXME!! */
|
||||||
if (status) memory_error (status, cur_pc);
|
if (status) memory_error (status, cur_pc);
|
||||||
word = extract_unsigned_integer (buf, 4);
|
word = (unsigned long) extract_unsigned_integer (buf, MIPS_INSTLEN); /* FIXME!! */
|
||||||
|
|
||||||
if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
|
if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
|
||||||
frame_size += (-word) & 0xFFFF;
|
frame_size += (-word) & 0xFFFF;
|
||||||
|
@ -550,10 +582,10 @@ heuristic_proc_desc(start_pc, limit_pc, next_frame)
|
||||||
if ((word & 0xffff) != frame_size)
|
if ((word & 0xffff) != frame_size)
|
||||||
reg30 = sp + (word & 0xffff);
|
reg30 = sp + (word & 0xffff);
|
||||||
else if (!has_frame_reg) {
|
else if (!has_frame_reg) {
|
||||||
int alloca_adjust;
|
unsigned alloca_adjust;
|
||||||
has_frame_reg = 1;
|
has_frame_reg = 1;
|
||||||
reg30 = read_next_frame_reg(next_frame, 30);
|
reg30 = read_next_frame_reg(next_frame, 30);
|
||||||
alloca_adjust = reg30 - (sp + (word & 0xffff));
|
alloca_adjust = (unsigned)(reg30 - (sp + (word & 0xffff)));
|
||||||
if (alloca_adjust > 0) {
|
if (alloca_adjust > 0) {
|
||||||
/* FP > SP + frame_size. This may be because
|
/* FP > SP + frame_size. This may be because
|
||||||
* of an alloca or somethings similar.
|
* of an alloca or somethings similar.
|
||||||
|
@ -744,6 +776,7 @@ init_extra_frame_info(fci)
|
||||||
|
|
||||||
/* hack: if argument regs are saved, guess these contain args */
|
/* hack: if argument regs are saved, guess these contain args */
|
||||||
if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
|
if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
|
||||||
|
/* FIXME! Increase this for MIPS EABI */
|
||||||
else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
|
else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
|
||||||
else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
|
else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
|
||||||
else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
|
else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
|
||||||
|
@ -787,16 +820,34 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
|
||||||
CORE_ADDR struct_addr;
|
CORE_ADDR struct_addr;
|
||||||
{
|
{
|
||||||
register i;
|
register i;
|
||||||
int accumulate_size = struct_return ? MIPS_REGSIZE : 0;
|
int accumulate_size;
|
||||||
struct mips_arg { char *contents; int len; int offset; };
|
struct mips_arg { char *contents; int len; int offset; };
|
||||||
struct mips_arg *mips_args =
|
struct mips_arg *mips_args;
|
||||||
(struct mips_arg*)alloca((nargs + 4) * sizeof(struct mips_arg));
|
|
||||||
register struct mips_arg *m_arg;
|
register struct mips_arg *m_arg;
|
||||||
int fake_args = 0;
|
int fake_args = 0;
|
||||||
|
int len;
|
||||||
|
|
||||||
|
/* Macro to round n up to the next a boundary (a must be a power of two) */
|
||||||
|
#define ALIGN(n,a) (((n)+(a)-1) & ~((a)-1))
|
||||||
|
|
||||||
|
/* First ensure that the stack and structure return address (if any)
|
||||||
|
are properly aligned. */
|
||||||
|
|
||||||
|
sp = ALIGN (sp, MIPS_REGSIZE);
|
||||||
|
struct_addr = ALIGN (struct_addr, MIPS_REGSIZE);
|
||||||
|
|
||||||
|
accumulate_size = struct_return ? MIPS_REGSIZE : 0;
|
||||||
|
|
||||||
|
/* Allocate descriptors for each argument, plus some extras for the
|
||||||
|
dummies we will create to zero-fill the holes left when we align
|
||||||
|
arguments passed in registers that are smaller than a register. */
|
||||||
|
mips_args = /* FIXME! Should this 4 be increased for MIPS64? */
|
||||||
|
(struct mips_arg*) alloca ((nargs + 4) * sizeof (struct mips_arg));
|
||||||
|
|
||||||
|
/* Build up the list of argument descriptors. */
|
||||||
for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
|
for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
|
||||||
value_ptr arg = args[i];
|
value_ptr arg = args[i];
|
||||||
m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
|
len = m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
|
||||||
/* This entire mips-specific routine is because doubles must be aligned
|
/* This entire mips-specific routine is because doubles must be aligned
|
||||||
* on 8-byte boundaries. It still isn't quite right, because MIPS decided
|
* on 8-byte boundaries. It still isn't quite right, because MIPS decided
|
||||||
* to align 'struct {int a, b}' on 4-byte boundaries (even though this
|
* to align 'struct {int a, b}' on 4-byte boundaries (even though this
|
||||||
|
@ -807,27 +858,46 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
|
||||||
* using eight bytes each, so that we can load them up correctly
|
* using eight bytes each, so that we can load them up correctly
|
||||||
* in CALL_DUMMY.
|
* in CALL_DUMMY.
|
||||||
*/
|
*/
|
||||||
if (m_arg->len > 4)
|
if (len > 4) /* FIXME? */
|
||||||
accumulate_size = (accumulate_size + 7) & -8;
|
accumulate_size = ALIGN (accumulate_size, 8);
|
||||||
m_arg->offset = accumulate_size;
|
m_arg->offset = accumulate_size;
|
||||||
m_arg->contents = VALUE_CONTENTS(arg);
|
m_arg->contents = VALUE_CONTENTS(arg);
|
||||||
if (! GDB_TARGET_IS_MIPS64)
|
if (! GDB_TARGET_IS_MIPS64)
|
||||||
accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
|
/* For 32-bit targets, align the next argument on a 32-bit boundary. */
|
||||||
|
accumulate_size = ALIGN (accumulate_size + len, 4);
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
/* If the argument is being passed on the stack, not a register,
|
||||||
|
adjust the size of the argument upward to account for stack
|
||||||
|
alignment. The EABI allows 8 arguments to be passed in
|
||||||
|
registers; the old ABI allows only four. This code seems
|
||||||
|
bogus to me: shouldn't we be right-aligning small arguments
|
||||||
|
as we do below for the args-in-registers case? FIXME!! */
|
||||||
|
#if MIPS_EABI
|
||||||
|
if (accumulate_size >= 8 * MIPS_REGSIZE) /* Ignores FP. FIXME!! */
|
||||||
|
accumulate_size = ALIGN (accumulate_size + len, 8);
|
||||||
|
#else
|
||||||
if (accumulate_size >= 4 * MIPS_REGSIZE)
|
if (accumulate_size >= 4 * MIPS_REGSIZE)
|
||||||
accumulate_size = (accumulate_size + m_arg->len + 3) &~ 4;
|
accumulate_size = ALIGN (accumulate_size + len, 4);
|
||||||
|
#endif
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
static char zeroes[8] = { 0 };
|
if (len < MIPS_REGSIZE)
|
||||||
int len = m_arg->len;
|
|
||||||
|
|
||||||
if (len < 8)
|
|
||||||
{
|
{
|
||||||
|
/* The argument is being passed in a register, but is smaller
|
||||||
|
than a register. So it it must be right-aligned in the
|
||||||
|
register image being placed in the stack, and the rest
|
||||||
|
of the register image must be zero-filled. */
|
||||||
|
static char zeroes[MIPS_REGSIZE] = { 0 };
|
||||||
|
|
||||||
|
/* Align the arg in the rightmost part of the 64-bit word. */
|
||||||
if (TARGET_BYTE_ORDER == BIG_ENDIAN)
|
if (TARGET_BYTE_ORDER == BIG_ENDIAN)
|
||||||
m_arg->offset += 8 - len;
|
m_arg->offset += MIPS_REGSIZE - len;
|
||||||
|
|
||||||
|
/* Create a fake argument to zero-fill the unsused part
|
||||||
|
of the 64-bit word. */
|
||||||
++m_arg;
|
++m_arg;
|
||||||
m_arg->len = 8 - len;
|
m_arg->len = MIPS_REGSIZE - len;
|
||||||
m_arg->contents = zeroes;
|
m_arg->contents = zeroes;
|
||||||
if (TARGET_BYTE_ORDER == BIG_ENDIAN)
|
if (TARGET_BYTE_ORDER == BIG_ENDIAN)
|
||||||
m_arg->offset = accumulate_size;
|
m_arg->offset = accumulate_size;
|
||||||
|
@ -835,11 +905,11 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
|
||||||
m_arg->offset = accumulate_size + len;
|
m_arg->offset = accumulate_size + len;
|
||||||
++fake_args;
|
++fake_args;
|
||||||
}
|
}
|
||||||
accumulate_size = (accumulate_size + len + 7) & ~8;
|
accumulate_size = ALIGN (accumulate_size + len, MIPS_REGSIZE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
accumulate_size = (accumulate_size + 7) & (-8);
|
accumulate_size = ALIGN (accumulate_size, 8);
|
||||||
if (accumulate_size < 4 * MIPS_REGSIZE)
|
if (accumulate_size < 4 * MIPS_REGSIZE)
|
||||||
accumulate_size = 4 * MIPS_REGSIZE;
|
accumulate_size = 4 * MIPS_REGSIZE;
|
||||||
sp -= accumulate_size;
|
sp -= accumulate_size;
|
||||||
|
@ -855,23 +925,35 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
|
||||||
return sp;
|
return sp;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
|
void
|
||||||
|
mips_push_register(CORE_ADDR *sp, int regno)
|
||||||
|
{
|
||||||
|
char buffer[MAX_REGISTER_RAW_SIZE];
|
||||||
|
int regsize = REGISTER_RAW_SIZE (regno);
|
||||||
|
|
||||||
|
*sp -= regsize;
|
||||||
|
read_register_gen (regno, buffer);
|
||||||
|
write_memory (*sp, buffer, regsize);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<(MIPS_NUMREGS-1). */
|
||||||
#define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
|
#define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
|
||||||
|
|
||||||
void
|
void
|
||||||
mips_push_dummy_frame()
|
mips_push_dummy_frame()
|
||||||
{
|
{
|
||||||
char buffer[MAX_REGISTER_RAW_SIZE];
|
|
||||||
int ireg;
|
int ireg;
|
||||||
struct linked_proc_info *link = (struct linked_proc_info*)
|
struct linked_proc_info *link = (struct linked_proc_info*)
|
||||||
xmalloc(sizeof(struct linked_proc_info));
|
xmalloc(sizeof(struct linked_proc_info));
|
||||||
mips_extra_func_info_t proc_desc = &link->info;
|
mips_extra_func_info_t proc_desc = &link->info;
|
||||||
CORE_ADDR sp = read_register (SP_REGNUM);
|
CORE_ADDR sp = read_register (SP_REGNUM);
|
||||||
CORE_ADDR save_address;
|
CORE_ADDR old_sp = sp;
|
||||||
link->next = linked_proc_desc_table;
|
link->next = linked_proc_desc_table;
|
||||||
linked_proc_desc_table = link;
|
linked_proc_desc_table = link;
|
||||||
|
|
||||||
|
/* FIXME! are these correct ? */
|
||||||
#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
|
#define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
|
||||||
#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
|
#define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<(MIPS_NUMREGS-1))
|
||||||
#define GEN_REG_SAVE_COUNT 22
|
#define GEN_REG_SAVE_COUNT 22
|
||||||
#define FLOAT_REG_SAVE_MASK MASK(0,19)
|
#define FLOAT_REG_SAVE_MASK MASK(0,19)
|
||||||
#define FLOAT_REG_SAVE_COUNT 20
|
#define FLOAT_REG_SAVE_COUNT 20
|
||||||
|
@ -882,8 +964,9 @@ mips_push_dummy_frame()
|
||||||
/*
|
/*
|
||||||
* The registers we must save are all those not preserved across
|
* The registers we must save are all those not preserved across
|
||||||
* procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
|
* procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
|
||||||
* In addition, we must save the PC, and PUSH_FP_REGNUM.
|
* In addition, we must save the PC, PUSH_FP_REGNUM, MMLO/-HI
|
||||||
* (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
|
* and FP Control/Status registers.
|
||||||
|
*
|
||||||
*
|
*
|
||||||
* Dummy frame layout:
|
* Dummy frame layout:
|
||||||
* (high memory)
|
* (high memory)
|
||||||
|
@ -900,72 +983,35 @@ mips_push_dummy_frame()
|
||||||
* Parameter build area (not yet implemented)
|
* Parameter build area (not yet implemented)
|
||||||
* (low memory)
|
* (low memory)
|
||||||
*/
|
*/
|
||||||
PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
|
|
||||||
switch (mips_fpu)
|
|
||||||
{
|
|
||||||
case MIPS_FPU_DOUBLE:
|
|
||||||
PROC_FREG_MASK(proc_desc) = FLOAT_REG_SAVE_MASK;
|
|
||||||
break;
|
|
||||||
case MIPS_FPU_SINGLE:
|
|
||||||
PROC_FREG_MASK(proc_desc) = FLOAT_SINGLE_REG_SAVE_MASK;
|
|
||||||
break;
|
|
||||||
case MIPS_FPU_NONE:
|
|
||||||
PROC_FREG_MASK(proc_desc) = 0;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
|
|
||||||
-sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
|
|
||||||
PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
|
|
||||||
-sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
|
|
||||||
/* save general registers */
|
|
||||||
save_address = sp + PROC_REG_OFFSET(proc_desc);
|
|
||||||
for (ireg = 32; --ireg >= 0; )
|
|
||||||
if (PROC_REG_MASK(proc_desc) & (1 << ireg))
|
|
||||||
{
|
|
||||||
read_register_gen (ireg, buffer);
|
|
||||||
|
|
||||||
/* Need to fix the save_address decrement below, and also make sure
|
/* Save special registers (PC, MMHI, MMLO, FPC_CSR) */
|
||||||
that we don't run into problems with the size of the dummy frame
|
|
||||||
or any of the offsets within it. */
|
|
||||||
if (REGISTER_RAW_SIZE (ireg) > 4)
|
|
||||||
error ("Cannot call functions on mips64");
|
|
||||||
|
|
||||||
write_memory (save_address, buffer, REGISTER_RAW_SIZE (ireg));
|
|
||||||
save_address -= 4;
|
|
||||||
}
|
|
||||||
/* save floating-points registers starting with high order word */
|
|
||||||
save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
|
|
||||||
for (ireg = 32; --ireg >= 0; )
|
|
||||||
if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
|
|
||||||
{
|
|
||||||
read_register_gen (ireg + FP0_REGNUM, buffer);
|
|
||||||
|
|
||||||
if (REGISTER_RAW_SIZE (ireg + FP0_REGNUM) > 4)
|
|
||||||
error ("Cannot call functions on mips64");
|
|
||||||
|
|
||||||
write_memory (save_address, buffer,
|
|
||||||
REGISTER_RAW_SIZE (ireg + FP0_REGNUM));
|
|
||||||
save_address -= 4;
|
|
||||||
}
|
|
||||||
write_register (PUSH_FP_REGNUM, sp);
|
write_register (PUSH_FP_REGNUM, sp);
|
||||||
PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
|
PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
|
||||||
PROC_FRAME_OFFSET(proc_desc) = 0;
|
PROC_FRAME_OFFSET(proc_desc) = 0;
|
||||||
read_register_gen (PC_REGNUM, buffer);
|
mips_push_register (&sp, PC_REGNUM);
|
||||||
write_memory (sp - 4, buffer, REGISTER_RAW_SIZE (PC_REGNUM));
|
mips_push_register (&sp, HI_REGNUM);
|
||||||
read_register_gen (HI_REGNUM, buffer);
|
mips_push_register (&sp, LO_REGNUM);
|
||||||
write_memory (sp - 8, buffer, REGISTER_RAW_SIZE (HI_REGNUM));
|
mips_push_register (&sp, mips_fpu == MIPS_FPU_NONE ? 0 : FCRCS_REGNUM);
|
||||||
read_register_gen (LO_REGNUM, buffer);
|
|
||||||
write_memory (sp - 12, buffer, REGISTER_RAW_SIZE (LO_REGNUM));
|
/* Save general CPU registers */
|
||||||
if (mips_fpu != MIPS_FPU_NONE)
|
PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
|
||||||
read_register_gen (FCRCS_REGNUM, buffer);
|
PROC_REG_OFFSET(proc_desc) = sp - old_sp; /* offset of (Saved R31) from FP */
|
||||||
else
|
for (ireg = 32; --ireg >= 0; )
|
||||||
memset (buffer, 0, REGISTER_RAW_SIZE (FCRCS_REGNUM));
|
if (PROC_REG_MASK(proc_desc) & (1 << ireg))
|
||||||
write_memory (sp - 16, buffer, REGISTER_RAW_SIZE (FCRCS_REGNUM));
|
mips_push_register (&sp, ireg);
|
||||||
sp -= 4 * (GEN_REG_SAVE_COUNT + SPECIAL_REG_SAVE_COUNT);
|
|
||||||
if (mips_fpu == MIPS_FPU_DOUBLE)
|
/* Save floating point registers starting with high order word */
|
||||||
sp -= 4 * FLOAT_REG_SAVE_COUNT;
|
PROC_FREG_MASK(proc_desc) =
|
||||||
else if (mips_fpu == MIPS_FPU_SINGLE)
|
mips_fpu == MIPS_FPU_DOUBLE ? FLOAT_REG_SAVE_MASK
|
||||||
sp -= 4 * FLOAT_SINGLE_REG_SAVE_COUNT;
|
: mips_fpu == MIPS_FPU_SINGLE ? FLOAT_SINGLE_REG_SAVE_MASK : 0;
|
||||||
|
PROC_FREG_OFFSET(proc_desc) = sp - old_sp; /* offset of (Saved D18) from FP */
|
||||||
|
for (ireg = 32; --ireg >= 0; )
|
||||||
|
if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
|
||||||
|
mips_push_register (&sp, ireg + FP0_REGNUM);
|
||||||
|
|
||||||
|
/* Update the stack pointer. Set the procedure's starting and ending
|
||||||
|
addresses to point to the place on the stack where we'll be writing the
|
||||||
|
dummy code (in mips_push_arguments). */
|
||||||
write_register (SP_REGNUM, sp);
|
write_register (SP_REGNUM, sp);
|
||||||
PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
|
PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
|
||||||
PROC_HIGH_ADDR(proc_desc) = sp;
|
PROC_HIGH_ADDR(proc_desc) = sp;
|
||||||
|
@ -987,15 +1033,15 @@ mips_pop_frame()
|
||||||
mips_find_saved_regs (frame);
|
mips_find_saved_regs (frame);
|
||||||
if (proc_desc)
|
if (proc_desc)
|
||||||
{
|
{
|
||||||
for (regnum = 32; --regnum >= 0; )
|
for (regnum = MIPS_NUMREGS; --regnum >= 0; )
|
||||||
if (PROC_REG_MASK(proc_desc) & (1 << regnum))
|
if (PROC_REG_MASK(proc_desc) & (1 << regnum))
|
||||||
write_register (regnum,
|
write_register (regnum,
|
||||||
read_memory_integer (frame->saved_regs->regs[regnum],
|
read_memory_integer (frame->saved_regs->regs[regnum],
|
||||||
4));
|
MIPS_REGSIZE));
|
||||||
for (regnum = 32; --regnum >= 0; )
|
for (regnum = MIPS_NUMREGS; --regnum >= 0; )
|
||||||
if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
|
if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
|
||||||
write_register (regnum + FP0_REGNUM,
|
write_register (regnum + FP0_REGNUM,
|
||||||
read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
|
read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], MIPS_REGSIZE));
|
||||||
}
|
}
|
||||||
write_register (SP_REGNUM, new_sp);
|
write_register (SP_REGNUM, new_sp);
|
||||||
flush_cached_frames ();
|
flush_cached_frames ();
|
||||||
|
@ -1022,10 +1068,13 @@ mips_pop_frame()
|
||||||
|
|
||||||
free (pi_ptr);
|
free (pi_ptr);
|
||||||
|
|
||||||
write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
|
write_register (HI_REGNUM,
|
||||||
write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
|
read_memory_integer (new_sp - 2*MIPS_REGSIZE, MIPS_REGSIZE));
|
||||||
|
write_register (LO_REGNUM,
|
||||||
|
read_memory_integer (new_sp - 3*MIPS_REGSIZE, MIPS_REGSIZE));
|
||||||
if (mips_fpu != MIPS_FPU_NONE)
|
if (mips_fpu != MIPS_FPU_NONE)
|
||||||
write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
|
write_register (FCRCS_REGNUM,
|
||||||
|
read_memory_integer (new_sp - 4*MIPS_REGSIZE, MIPS_REGSIZE));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1043,13 +1092,13 @@ mips_print_register (regnum, all)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If an even floating pointer register, also print as double. */
|
/* If an even floating pointer register, also print as double. */
|
||||||
if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
|
if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+MIPS_NUMREGS
|
||||||
&& !((regnum-FP0_REGNUM) & 1))
|
&& !((regnum-FP0_REGNUM) & 1))
|
||||||
{
|
{
|
||||||
char dbuffer[MAX_REGISTER_RAW_SIZE];
|
char dbuffer[MAX_REGISTER_RAW_SIZE];
|
||||||
|
|
||||||
read_relative_register_raw_bytes (regnum, dbuffer);
|
read_relative_register_raw_bytes (regnum, dbuffer);
|
||||||
read_relative_register_raw_bytes (regnum+1, dbuffer+4);
|
read_relative_register_raw_bytes (regnum+1, dbuffer+4); /* FIXME!! */
|
||||||
#ifdef REGISTER_CONVERT_TO_TYPE
|
#ifdef REGISTER_CONVERT_TO_TYPE
|
||||||
REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
|
REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
|
||||||
#endif
|
#endif
|
||||||
|
@ -1064,7 +1113,7 @@ mips_print_register (regnum, all)
|
||||||
the user can't use them on input. Probably the best solution is to
|
the user can't use them on input. Probably the best solution is to
|
||||||
fix it so that either the numeric or the funky (a2, etc.) names
|
fix it so that either the numeric or the funky (a2, etc.) names
|
||||||
are accepted on input. */
|
are accepted on input. */
|
||||||
if (regnum < 32)
|
if (regnum < MIPS_NUMREGS)
|
||||||
printf_filtered ("(r%d): ", regnum);
|
printf_filtered ("(r%d): ", regnum);
|
||||||
else
|
else
|
||||||
printf_filtered (": ");
|
printf_filtered (": ");
|
||||||
|
@ -1161,12 +1210,12 @@ int
|
||||||
mips_step_skips_delay (pc)
|
mips_step_skips_delay (pc)
|
||||||
CORE_ADDR pc;
|
CORE_ADDR pc;
|
||||||
{
|
{
|
||||||
char buf[4];
|
char buf[4]; /* FIXME!! */
|
||||||
|
|
||||||
if (target_read_memory (pc, buf, 4) != 0)
|
if (target_read_memory (pc, buf, 4) != 0) /* FIXME!! */
|
||||||
/* If error reading memory, guess that it is not a delayed branch. */
|
/* If error reading memory, guess that it is not a delayed branch. */
|
||||||
return 0;
|
return 0;
|
||||||
return is_delayed (extract_unsigned_integer (buf, 4));
|
return is_delayed ((unsigned long)extract_unsigned_integer (buf, 4)); /* FIXME */
|
||||||
}
|
}
|
||||||
|
|
||||||
/* To skip prologues, I use this predicate. Returns either PC itself
|
/* To skip prologues, I use this predicate. Returns either PC itself
|
||||||
|
@ -1183,8 +1232,8 @@ mips_skip_prologue (pc, lenient)
|
||||||
CORE_ADDR pc;
|
CORE_ADDR pc;
|
||||||
int lenient;
|
int lenient;
|
||||||
{
|
{
|
||||||
unsigned long inst;
|
t_inst inst;
|
||||||
int offset;
|
unsigned offset;
|
||||||
int seen_sp_adjust = 0;
|
int seen_sp_adjust = 0;
|
||||||
int load_immediate_bytes = 0;
|
int load_immediate_bytes = 0;
|
||||||
CORE_ADDR post_prologue_pc;
|
CORE_ADDR post_prologue_pc;
|
||||||
|
@ -1204,15 +1253,15 @@ mips_skip_prologue (pc, lenient)
|
||||||
/* Skip the typical prologue instructions. These are the stack adjustment
|
/* Skip the typical prologue instructions. These are the stack adjustment
|
||||||
instruction and the instructions that save registers on the stack
|
instruction and the instructions that save registers on the stack
|
||||||
or in the gcc frame. */
|
or in the gcc frame. */
|
||||||
for (offset = 0; offset < 100; offset += 4)
|
for (offset = 0; offset < 100; offset += MIPS_INSTLEN) /* FIXME!! */
|
||||||
{
|
{
|
||||||
char buf[4];
|
char buf[MIPS_INSTLEN];
|
||||||
int status;
|
int status;
|
||||||
|
|
||||||
status = read_memory_nobpt (pc + offset, buf, 4);
|
status = read_memory_nobpt (pc + offset, buf, MIPS_INSTLEN);
|
||||||
if (status)
|
if (status)
|
||||||
memory_error (status, pc + offset);
|
memory_error (status, pc + offset);
|
||||||
inst = extract_unsigned_integer (buf, 4);
|
inst = (unsigned long)extract_unsigned_integer (buf, MIPS_INSTLEN);
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
if (lenient && is_delayed (inst))
|
if (lenient && is_delayed (inst))
|
||||||
|
@ -1257,7 +1306,7 @@ mips_skip_prologue (pc, lenient)
|
||||||
if ((inst & 0xffff0000) == 0x3c010000 || /* lui $at,n */
|
if ((inst & 0xffff0000) == 0x3c010000 || /* lui $at,n */
|
||||||
(inst & 0xffff0000) == 0x3c080000) /* lui $t0,n */
|
(inst & 0xffff0000) == 0x3c080000) /* lui $t0,n */
|
||||||
{
|
{
|
||||||
load_immediate_bytes += 4;
|
load_immediate_bytes += MIPS_INSTLEN; /* FIXME!! */
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
else if ((inst & 0xffff0000) == 0x34210000 || /* ori $at,$at,n */
|
else if ((inst & 0xffff0000) == 0x34210000 || /* ori $at,$at,n */
|
||||||
|
@ -1265,7 +1314,7 @@ mips_skip_prologue (pc, lenient)
|
||||||
(inst & 0xffff0000) == 0x34010000 || /* ori $at,$zero,n */
|
(inst & 0xffff0000) == 0x34010000 || /* ori $at,$zero,n */
|
||||||
(inst & 0xffff0000) == 0x34080000) /* ori $t0,$zero,n */
|
(inst & 0xffff0000) == 0x34080000) /* ori $t0,$zero,n */
|
||||||
{
|
{
|
||||||
load_immediate_bytes += 4;
|
load_immediate_bytes += MIPS_INSTLEN; /* FIXME!! */
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
@ -1315,7 +1364,7 @@ mips_extract_return_value (valtype, regbuf, valbuf)
|
||||||
regnum = 2;
|
regnum = 2;
|
||||||
if (TYPE_CODE (valtype) == TYPE_CODE_FLT
|
if (TYPE_CODE (valtype) == TYPE_CODE_FLT
|
||||||
&& (mips_fpu == MIPS_FPU_DOUBLE
|
&& (mips_fpu == MIPS_FPU_DOUBLE
|
||||||
|| (mips_fpu == MIPS_FPU_SINGLE && TYPE_LENGTH (valtype) <= 4)))
|
|| (mips_fpu == MIPS_FPU_SINGLE && TYPE_LENGTH (valtype) <= 4))) /* FIXME!! */
|
||||||
regnum = FP0_REGNUM;
|
regnum = FP0_REGNUM;
|
||||||
|
|
||||||
if (TARGET_BYTE_ORDER == BIG_ENDIAN
|
if (TARGET_BYTE_ORDER == BIG_ENDIAN
|
||||||
|
@ -1343,7 +1392,7 @@ mips_store_return_value (valtype, valbuf)
|
||||||
regnum = 2;
|
regnum = 2;
|
||||||
if (TYPE_CODE (valtype) == TYPE_CODE_FLT
|
if (TYPE_CODE (valtype) == TYPE_CODE_FLT
|
||||||
&& (mips_fpu == MIPS_FPU_DOUBLE
|
&& (mips_fpu == MIPS_FPU_DOUBLE
|
||||||
|| (mips_fpu == MIPS_FPU_SINGLE && TYPE_LENGTH (valtype) <= 4)))
|
|| (mips_fpu == MIPS_FPU_SINGLE && TYPE_LENGTH (valtype) <= 4))) /* FIXME!! */
|
||||||
regnum = FP0_REGNUM;
|
regnum = FP0_REGNUM;
|
||||||
|
|
||||||
memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
|
memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
|
||||||
|
@ -1501,7 +1550,7 @@ mips_set_processor_type (str)
|
||||||
char *
|
char *
|
||||||
mips_read_processor_type ()
|
mips_read_processor_type ()
|
||||||
{
|
{
|
||||||
int prid;
|
CORE_ADDR prid;
|
||||||
|
|
||||||
prid = read_register (PRID_REGNUM);
|
prid = read_register (PRID_REGNUM);
|
||||||
|
|
||||||
|
@ -1523,7 +1572,7 @@ reinit_frame_cache_sfunc (args, from_tty, c)
|
||||||
reinit_frame_cache ();
|
reinit_frame_cache ();
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
static int
|
||||||
gdb_print_insn_mips (memaddr, info)
|
gdb_print_insn_mips (memaddr, info)
|
||||||
bfd_vma memaddr;
|
bfd_vma memaddr;
|
||||||
disassemble_info *info;
|
disassemble_info *info;
|
||||||
|
|
|
@ -61,8 +61,8 @@ static void mips_send_command PARAMS ((const char *cmd, int prompt));
|
||||||
static int mips_receive_packet PARAMS ((char *buff, int throw_error,
|
static int mips_receive_packet PARAMS ((char *buff, int throw_error,
|
||||||
int timeout));
|
int timeout));
|
||||||
|
|
||||||
static int mips_request PARAMS ((int cmd, unsigned int addr,
|
static CORE_ADDR mips_request PARAMS ((int cmd, CORE_ADDR addr,
|
||||||
unsigned int data, int *perr, int timeout,
|
CORE_ADDR data, int *perr, int timeout,
|
||||||
char *buff));
|
char *buff));
|
||||||
|
|
||||||
static void mips_initialize PARAMS ((void));
|
static void mips_initialize PARAMS ((void));
|
||||||
|
@ -92,9 +92,9 @@ static void mips_prepare_to_store PARAMS ((void));
|
||||||
|
|
||||||
static void mips_store_registers PARAMS ((int regno));
|
static void mips_store_registers PARAMS ((int regno));
|
||||||
|
|
||||||
static int mips_fetch_word PARAMS ((CORE_ADDR addr));
|
static unsigned int mips_fetch_word PARAMS ((CORE_ADDR addr));
|
||||||
|
|
||||||
static int mips_store_word PARAMS ((CORE_ADDR addr, int value,
|
static int mips_store_word PARAMS ((CORE_ADDR addr, unsigned int value,
|
||||||
char *old_contents));
|
char *old_contents));
|
||||||
|
|
||||||
static int mips_xfer_memory PARAMS ((CORE_ADDR memaddr, char *myaddr, int len,
|
static int mips_xfer_memory PARAMS ((CORE_ADDR memaddr, char *myaddr, int len,
|
||||||
|
@ -1070,11 +1070,11 @@ mips_receive_packet (buff, throw_error, timeout)
|
||||||
occurs, it sets *PERR to 1 and sets errno according to what the
|
occurs, it sets *PERR to 1 and sets errno according to what the
|
||||||
target board reports. */
|
target board reports. */
|
||||||
|
|
||||||
static int
|
static CORE_ADDR
|
||||||
mips_request (cmd, addr, data, perr, timeout, buff)
|
mips_request (cmd, addr, data, perr, timeout, buff)
|
||||||
int cmd;
|
int cmd;
|
||||||
unsigned int addr;
|
CORE_ADDR addr;
|
||||||
unsigned int data;
|
CORE_ADDR data;
|
||||||
int *perr;
|
int *perr;
|
||||||
int timeout;
|
int timeout;
|
||||||
char *buff;
|
char *buff;
|
||||||
|
@ -1093,7 +1093,7 @@ mips_request (cmd, addr, data, perr, timeout, buff)
|
||||||
{
|
{
|
||||||
if (mips_need_reply)
|
if (mips_need_reply)
|
||||||
fatal ("mips_request: Trying to send command before reply");
|
fatal ("mips_request: Trying to send command before reply");
|
||||||
sprintf (buff, "0x0 %c 0x%x 0x%x", cmd, addr, data);
|
sprintf (buff, "0x0 %c 0x%s 0x%s", cmd, paddr(addr), paddr(data));
|
||||||
mips_send_packet (buff, 1);
|
mips_send_packet (buff, 1);
|
||||||
mips_need_reply = 1;
|
mips_need_reply = 1;
|
||||||
}
|
}
|
||||||
|
@ -1755,7 +1755,7 @@ mips_fetch_registers (regno)
|
||||||
val = (unsigned)mips_request ('t', (unsigned int) mips_map_regno (regno),
|
val = (unsigned)mips_request ('t', (unsigned int) mips_map_regno (regno),
|
||||||
(unsigned int) 0, &err, mips_receive_wait, NULL);
|
(unsigned int) 0, &err, mips_receive_wait, NULL);
|
||||||
else
|
else
|
||||||
val = (unsigned)mips_request ('r', (unsigned int) mips_map_regno (regno),
|
val = mips_request ('r', (unsigned int) mips_map_regno (regno),
|
||||||
(unsigned int) 0, &err, mips_receive_wait, NULL);
|
(unsigned int) 0, &err, mips_receive_wait, NULL);
|
||||||
if (err)
|
if (err)
|
||||||
mips_error ("Can't read register %d: %s", regno,
|
mips_error ("Can't read register %d: %s", regno,
|
||||||
|
@ -1796,7 +1796,7 @@ mips_store_registers (regno)
|
||||||
}
|
}
|
||||||
|
|
||||||
mips_request ('R', (unsigned int) mips_map_regno (regno),
|
mips_request ('R', (unsigned int) mips_map_regno (regno),
|
||||||
(unsigned int) read_register (regno),
|
read_register (regno),
|
||||||
&err, mips_receive_wait, NULL);
|
&err, mips_receive_wait, NULL);
|
||||||
if (err)
|
if (err)
|
||||||
mips_error ("Can't write register %d: %s", regno, safe_strerror (errno));
|
mips_error ("Can't write register %d: %s", regno, safe_strerror (errno));
|
||||||
|
@ -1804,22 +1804,25 @@ mips_store_registers (regno)
|
||||||
|
|
||||||
/* Fetch a word from the target board. */
|
/* Fetch a word from the target board. */
|
||||||
|
|
||||||
static int
|
static unsigned int
|
||||||
mips_fetch_word (addr)
|
mips_fetch_word (addr)
|
||||||
CORE_ADDR addr;
|
CORE_ADDR addr;
|
||||||
{
|
{
|
||||||
int val;
|
unsigned int val;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
val = mips_request ('d', (unsigned int) addr, (unsigned int) 0, &err,
|
/* FIXME! addr was cast to uint! */
|
||||||
|
val = mips_request ('d', addr, (unsigned int) 0, &err,
|
||||||
mips_receive_wait, NULL);
|
mips_receive_wait, NULL);
|
||||||
if (err)
|
if (err)
|
||||||
{
|
{
|
||||||
/* Data space failed; try instruction space. */
|
/* Data space failed; try instruction space. */
|
||||||
val = mips_request ('i', (unsigned int) addr, (unsigned int) 0, &err,
|
/* FIXME! addr was cast to uint! */
|
||||||
|
val = mips_request ('i', addr, (unsigned int) 0, &err,
|
||||||
mips_receive_wait, NULL);
|
mips_receive_wait, NULL);
|
||||||
if (err)
|
if (err)
|
||||||
mips_error ("Can't read address 0x%x: %s", addr, safe_strerror (errno));
|
mips_error ("Can't read address 0x%s: %s",
|
||||||
|
paddr(addr), safe_strerror (errno));
|
||||||
}
|
}
|
||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
|
@ -1828,22 +1831,23 @@ mips_fetch_word (addr)
|
||||||
success. If OLD_CONTENTS is non-NULL, put the old contents of that
|
success. If OLD_CONTENTS is non-NULL, put the old contents of that
|
||||||
memory location there. */
|
memory location there. */
|
||||||
|
|
||||||
|
/* FIXME! make sure only 32-bit quantities get stored! */
|
||||||
static int
|
static int
|
||||||
mips_store_word (addr, val, old_contents)
|
mips_store_word (addr, val, old_contents)
|
||||||
CORE_ADDR addr;
|
CORE_ADDR addr;
|
||||||
int val;
|
unsigned int val;
|
||||||
char *old_contents;
|
char *old_contents;
|
||||||
{
|
{
|
||||||
int err;
|
int err;
|
||||||
unsigned int oldcontents;
|
unsigned int oldcontents;
|
||||||
|
|
||||||
oldcontents = mips_request ('D', (unsigned int) addr, (unsigned int) val,
|
oldcontents = mips_request ('D', addr, (unsigned int) val,
|
||||||
&err,
|
&err,
|
||||||
mips_receive_wait, NULL);
|
mips_receive_wait, NULL);
|
||||||
if (err)
|
if (err)
|
||||||
{
|
{
|
||||||
/* Data space failed; try instruction space. */
|
/* Data space failed; try instruction space. */
|
||||||
oldcontents = mips_request ('I', (unsigned int) addr,
|
oldcontents = mips_request ('I', addr,
|
||||||
(unsigned int) val, &err,
|
(unsigned int) val, &err,
|
||||||
mips_receive_wait, NULL);
|
mips_receive_wait, NULL);
|
||||||
if (err)
|
if (err)
|
||||||
|
@ -2142,6 +2146,8 @@ pmon_insert_breakpoint (addr, contents_cache)
|
||||||
tbuff[0] = '0';
|
tbuff[0] = '0';
|
||||||
tbuff[1] = 'x';
|
tbuff[1] = 'x';
|
||||||
|
|
||||||
|
/* FIXME!! only 8 bytes! need to expand for Bfd64;
|
||||||
|
which targets return 64-bit addresses? PMON returns only 32! */
|
||||||
if (!mips_getstring (&tbuff[2], 8))
|
if (!mips_getstring (&tbuff[2], 8))
|
||||||
return 1;
|
return 1;
|
||||||
tbuff[10] = '\0'; /* terminate the string */
|
tbuff[10] = '\0'; /* terminate the string */
|
||||||
|
@ -2191,7 +2197,7 @@ pmon_remove_breakpoint (addr, contents_cache)
|
||||||
|
|
||||||
if (bpnum >= PMON_MAX_BP)
|
if (bpnum >= PMON_MAX_BP)
|
||||||
{
|
{
|
||||||
fprintf_unfiltered (stderr, "pmon_remove_breakpoint: Failed to find breakpoint at address 0x%x\n", addr);
|
fprintf_unfiltered (stderr, "pmon_remove_breakpoint: Failed to find breakpoint at address 0x%s\n", paddr(addr));
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -2344,8 +2350,8 @@ common_breakpoint (cmd, addr, mask, flags)
|
||||||
if (mips_monitor == MON_DDB)
|
if (mips_monitor == MON_DDB)
|
||||||
rresponse = rerrflg;
|
rresponse = rerrflg;
|
||||||
if (rresponse != 22) /* invalid argument */
|
if (rresponse != 22) /* invalid argument */
|
||||||
fprintf_unfiltered (stderr, "common_breakpoint (0x%x): Got error: 0x%x\n",
|
fprintf_unfiltered (stderr, "common_breakpoint (0x%s): Got error: 0x%x\n",
|
||||||
(unsigned int)addr, rresponse);
|
paddr(addr), rresponse);
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -2421,6 +2427,7 @@ mips_load_srec (args)
|
||||||
{
|
{
|
||||||
int numbytes;
|
int numbytes;
|
||||||
|
|
||||||
|
/* FIXME! vma too small?? */
|
||||||
printf_filtered ("%s\t: 0x%4x .. 0x%4x ", s->name, s->vma,
|
printf_filtered ("%s\t: 0x%4x .. 0x%4x ", s->name, s->vma,
|
||||||
s->vma + s->_raw_size);
|
s->vma + s->_raw_size);
|
||||||
gdb_flush (gdb_stdout);
|
gdb_flush (gdb_stdout);
|
||||||
|
@ -2516,6 +2523,7 @@ mips_make_srec (buf, type, memaddr, myaddr, len)
|
||||||
/* Create the header for the srec. addr_size is the number of bytes in the address,
|
/* Create the header for the srec. addr_size is the number of bytes in the address,
|
||||||
and 1 is the number of bytes in the count. */
|
and 1 is the number of bytes in the count. */
|
||||||
|
|
||||||
|
/* FIXME!! bigger buf required for 64-bit! */
|
||||||
buf[0] = 'S';
|
buf[0] = 'S';
|
||||||
buf[1] = type;
|
buf[1] = type;
|
||||||
buf[2] = len + 4 + 1; /* len + 4 byte address + 1 byte checksum */
|
buf[2] = len + 4 + 1; /* len + 4 byte address + 1 byte checksum */
|
||||||
|
@ -2981,8 +2989,8 @@ struct target_ops pmon_ops =
|
||||||
"pmon", /* to_shortname */
|
"pmon", /* to_shortname */
|
||||||
"Remote MIPS debugging over serial line", /* to_longname */
|
"Remote MIPS debugging over serial line", /* to_longname */
|
||||||
"\
|
"\
|
||||||
Debug a board using the PMON MIPS remote debugging protocol over a serial line.\n\
|
Debug a board using the PMON MIPS remote debugging protocol over a serial\n\
|
||||||
The argument is the device it is connected to or, if it contains a\n\
|
line. The argument is the device it is connected to or, if it contains a\n\
|
||||||
colon, HOST:PORT to access a board over a network", /* to_doc */
|
colon, HOST:PORT to access a board over a network", /* to_doc */
|
||||||
pmon_open, /* to_open */
|
pmon_open, /* to_open */
|
||||||
mips_close, /* to_close */
|
mips_close, /* to_close */
|
||||||
|
@ -3031,8 +3039,8 @@ struct target_ops ddb_ops =
|
||||||
"ddb", /* to_shortname */
|
"ddb", /* to_shortname */
|
||||||
"Remote MIPS debugging over serial line", /* to_longname */
|
"Remote MIPS debugging over serial line", /* to_longname */
|
||||||
"\
|
"\
|
||||||
Debug a board using the DDBVR4300 (PMON) MIPS remote debugging protocol over a serial line.\n\
|
Debug a board using the PMON MIPS remote debugging protocol over a serial\n\
|
||||||
The argument is the device it is connected to or, if it contains a\n\
|
line. The argument is the device it is connected to or, if it contains a\n\
|
||||||
colon, HOST:PORT to access a board over a network", /* to_doc */
|
colon, HOST:PORT to access a board over a network", /* to_doc */
|
||||||
ddb_open, /* to_open */
|
ddb_open, /* to_open */
|
||||||
mips_close, /* to_close */
|
mips_close, /* to_close */
|
||||||
|
|
65
gdb/utils.c
65
gdb/utils.c
|
@ -2268,10 +2268,11 @@ floatformat_from_doublest (fmt, from, to)
|
||||||
if (mant_bits_left == fmt->man_len
|
if (mant_bits_left == fmt->man_len
|
||||||
&& fmt->intbit == floatformat_intbit_no)
|
&& fmt->intbit == floatformat_intbit_no)
|
||||||
{
|
{
|
||||||
mant_long &= 0x7fffffff;
|
mant_long <<= 1;
|
||||||
mant_bits -= 1;
|
mant_bits -= 1;
|
||||||
}
|
}
|
||||||
else if (mant_bits < 32)
|
|
||||||
|
if (mant_bits < 32)
|
||||||
{
|
{
|
||||||
/* The bits we want are in the most significant MANT_BITS bits of
|
/* The bits we want are in the most significant MANT_BITS bits of
|
||||||
mant_long. Move them to the least significant. */
|
mant_long. Move them to the least significant. */
|
||||||
|
@ -2284,3 +2285,63 @@ floatformat_from_doublest (fmt, from, to)
|
||||||
mant_bits_left -= mant_bits;
|
mant_bits_left -= mant_bits;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* temporary storage using circular buffer */
|
||||||
|
#define MAXCELLS 16
|
||||||
|
#define CELLSIZE 32
|
||||||
|
char*
|
||||||
|
get_cell()
|
||||||
|
{
|
||||||
|
static char buf[MAXCELLS][CELLSIZE];
|
||||||
|
static int cell=0;
|
||||||
|
if (++cell>MAXCELLS) cell=0;
|
||||||
|
return buf[cell];
|
||||||
|
}
|
||||||
|
|
||||||
|
/* print routines to handle variable size regs, etc */
|
||||||
|
char*
|
||||||
|
paddr(addr)
|
||||||
|
t_addr addr;
|
||||||
|
{
|
||||||
|
char *paddr_str=get_cell();
|
||||||
|
switch (sizeof(t_addr))
|
||||||
|
{
|
||||||
|
case 8:
|
||||||
|
sprintf(paddr_str,"%08x%08x",
|
||||||
|
(unsigned long)(addr>>32),(unsigned long)(addr&0xffffffff));
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
sprintf(paddr_str,"%08x",(unsigned long)addr);
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
sprintf(paddr_str,"%04x",(unsigned short)(addr&0xffff));
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
sprintf(paddr_str,"%x",addr);
|
||||||
|
}
|
||||||
|
return paddr_str;
|
||||||
|
}
|
||||||
|
|
||||||
|
char*
|
||||||
|
preg(reg)
|
||||||
|
t_reg reg;
|
||||||
|
{
|
||||||
|
char *preg_str=get_cell();
|
||||||
|
switch (sizeof(t_reg))
|
||||||
|
{
|
||||||
|
case 8:
|
||||||
|
sprintf(preg_str,"%08x%08x",
|
||||||
|
(unsigned long)(reg>>32),(unsigned long)(reg&0xffffffff));
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
sprintf(preg_str,"%08x",(unsigned long)reg);
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
sprintf(preg_str,"%04x",(unsigned short)(reg&0xffff));
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
sprintf(preg_str,"%x",reg);
|
||||||
|
}
|
||||||
|
return preg_str;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
|
@ -675,7 +675,16 @@ unpack_double (type, valaddr, invp)
|
||||||
else if (nosign)
|
else if (nosign)
|
||||||
{
|
{
|
||||||
/* Unsigned -- be sure we compensate for signed LONGEST. */
|
/* Unsigned -- be sure we compensate for signed LONGEST. */
|
||||||
|
#ifndef _MSC_VER
|
||||||
return (unsigned LONGEST) unpack_long (type, valaddr);
|
return (unsigned LONGEST) unpack_long (type, valaddr);
|
||||||
|
#else
|
||||||
|
#if (_MSC_VER > 800)
|
||||||
|
return (unsigned LONGEST) unpack_long (type, valaddr);
|
||||||
|
#else
|
||||||
|
/* FIXME!!! msvc22 doesn't support unsigned __int64 -> double */
|
||||||
|
return (LONGEST) unpack_long (type, valaddr);
|
||||||
|
#endif
|
||||||
|
#endif /* _MSC_VER */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
|
|
@ -32,7 +32,7 @@
|
||||||
#include <signal.h>
|
#include <signal.h>
|
||||||
#include <sys/types.h>
|
#include <sys/types.h>
|
||||||
#include <fcntl.h>
|
#include <fcntl.h>
|
||||||
#include <windows.h>
|
#include "windefs.h"
|
||||||
#include "buildsym.h"
|
#include "buildsym.h"
|
||||||
#include "symfile.h"
|
#include "symfile.h"
|
||||||
#include "objfiles.h"
|
#include "objfiles.h"
|
||||||
|
|
Loading…
Reference in New Issue