* mips-tdep.c (enum mips_abi): Add MIPS_ABI_N64.
(mips_abi_strings): Add "n64". (mips_gdbarch_init): Add test for n64 abi. Add MIPS_ABI_N64 case.
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@ -1,3 +1,9 @@
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2002-07-31 Kevin Buettner <kevinb@redhat.com>
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* mips-tdep.c (enum mips_abi): Add MIPS_ABI_N64.
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(mips_abi_strings): Add "n64".
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(mips_gdbarch_init): Add test for n64 abi. Add MIPS_ABI_N64 case.
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2002-07-31 Kevin Buettner <kevinb@redhat.com>
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2002-07-31 Kevin Buettner <kevinb@redhat.com>
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* config/mips/tm-irix6.h (MIPS_REGSIZE): Define to be 8.
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* config/mips/tm-irix6.h (MIPS_REGSIZE): Define to be 8.
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@ -64,6 +64,7 @@ enum mips_abi
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MIPS_ABI_UNKNOWN = 0,
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MIPS_ABI_UNKNOWN = 0,
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MIPS_ABI_N32,
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MIPS_ABI_N32,
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MIPS_ABI_O32,
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MIPS_ABI_O32,
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MIPS_ABI_N64,
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MIPS_ABI_O64,
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MIPS_ABI_O64,
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MIPS_ABI_EABI32,
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MIPS_ABI_EABI32,
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MIPS_ABI_EABI64,
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MIPS_ABI_EABI64,
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@ -76,6 +77,7 @@ static const char *mips_abi_strings[] = {
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"auto",
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"auto",
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"n32",
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"n32",
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"o32",
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"o32",
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"n64",
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"o64",
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"o64",
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"eabi32",
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"eabi32",
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"eabi64",
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"eabi64",
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@ -4352,6 +4354,10 @@ mips_gdbarch_init (struct gdbarch_info info,
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break;
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break;
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case bfd_mach_mips8000:
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case bfd_mach_mips8000:
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case bfd_mach_mips10000:
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case bfd_mach_mips10000:
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if (bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
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&& elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
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mips_abi = MIPS_ABI_N64;
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else
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mips_abi = MIPS_ABI_N32;
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mips_abi = MIPS_ABI_N32;
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break;
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break;
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}
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}
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@ -4483,6 +4489,30 @@ mips_gdbarch_init (struct gdbarch_info info,
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set_gdbarch_ptr_bit (gdbarch, 32);
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set_gdbarch_ptr_bit (gdbarch, 32);
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set_gdbarch_long_long_bit (gdbarch, 64);
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set_gdbarch_long_long_bit (gdbarch, 64);
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/* Set up the disassembler info, so that we get the right
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register names from libopcodes. */
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tm_print_insn_info.flavour = bfd_target_elf_flavour;
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tm_print_insn_info.arch = bfd_arch_mips;
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if (info.bfd_arch_info != NULL
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&& info.bfd_arch_info->arch == bfd_arch_mips
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&& info.bfd_arch_info->mach)
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tm_print_insn_info.mach = info.bfd_arch_info->mach;
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else
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tm_print_insn_info.mach = bfd_mach_mips8000;
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break;
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case MIPS_ABI_N64:
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tdep->mips_default_saved_regsize = 8;
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tdep->mips_default_stack_argsize = 8;
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tdep->mips_fp_register_double = 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_fp_arg_regnum = FPA0_REGNUM + 8 - 1;
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tdep->mips_regs_have_home_p = 0;
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tdep->gdb_target_is_mips64 = 1;
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tdep->default_mask_address_p = 0;
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set_gdbarch_long_bit (gdbarch, 64);
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set_gdbarch_ptr_bit (gdbarch, 64);
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set_gdbarch_long_long_bit (gdbarch, 64);
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/* Set up the disassembler info, so that we get the right
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/* Set up the disassembler info, so that we get the right
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register names from libopcodes. */
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register names from libopcodes. */
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tm_print_insn_info.flavour = bfd_target_elf_flavour;
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tm_print_insn_info.flavour = bfd_target_elf_flavour;
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