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binutils-gdb
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* Small TX39-only patch for ECC. 

Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #3,
	to allay warnings.
This commit is contained in:
Frank Ch. Eigler 1998-06-01 16:29:43 +00:00
parent fb0ea2b9e1
commit 29b5afe9af
2 changed files with 19 additions and 5 deletions
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5
sim/mips/ChangeLog
View File

@ -1,3 +1,8 @@
Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (decode_coproc): For TX39, add stub COP0 register #3,
to allay warnings.
start-sanitize-r5900
Mon Jun 1 10:28:25 1998 Jeffrey A Law (law@cygnus.com)

19
sim/mips/interp.c
View File

@ -489,8 +489,10 @@ sim_open (kind, cb, abfd, argv)
}
/* start-sanitize-tx3904 */
else if(! strcmp(board, BOARD_JMR3904) ||
(! strcmp(board, BOARD_JMR3904_DEBUG)))
#if (WITH_HW)
if (board != NULL
&& (strcmp(board, BOARD_JMR3904) == 0 ||
strcmp(board, BOARD_JMR3904_DEBUG) == 0))
{
/* match VIRTUAL memory layout of JMR-TX3904 board */
@ -547,6 +549,7 @@ sim_open (kind, cb, abfd, argv)
device_init(sd);
}
#endif
/* end-sanitize-tx3904 */
@ -1758,7 +1761,7 @@ signal_exception (SIM_DESC sd,
address_word cia,
int exception,...)
{
int vector;
/* int vector; */
#ifdef DEBUG
sim_io_printf(sd,"DBG: SignalException(%d) PC = 0x%s\n",exception,pr_addr(cia));
@ -1915,12 +1918,12 @@ signal_exception (SIM_DESC sd,
else
EPC = cia;
/* FIXME: TLB et.al. */
vector = 0x180;
/* vector = 0x180; */
}
else
{
CAUSE = (exception << 2);
vector = 0x180;
/* vector = 0x180; */
}
SR |= status_EXL;
/* Store exception code into current exception id variable (used
@ -3350,6 +3353,12 @@ decode_coproc (SIM_DESC sd,
/* 10 = EntryHi R4000 VR4100 VR4300 */
/* 11 = Compare R4000 VR4100 VR4300 */
/* 12 = SR R4000 VR4100 VR4300 */
#ifdef SUBTARGET_R3900
case 3:
/* ignore */
break;
/* 3 = Config R3900 */
#endif /* SUBTARGET_R3900 */
case 12:
if (code == 0x00)
GPR[rt] = SR;