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* mips-tdep.c (mips_o32_push_dummy_call): Remove conditions

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based on mips_abi_regsize() whose result is known in advance.
(mips_o64_push_dummy_call): Likewise.
This commit is contained in:
Maciej W. Rozycki 2007-05-02 13:39:51 +00:00
parent 3896c469d2
commit 2afd3f0adc
2 changed files with 21 additions and 85 deletions
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6
gdb/ChangeLog
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@ -1,3 +1,9 @@
2007-05-02 Maciej W. Rozycki <macro@mips.com>
* mips-tdep.c (mips_o32_push_dummy_call): Remove conditions
based on mips_abi_regsize() whose result is known in advance.
(mips_o64_push_dummy_call): Likewise.
2007-04-29 Ulrich Weigand <uweigand@de.ibm.com> 2007-04-29 Ulrich Weigand <uweigand@de.ibm.com>
* m68klinux-nat.c: Remove #ifndef USE_PROC_FS check. * m68klinux-nat.c: Remove #ifndef USE_PROC_FS check.

100
gdb/mips-tdep.c
View File

@ -3069,8 +3069,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
int arglen = TYPE_LENGTH (arg_type); int arglen = TYPE_LENGTH (arg_type);
/* Align to double-word if necessary. */ /* Align to double-word if necessary. */
if (mips_abi_regsize (gdbarch) < 8 if (mips_type_needs_double_align (arg_type))
&& mips_type_needs_double_align (arg_type))
len = align_up (len, mips_stack_argsize (gdbarch) * 2); len = align_up (len, mips_stack_argsize (gdbarch) * 2);
/* Allocate space on the stack. */ /* Allocate space on the stack. */
len += align_up (arglen, mips_stack_argsize (gdbarch)); len += align_up (arglen, mips_stack_argsize (gdbarch));
@ -3120,8 +3119,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
up before the check to see if there are any FP registers up before the check to see if there are any FP registers
left. O32/O64 targets also pass the FP in the integer left. O32/O64 targets also pass the FP in the integer
registers so also round up normal registers. */ registers so also round up normal registers. */
if (mips_abi_regsize (gdbarch) < 8 if (fp_register_arg_p (typecode, arg_type))
&& fp_register_arg_p (typecode, arg_type))
{ {
if ((float_argreg & 1)) if ((float_argreg & 1))
float_argreg++; float_argreg++;
@ -3187,7 +3185,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s", fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len)); argreg, phex (regval, len));
write_register (argreg, regval); write_register (argreg, regval);
argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2; argreg += 2;
} }
/* Reserve space for the FP register. */ /* Reserve space for the FP register. */
stack_offset += align_up (len, mips_stack_argsize (gdbarch)); stack_offset += align_up (len, mips_stack_argsize (gdbarch));
@ -3206,8 +3204,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
&& (len % mips_abi_regsize (gdbarch) != 0)); && (len % mips_abi_regsize (gdbarch) != 0));
/* Structures should be aligned to eight bytes (even arg registers) /* Structures should be aligned to eight bytes (even arg registers)
on MIPS_ABI_O32, if their first member has double precision. */ on MIPS_ABI_O32, if their first member has double precision. */
if (mips_abi_regsize (gdbarch) < 8 if (mips_type_needs_double_align (arg_type))
&& mips_type_needs_double_align (arg_type))
{ {
if ((argreg & 1)) if ((argreg & 1))
{ {
@ -3303,8 +3300,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
identified as such and GDB gets tweaked identified as such and GDB gets tweaked
accordingly. */ accordingly. */
if (mips_abi_regsize (gdbarch) < 8 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& partial_len < mips_abi_regsize (gdbarch) && partial_len < mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT && (typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION)) || typecode == TYPE_CODE_UNION))
@ -3529,10 +3525,6 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct type *arg_type = check_typedef (value_type (args[argnum])); struct type *arg_type = check_typedef (value_type (args[argnum]));
int arglen = TYPE_LENGTH (arg_type); int arglen = TYPE_LENGTH (arg_type);
/* Align to double-word if necessary. */
if (mips_abi_regsize (gdbarch) < 8
&& mips_type_needs_double_align (arg_type))
len = align_up (len, mips_stack_argsize (gdbarch) * 2);
/* Allocate space on the stack. */ /* Allocate space on the stack. */
len += align_up (arglen, mips_stack_argsize (gdbarch)); len += align_up (arglen, mips_stack_argsize (gdbarch));
} }
@ -3576,18 +3568,6 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
val = value_contents (arg); val = value_contents (arg);
/* 32-bit ABIs always start floating point arguments in an
even-numbered floating point register. Round the FP register
up before the check to see if there are any FP registers
left. O32/O64 targets also pass the FP in the integer
registers so also round up normal registers. */
if (mips_abi_regsize (gdbarch) < 8
&& fp_register_arg_p (typecode, arg_type))
{
if ((float_argreg & 1))
float_argreg++;
}
/* Floating point arguments passed in registers have to be /* Floating point arguments passed in registers have to be
treated specially. On 32-bit architectures, doubles treated specially. On 32-bit architectures, doubles
are passed in register pairs; the even register gets are passed in register pairs; the even register gets
@ -3601,55 +3581,16 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
if (fp_register_arg_p (typecode, arg_type) if (fp_register_arg_p (typecode, arg_type)
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM) && float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
{ {
if (mips_abi_regsize (gdbarch) < 8 && len == 8) LONGEST regval = extract_unsigned_integer (val, len);
{ if (mips_debug)
int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0; fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
unsigned long regval; float_argreg, phex (regval, len));
write_register (float_argreg++, regval);
/* Write the low word of the double to the even register(s). */ if (mips_debug)
regval = extract_unsigned_integer (val + low_offset, 4); fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
if (mips_debug) argreg, phex (regval, len));
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s", write_register (argreg, regval);
float_argreg, phex (regval, 4)); argreg++;
write_register (float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, 4));
write_register (argreg++, regval);
/* Write the high word of the double to the odd register(s). */
regval = extract_unsigned_integer (val + 4 - low_offset, 4);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, 4));
write_register (float_argreg++, regval);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, 4));
write_register (argreg++, regval);
}
else
{
/* This is a floating point value that fits entirely
in a single register. */
/* On 32 bit ABI's the float_argreg is further adjusted
above to ensure that it is even register aligned. */
LONGEST regval = extract_unsigned_integer (val, len);
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - fpreg=%d val=%s",
float_argreg, phex (regval, len));
write_register (float_argreg++, regval);
/* CAGNEY: 32 bit MIPS ABI's always reserve two FP
registers for each argument. The below is (my
guess) to ensure that the corresponding integer
register has reserved the same space. */
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
write_register (argreg, regval);
argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
}
/* Reserve space for the FP register. */ /* Reserve space for the FP register. */
stack_offset += align_up (len, mips_stack_argsize (gdbarch)); stack_offset += align_up (len, mips_stack_argsize (gdbarch));
} }
@ -3665,17 +3606,6 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
both places. */ both places. */
int odd_sized_struct = ((len > mips_abi_regsize (gdbarch)) int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
&& (len % mips_abi_regsize (gdbarch) != 0)); && (len % mips_abi_regsize (gdbarch) != 0));
/* Structures should be aligned to eight bytes (even arg registers)
on MIPS_ABI_O32, if their first member has double precision. */
if (mips_abi_regsize (gdbarch) < 8
&& mips_type_needs_double_align (arg_type))
{
if ((argreg & 1))
{
argreg++;
stack_offset += mips_abi_regsize (gdbarch);
}
}
while (len > 0) while (len > 0)
{ {
/* Remember if the argument was written to the stack. */ /* Remember if the argument was written to the stack. */