sim: microblaze: convert to nrun
This port already was storing its cpu state in the sim_cpu structure, so converting it over was pretty easy. It is allocating memory itself still, but we'll fix that up in the future at some point.
This commit is contained in:
Mike Frysinger
parent
97eca187b3
commit
2b4bc832a7
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@ -1,3 +1,32 @@
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2015-03-29 Mike Frysinger <vapier@gentoo.org>
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* Makefile.in (SIM_RUN_OBJS, SIM_EXTRA_CFLAGS, SIM_EXTRA_LIBS): Delete.
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(SIM_OBJS): Change to $(SIM_NEW_COMMON_OBJS).
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* interp.c: Drop sys/times.h, sys/param.h, run-sim.h, and sim-utils.h
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includes.
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(target_big_endian): Replace with CURRENT_TARGET_BYTE_ORDER.
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(callback, microblaze_state, sim_kind, myname, sim_trace, sim_stop,
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sim_load, sim_set_callbacks, sim_complete_command): Delete.
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(wbat, wlat, what, rbat, rlat, rhat): Add SIM_CPU* as first arg.
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(sim_size): Mark static and add SIM_CPU* as first arg.
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(init_pointers): Add SIM_CPU* as first arg and pass to sim_size.
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(set_initial_gprs): Add SIM_CPU* as first arg and pass to init_pointers.
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(sim_resume): Add local cpu variable. Pass it to rlat.
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(sim_write, sim_read, sim_store_register, sim_fetch_register): Add local
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cpu variable. Pass it to init_pointers.
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(sim_stop_reason, sim_do_command): Add local cpu variable.
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(sim_info): Add local cpu and callback variables.
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(free_state): New cleanup function.
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(sim_open): Rewrite to use new common logic.
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(sim_close): Delete body.
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(sim_create_inferior): Delete call to set_initial_gprs.
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* microblaze.h (CPU): Redefine using cpu.
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(MEM_RD_BYTE, MEM_RD_HALF, MEM_RD_WORD, MEM_WR_BYTE, MEM_WR_HALF,
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MEM_WR_WORD): Pass in cpu as first arg.
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* sim-main.h (CIA_GET, CIA_SET, SIM_CPU): Define.
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(MAX_NR_PROCESSORS): Delete.
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(struct sim_state): Change cpu to *cpu, and rewrite STATE_CPU.
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2015-03-29 Mike Frysinger <vapier@gentoo.org>
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* interp.c (NUM_ELEM, heap_ptr, stack_ptr, memcycles, struct aout,
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@ -17,11 +17,13 @@
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## COMMON_PRE_CONFIG_FRAG
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# Use the deprecated run frontend until we migrate to nrun.o
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SIM_RUN_OBJS = run.o
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SIM_EXTRA_CFLAGS = -DSIM_USE_DEPRECATED_RUN_FRONTEND
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SIM_OBJS = interp.o sim-load.o
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SIM_EXTRA_LIBS = -lm
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SIM_OBJS = \
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interp.o \
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$(SIM_NEW_COMMON_OBJS) \
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sim-cpu.o \
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sim-engine.o \
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sim-hload.o \
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sim-reason.o \
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sim-stop.o
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## COMMON_POST_CONFIG_FRAG
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@ -20,20 +20,18 @@
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#include <signal.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/times.h>
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#include <sys/param.h>
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#include <unistd.h>
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#include "bfd.h"
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#include "gdb/callback.h"
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#include "libiberty.h"
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#include "gdb/remote-sim.h"
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#include "run-sim.h"
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#include "sim-main.h"
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#include "sim-utils.h"
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#include "sim-options.h"
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#include "microblaze-dis.h"
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static int target_big_endian = 1;
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host_callback *callback;
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#define target_big_endian (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
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static unsigned long
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microblaze_extract_unsigned_integer (unsigned char *addr, int len)
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@ -91,15 +89,11 @@ microblaze_store_unsigned_integer (unsigned char *addr, int len,
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}
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}
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struct sim_state microblaze_state;
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static SIM_OPEN_KIND sim_kind;
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static char *myname;
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/* TODO: Convert to common tracing framework. */
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static int issue_messages = 0;
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static void /* INLINE */
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wbat (word x, word v)
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wbat (SIM_CPU *cpu, word x, word v)
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{
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if (((uword)x) >= CPU.msize)
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{
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@ -116,7 +110,7 @@ wbat (word x, word v)
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}
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static void /* INLINE */
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wlat (word x, word v)
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wlat (SIM_CPU *cpu, word x, word v)
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{
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if (((uword)x) >= CPU.msize)
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{
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@ -154,7 +148,7 @@ wlat (word x, word v)
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}
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static void /* INLINE */
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what (word x, word v)
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what (SIM_CPU *cpu, word x, word v)
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{
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if (((uword)x) >= CPU.msize)
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{
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@ -190,7 +184,7 @@ what (word x, word v)
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/* Read functions. */
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static int /* INLINE */
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rbat (word x)
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rbat (SIM_CPU *cpu, word x)
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{
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if (((uword)x) >= CPU.msize)
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{
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@ -208,7 +202,7 @@ rbat (word x)
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}
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static int /* INLINE */
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rlat (word x)
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rlat (SIM_CPU *cpu, word x)
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{
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if (((uword) x) >= CPU.msize)
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{
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@ -242,7 +236,7 @@ rlat (word x)
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}
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static int /* INLINE */
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rhat (word x)
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rhat (SIM_CPU *cpu, word x)
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{
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if (((uword)x) >= CPU.msize)
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{
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@ -275,12 +269,13 @@ rhat (word x)
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}
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}
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/* TODO: Delete all sim_size and use common memory functions. */
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/* Default to a 8 Mbyte (== 2^23) memory space. */
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static int sim_memory_size = 1 << 23;
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#define MEM_SIZE_FLOOR 64
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void
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sim_size (int size)
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static void
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sim_size (SIM_CPU *cpu, int size)
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{
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sim_memory_size = size;
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CPU.msize = sim_memory_size;
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@ -303,20 +298,20 @@ sim_size (int size)
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}
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static void
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init_pointers (void)
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init_pointers (SIM_CPU *cpu)
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{
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if (CPU.msize != (sim_memory_size))
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sim_size (sim_memory_size);
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sim_size (cpu, sim_memory_size);
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}
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static void
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set_initial_gprs (void)
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set_initial_gprs (SIM_CPU *cpu)
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{
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int i;
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long space;
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unsigned long memsize;
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init_pointers ();
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init_pointers (cpu);
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/* Set up machine just out of reset. */
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PC = 0;
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@ -341,6 +336,7 @@ static int tracing = 0;
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void
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sim_resume (SIM_DESC sd, int step, int siggnal)
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{
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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int needfetch;
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word inst;
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enum microblaze_instr op;
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@ -369,7 +365,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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do
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{
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/* Fetch the initial instructions that we'll decode. */
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inst = rlat (PC & 0xFFFFFFFC);
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inst = rlat (cpu, PC & 0xFFFFFFFC);
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op = get_insn_microblaze (inst, &imm_unsigned, &insn_type,
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&num_delay_slot);
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@ -443,7 +439,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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{
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newpc = PC;
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PC = oldpc + INST_SIZE;
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inst = rlat (PC & 0xFFFFFFFC);
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inst = rlat (cpu, PC & 0xFFFFFFFC);
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op = get_insn_microblaze (inst, &imm_unsigned, &insn_type,
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&num_delay_slot);
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if (op == invalid_inst)
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@ -530,8 +526,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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int
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sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size)
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{
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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int i;
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init_pointers ();
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init_pointers (cpu);
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memcpy (&CPU.memory[addr], buffer, size);
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@ -541,8 +539,10 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size)
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int
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sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
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{
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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int i;
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init_pointers ();
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init_pointers (cpu);
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memcpy (buffer, &CPU.memory[addr], size);
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@ -553,7 +553,9 @@ sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
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int
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sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
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{
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init_pointers ();
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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init_pointers (cpu);
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if (rn < NUM_REGS + NUM_SPECIAL && rn >= 0)
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{
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@ -577,8 +579,10 @@ sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
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int
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sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
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{
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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long ival;
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init_pointers ();
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init_pointers (cpu);
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if (rn < NUM_REGS + NUM_SPECIAL && rn >= 0)
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{
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@ -600,22 +604,11 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
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return 0;
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}
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int
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sim_trace (SIM_DESC sd)
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{
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tracing = 1;
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sim_resume (sd, 0, 0);
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tracing = 0;
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return 1;
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}
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void
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sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
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{
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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if (CPU.exception == SIGQUIT)
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{
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*reason = sim_exited;
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@ -628,163 +621,122 @@ sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
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}
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}
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int
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sim_stop (SIM_DESC sd)
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{
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CPU.exception = SIGINT;
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return 1;
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}
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void
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sim_info (SIM_DESC sd, int verbose)
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{
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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host_callback *callback = STATE_CALLBACK (sd);
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callback->printf_filtered (callback, "\n\n# instructions executed %10d\n",
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CPU.insts);
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callback->printf_filtered (callback, "# cycles %10d\n",
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(CPU.cycles) ? CPU.cycles+2 : 0);
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}
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static void
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free_state (SIM_DESC sd)
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{
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if (STATE_MODULES (sd) != NULL)
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sim_module_uninstall (sd);
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sim_cpu_free_all (sd);
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sim_state_free (sd);
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}
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SIM_DESC
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sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv)
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{
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/* SIM_DESC sd = sim_state_alloc(kind, alloc);*/
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int i;
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SIM_DESC sd = sim_state_alloc (kind, cb);
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SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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int osize = sim_memory_size;
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myname = argv[0];
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callback = cb;
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/* The cpu data is kept in a separately allocated chunk of memory. */
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if (sim_cpu_alloc_all (sd, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* getopt will print the error message so we just have to exit if this fails.
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FIXME: Hmmm... in the case of gdb we need getopt to call
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print_filtered. */
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if (sim_parse_args (sd, argv) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Check for/establish the a reference program image. */
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if (sim_analyze_program (sd,
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(STATE_PROG_ARGV (sd) != NULL
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? *STATE_PROG_ARGV (sd)
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: NULL), abfd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Configure/verify the target byte order and other runtime
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configuration options. */
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if (sim_config (sd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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return 0;
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}
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if (sim_post_argv_init (sd) != SIM_RC_OK)
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{
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/* Uninstall the modules to avoid memory leaks,
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file descriptor leaks, etc. */
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sim_module_uninstall (sd);
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return 0;
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}
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if (kind == SIM_OPEN_STANDALONE)
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issue_messages = 1;
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/* Discard and reacquire memory -- start with a clean slate. */
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sim_size (1); /* small */
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sim_size (osize); /* and back again */
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/* CPU specific initialization. */
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for (i = 0; i < MAX_NR_PROCESSORS; ++i)
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{
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SIM_CPU *cpu = STATE_CPU (sd, i);
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int osize = sim_memory_size;
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set_initial_gprs (); /* Reset the GPR registers. */
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set_initial_gprs (cpu);
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return ((SIM_DESC) 1);
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/* Discard and reacquire memory -- start with a clean slate. */
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sim_size (cpu, 1); /* small */
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sim_size (cpu, osize); /* and back again */
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}
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return sd;
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}
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void
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sim_close (SIM_DESC sd, int quitting)
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{
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if (CPU.memory)
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{
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free(CPU.memory);
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CPU.memory = NULL;
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CPU.msize = 0;
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}
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}
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SIM_RC
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sim_load (SIM_DESC sd, const char *prog, bfd *abfd, int from_tty)
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{
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/* Do the right thing for ELF executables; this turns out to be
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just about the right thing for any object format that:
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- we crack using BFD routines
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- follows the traditional UNIX text/data/bss layout
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- calls the bss section ".bss". */
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extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
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bfd *prog_bfd;
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{
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bfd *handle;
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asection *s;
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int found_loadable_section = 0;
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bfd_vma max_addr = 0;
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handle = bfd_openr (prog, 0);
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if (!handle)
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{
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printf("``%s'' could not be opened.\n", prog);
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return SIM_RC_FAIL;
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}
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/* Makes sure that we have an object file, also cleans gets the
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section headers in place. */
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if (!bfd_check_format (handle, bfd_object))
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{
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/* wasn't an object file */
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bfd_close (handle);
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printf ("``%s'' is not appropriate object file.\n", prog);
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return SIM_RC_FAIL;
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}
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for (s = handle->sections; s; s = s->next)
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{
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if (s->flags & SEC_ALLOC)
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{
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bfd_vma vma = 0;
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int size = bfd_get_section_size (s);
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if (size > 0)
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{
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vma = bfd_section_vma (handle, s);
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if (vma >= max_addr)
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{
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max_addr = vma + size;
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}
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}
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if (s->flags & SEC_LOAD)
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found_loadable_section = 1;
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}
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}
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if (!found_loadable_section)
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{
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/* No loadable sections */
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bfd_close(handle);
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printf("No loadable sections in file %s\n", prog);
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return SIM_RC_FAIL;
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}
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sim_memory_size = (unsigned long) max_addr;
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/* Clean up after ourselves. */
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bfd_close (handle);
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}
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/* from sh -- dac */
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prog_bfd = sim_load_file (sd, myname, callback, prog, abfd,
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/* sim_kind == SIM_OPEN_DEBUG, */
|
||||
0,
|
||||
0, sim_write);
|
||||
if (prog_bfd == NULL)
|
||||
return SIM_RC_FAIL;
|
||||
|
||||
target_big_endian = bfd_big_endian (prog_bfd);
|
||||
PC = bfd_get_start_address (prog_bfd);
|
||||
|
||||
if (abfd == NULL)
|
||||
bfd_close (prog_bfd);
|
||||
|
||||
return SIM_RC_OK;
|
||||
/* Do nothing. */
|
||||
}
|
||||
|
||||
SIM_RC
|
||||
sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd, char **argv, char **env)
|
||||
{
|
||||
int l;
|
||||
|
||||
/* Set the initial register set. */
|
||||
l = issue_messages;
|
||||
issue_messages = 0;
|
||||
set_initial_gprs ();
|
||||
issue_messages = l;
|
||||
SIM_CPU *cpu = STATE_CPU (sd, 0);
|
||||
|
||||
PC = bfd_get_start_address (prog_bfd);
|
||||
|
||||
/* For now ignore all parameters to the program */
|
||||
|
||||
return SIM_RC_OK;
|
||||
}
|
||||
|
||||
void
|
||||
sim_do_command (SIM_DESC sd, const char *cmd)
|
||||
{
|
||||
SIM_CPU *cpu = STATE_CPU (sd, 0);
|
||||
|
||||
/* Nothing there yet; it's all an error. */
|
||||
|
||||
if (cmd != NULL)
|
||||
|
|
@ -833,15 +785,3 @@ sim_do_command (SIM_DESC sd, const char *cmd)
|
|||
fprintf (stderr, " verbose\n");
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
sim_set_callbacks (host_callback *ptr)
|
||||
{
|
||||
callback = ptr;
|
||||
}
|
||||
|
||||
char **
|
||||
sim_complete_command (SIM_DESC sd, const char *text, const char *word)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
#define GET_RA ((inst & RA_MASK) >> RA_LOW)
|
||||
#define GET_RB ((inst & RB_MASK) >> RB_LOW)
|
||||
|
||||
#define CPU microblaze_state.cpu[0].microblaze_cpu
|
||||
#define CPU cpu->microblaze_cpu
|
||||
|
||||
#define RD CPU.regs[rd]
|
||||
#define RA CPU.regs[ra]
|
||||
|
|
@ -54,16 +54,16 @@
|
|||
|
||||
#define MEM(X) memory[X]
|
||||
|
||||
#define MEM_RD_BYTE(X) rbat(X)
|
||||
#define MEM_RD_HALF(X) rhat(X)
|
||||
#define MEM_RD_WORD(X) rlat(X)
|
||||
#define MEM_RD_BYTE(X) rbat(cpu, X)
|
||||
#define MEM_RD_HALF(X) rhat(cpu, X)
|
||||
#define MEM_RD_WORD(X) rlat(cpu, X)
|
||||
#define MEM_RD_UBYTE(X) (ubyte) MEM_RD_BYTE(X)
|
||||
#define MEM_RD_UHALF(X) (uhalf) MEM_RD_HALF(X)
|
||||
#define MEM_RD_UWORD(X) (uword) MEM_RD_WORD(X)
|
||||
|
||||
#define MEM_WR_BYTE(X, D) wbat(X, D)
|
||||
#define MEM_WR_HALF(X, D) what(X, D)
|
||||
#define MEM_WR_WORD(X, D) wlat(X, D)
|
||||
#define MEM_WR_BYTE(X, D) wbat(cpu, X, D)
|
||||
#define MEM_WR_HALF(X, D) what(cpu, X, D)
|
||||
#define MEM_WR_WORD(X, D) wlat(cpu, X, D)
|
||||
|
||||
|
||||
#define MICROBLAZE_SEXT8(X) ((char) X)
|
||||
|
|
|
|||
|
|
@ -1,6 +1,3 @@
|
|||
#ifndef MICROBLAZE_SIM_MAIN
|
||||
#define MICROBLAZE_SIM_MAIN
|
||||
|
||||
/* Copyright 2009-2015 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of the Xilinx MicroBlaze simulator.
|
||||
|
|
@ -18,9 +15,19 @@
|
|||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, see <http://www.gnu.org/licenses/>. */
|
||||
|
||||
#ifndef MICROBLAZE_SIM_MAIN
|
||||
#define MICROBLAZE_SIM_MAIN
|
||||
|
||||
#include "microblaze.h"
|
||||
#include "sim-basics.h"
|
||||
|
||||
typedef address_word sim_cia;
|
||||
|
||||
#define CIA_GET(cpu) (cpu)->microblaze_cpu.spregs[0]
|
||||
#define CIA_SET(cpu,val) (cpu)->microblaze_cpu.spregs[0] = (val)
|
||||
|
||||
typedef struct _sim_cpu SIM_CPU;
|
||||
|
||||
#include "sim-base.h"
|
||||
|
||||
/* The machine state.
|
||||
|
|
@ -52,11 +59,16 @@ struct _sim_cpu {
|
|||
sim_cpu_base base;
|
||||
};
|
||||
|
||||
#define MAX_NR_PROCESSORS 1
|
||||
struct sim_state {
|
||||
sim_cpu cpu[MAX_NR_PROCESSORS];
|
||||
#define STATE_CPU(sd, n) (&(sd)->cpu[0])
|
||||
|
||||
sim_cpu *cpu[MAX_NR_PROCESSORS];
|
||||
#if (WITH_SMP)
|
||||
#define STATE_CPU(sd,n) ((sd)->cpu[n])
|
||||
#else
|
||||
#define STATE_CPU(sd,n) ((sd)->cpu[0])
|
||||
#endif
|
||||
|
||||
sim_state_base base;
|
||||
};
|
||||
#endif /* MICROBLAZE_SIM_MAIN */
|
||||
|
||||
#endif /* MICROBLAZE_SIM_MAIN */
|
||||
|
|
|
|||
Loading…
Reference in New Issue