Cleanup ppc code dealing with opcode dumps.
include/ * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned. (vle_num_opcodes): Likewise. (spe2_num_opcodes): Likewise. opcodes/ * ppc-opc.c (powerpc_num_opcodes): Likewise. (vle_num_opcodes): Likewise. (spe2_num_opcodes): Likewise. * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite initialization loop. (disassemble_init_powerpc) <vle_opcd_indices>: Likewise. (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise. Initialize only once. gas/ * config/tc-ppc.c (ppc_setup_opcodes) <powerpc_opcodes>: Rewrite code to dump the entire opcode table. (ppc_setup_opcodes) <spe2_opcodes>: Likewise. (ppc_setup_opcodes) <vle_opcodes>: Likewise. Fix calculation of opcode index.
This commit is contained in:
Peter Bergner
parent
ce4ec1a9b6
commit
2ceb7719f7
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@ -1,3 +1,11 @@
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2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
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* config/tc-ppc.c (ppc_setup_opcodes) <powerpc_opcodes>: Rewrite code
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to dump the entire opcode table.
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(ppc_setup_opcodes) <spe2_opcodes>: Likewise.
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(ppc_setup_opcodes) <vle_opcodes>: Likewise. Fix calculation of
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opcode index.
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2018-05-06 H.J. Lu <hongjiu.lu@intel.com>
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* testsuite/gas/i386/xmmhi32.d: Also allow dir32 relocation.
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@ -1602,28 +1602,24 @@ ppc_setup_opcodes (void)
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{
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if (ENABLE_CHECKING)
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{
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if (op != powerpc_opcodes)
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{
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int old_opcode = PPC_OP (op[-1].opcode);
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int new_opcode = PPC_OP (op[0].opcode);
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unsigned int new_opcode = PPC_OP (op[0].opcode);
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#ifdef PRINT_OPCODE_TABLE
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printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
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op->name, (unsigned int) (op - powerpc_opcodes),
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(unsigned int) new_opcode, (unsigned long long) op->opcode,
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(unsigned long long) op->mask, (unsigned long long) op->flags);
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printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
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op->name, (unsigned int) (op - powerpc_opcodes),
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new_opcode, (unsigned long long) op->opcode,
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(unsigned long long) op->mask, (unsigned long long) op->flags);
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#endif
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/* The major opcodes had better be sorted. Code in the
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disassembler assumes the insns are sorted according to
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major opcode. */
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if (new_opcode < old_opcode)
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{
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as_bad (_("major opcode is not sorted for %s"),
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op->name);
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bad_insn = TRUE;
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}
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/* The major opcodes had better be sorted. Code in the disassembler
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assumes the insns are sorted according to major opcode. */
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if (op != powerpc_opcodes
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&& new_opcode < PPC_OP (op[-1].opcode))
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{
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as_bad (_("major opcode is not sorted for %s"), op->name);
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bad_insn = TRUE;
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}
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if ((op->flags & PPC_OPCODE_VLE) != 0)
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{
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as_bad (_("%s is enabled by vle flag"), op->name);
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@ -1663,30 +1659,22 @@ ppc_setup_opcodes (void)
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{
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if (ENABLE_CHECKING)
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{
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if (op != vle_opcodes)
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{
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unsigned old_seg, new_seg;
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old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
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old_seg = VLE_OP_TO_SEG (old_seg);
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new_seg = VLE_OP (op[0].opcode, op[0].mask);
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new_seg = VLE_OP_TO_SEG (new_seg);
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unsigned new_seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask));
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#ifdef PRINT_OPCODE_TABLE
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printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
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op->name, (unsigned int) (op - powerpc_opcodes),
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(unsigned int) new_seg, (unsigned long long) op->opcode,
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(unsigned long long) op->mask, (unsigned long long) op->flags);
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printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
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op->name, (unsigned int) (op - vle_opcodes),
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(unsigned int) new_seg, (unsigned long long) op->opcode,
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(unsigned long long) op->mask, (unsigned long long) op->flags);
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#endif
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/* The major opcodes had better be sorted. Code in the
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disassembler assumes the insns are sorted according to
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major opcode. */
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if (new_seg < old_seg)
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{
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as_bad (_("major opcode is not sorted for %s"),
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op->name);
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bad_insn = TRUE;
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}
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/* The major opcodes had better be sorted. Code in the disassembler
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assumes the insns are sorted according to major opcode. */
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if (op != vle_opcodes
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&& new_seg < VLE_OP_TO_SEG (VLE_OP (op[-1].opcode, op[-1].mask)))
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{
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as_bad (_("major opcode is not sorted for %s"), op->name);
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bad_insn = TRUE;
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}
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bad_insn |= insn_validate (op);
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@ -1,3 +1,9 @@
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2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
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* opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
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(vle_num_opcodes): Likewise.
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(spe2_num_opcodes): Likewise.
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2018-05-04 Alan Modra <amodra@gmail.com>
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* ansidecl.h: Import from gcc.
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@ -75,11 +75,11 @@ struct powerpc_opcode
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in the order in which the disassembler should consider
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instructions. */
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extern const struct powerpc_opcode powerpc_opcodes[];
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extern const int powerpc_num_opcodes;
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extern const unsigned int powerpc_num_opcodes;
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extern const struct powerpc_opcode vle_opcodes[];
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extern const int vle_num_opcodes;
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extern const unsigned int vle_num_opcodes;
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extern const struct powerpc_opcode spe2_opcodes[];
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extern const int spe2_num_opcodes;
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extern const unsigned int spe2_num_opcodes;
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/* Values defined for the flags field of a struct powerpc_opcode. */
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@ -1,3 +1,14 @@
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2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
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* ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
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(vle_num_opcodes): Likewise.
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(spe2_num_opcodes): Likewise.
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* ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
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initialization loop.
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(disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
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(disassemble_init_powerpc) <spe2_opcd_indices>: Likewise. Initialize
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only once.
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2018-05-01 Tamar Christina <tamar.christina@arm.com>
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* aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
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@ -380,58 +380,42 @@ static unsigned short spe2_opcd_indices[SPE2_OPCD_SEGS+1];
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void
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disassemble_init_powerpc (struct disassemble_info *info)
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{
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int i;
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unsigned short last;
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if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0)
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{
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i = powerpc_num_opcodes;
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while (--i >= 0)
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unsigned seg, idx, op;
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/* PPC opcodes */
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for (seg = 0, idx = 0; seg <= PPC_OPCD_SEGS; seg++)
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{
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unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
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powerpc_opcd_indices[op] = i;
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powerpc_opcd_indices[seg] = idx;
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for (; idx < powerpc_num_opcodes; idx++)
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if (seg < PPC_OP (powerpc_opcodes[idx].opcode))
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break;
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}
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last = powerpc_num_opcodes;
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for (i = PPC_OPCD_SEGS; i > 0; --i)
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/* VLE opcodes */
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for (seg = 0, idx = 0; seg <= VLE_OPCD_SEGS; seg++)
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{
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if (powerpc_opcd_indices[i] == 0)
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powerpc_opcd_indices[i] = last;
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last = powerpc_opcd_indices[i];
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vle_opcd_indices[seg] = idx;
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for (; idx < vle_num_opcodes; idx++)
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{
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op = VLE_OP (vle_opcodes[idx].opcode, vle_opcodes[idx].mask);
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if (seg < VLE_OP_TO_SEG (op))
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break;
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}
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}
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i = vle_num_opcodes;
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while (--i >= 0)
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/* SPE2 opcodes */
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for (seg = 0, idx = 0; seg <= SPE2_OPCD_SEGS; seg++)
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{
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unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
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unsigned seg = VLE_OP_TO_SEG (op);
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vle_opcd_indices[seg] = i;
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spe2_opcd_indices[seg] = idx;
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for (; idx < spe2_num_opcodes; idx++)
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{
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op = SPE2_XOP (spe2_opcodes[idx].opcode);
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if (seg < SPE2_XOP_TO_SEG (op))
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break;
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}
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}
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last = vle_num_opcodes;
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for (i = VLE_OPCD_SEGS; i > 0; --i)
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{
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if (vle_opcd_indices[i] == 0)
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vle_opcd_indices[i] = last;
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last = vle_opcd_indices[i];
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}
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}
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/* SPE2 opcodes */
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i = spe2_num_opcodes;
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while (--i >= 0)
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{
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unsigned xop = SPE2_XOP (spe2_opcodes[i].opcode);
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unsigned seg = SPE2_XOP_TO_SEG (xop);
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spe2_opcd_indices[seg] = i;
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}
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last = spe2_num_opcodes;
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for (i = SPE2_OPCD_SEGS; i > 1; --i)
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{
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if (spe2_opcd_indices[i] == 0)
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spe2_opcd_indices[i] = last;
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last = spe2_opcd_indices[i];
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}
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powerpc_init_dialect (info);
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@ -7551,7 +7551,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"fcfidu.", XRC(63,974,1), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},
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};
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const int powerpc_num_opcodes =
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const unsigned int powerpc_num_opcodes =
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sizeof (powerpc_opcodes) / sizeof (powerpc_opcodes[0]);
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/* The VLE opcode table.
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@ -8479,7 +8479,7 @@ const struct powerpc_opcode vle_opcodes[] = {
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{"se_bl", BD8(58,0,1), BD8_MASK, PPCVLE, 0, {B8}},
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};
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const int vle_num_opcodes =
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const unsigned int vle_num_opcodes =
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sizeof (vle_opcodes) / sizeof (vle_opcodes[0]);
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/* The macro table. This is only used by the assembler. */
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@ -9370,5 +9370,5 @@ const struct powerpc_opcode spe2_opcodes[] = {
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{"evavgdsr", VX (4, 1663), VX_MASK, PPCSPE2, 0, {RD, RA, RB}},
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};
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const int spe2_num_opcodes =
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const unsigned int spe2_num_opcodes =
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sizeof (spe2_opcodes) / sizeof (spe2_opcodes[0]);
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