Kazu Hirata
parent
c1c905b7fb
commit
2dcee5388a
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@ -7,6 +7,8 @@
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* alpha-dis.c: Fix formatting.
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* cris-dis.c: Likewise.
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* d10v-dis.c: Likewise.
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* d30v-dis.c: Likewise.
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* m10300-dis.c: Likewise.
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* tic54x-dis.c: Likewise.
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@ -1,5 +1,5 @@
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/* Disassemble D10V instructions.
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Copyright 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
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Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -15,23 +15,22 @@ You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "sysdep.h"
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#include "opcode/d10v.h"
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#include "opcode/d10v.h"
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#include "dis-asm.h"
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/* the PC wraps at 18 bits, except for the segment number */
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/* so use this mask to keep the parts we want */
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/* The PC wraps at 18 bits, except for the segment number,
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so use this mask to keep the parts we want. */
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#define PC_MASK 0x0303FFFF
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static void dis_2_short PARAMS ((unsigned long insn, bfd_vma memaddr,
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static void dis_2_short PARAMS ((unsigned long insn, bfd_vma memaddr,
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struct disassemble_info *info, int order));
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static void dis_long PARAMS ((unsigned long insn, bfd_vma memaddr,
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static void dis_long PARAMS ((unsigned long insn, bfd_vma memaddr,
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struct disassemble_info *info));
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int
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int
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print_insn_d10v (memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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@ -49,20 +48,21 @@ print_insn_d10v (memaddr, info)
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insn = bfd_getb32 (buffer);
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status = insn & FM11;
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switch (status) {
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case 0:
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dis_2_short (insn, memaddr, info, 2);
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break;
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case FM01:
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dis_2_short (insn, memaddr, info, 0);
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break;
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case FM10:
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dis_2_short (insn, memaddr, info, 1);
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break;
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case FM11:
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dis_long (insn, memaddr, info);
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break;
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}
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switch (status)
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{
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case 0:
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dis_2_short (insn, memaddr, info, 2);
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break;
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case FM01:
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dis_2_short (insn, memaddr, info, 0);
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break;
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case FM10:
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dis_2_short (insn, memaddr, info, 1);
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break;
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case FM11:
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dis_long (insn, memaddr, info);
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break;
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}
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return 4;
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}
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@ -78,33 +78,33 @@ print_operand (oper, insn, op, memaddr, info)
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if (oper->flags == OPERAND_ATMINUS)
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{
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(*info->fprintf_func) (info->stream, "@-");
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(*info->fprintf_func) (info->stream, "@-");
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return;
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}
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if (oper->flags == OPERAND_MINUS)
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{
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(*info->fprintf_func) (info->stream, "-");
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(*info->fprintf_func) (info->stream, "-");
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return;
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}
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if (oper->flags == OPERAND_PLUS)
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{
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(*info->fprintf_func) (info->stream, "+");
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(*info->fprintf_func) (info->stream, "+");
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return;
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}
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if (oper->flags == OPERAND_ATSIGN)
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{
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(*info->fprintf_func) (info->stream, "@");
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(*info->fprintf_func) (info->stream, "@");
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return;
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}
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if (oper->flags == OPERAND_ATPAR)
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{
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(*info->fprintf_func) (info->stream, "@(");
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(*info->fprintf_func) (info->stream, "@(");
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return;
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}
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shift = oper->shift;
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/* the LONG_L format shifts registers over by 15 */
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/* The LONG_L format shifts registers over by 15. */
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if (op->format == LONG_L && (oper->flags & OPERAND_REG))
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shift += 15;
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@ -113,50 +113,52 @@ print_operand (oper, insn, op, memaddr, info)
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if (oper->flags & OPERAND_REG)
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{
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int i;
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int match=0;
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int match = 0;
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num += (oper->flags
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& (OPERAND_GPR|OPERAND_FFLAG|OPERAND_CFLAG|OPERAND_CONTROL));
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if (oper->flags & (OPERAND_ACC0|OPERAND_ACC1))
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& (OPERAND_GPR | OPERAND_FFLAG | OPERAND_CFLAG | OPERAND_CONTROL));
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if (oper->flags & (OPERAND_ACC0 | OPERAND_ACC1))
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num += num ? OPERAND_ACC1 : OPERAND_ACC0;
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for (i = 0; i < d10v_reg_name_cnt(); i++)
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for (i = 0; i < d10v_reg_name_cnt (); i++)
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{
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if (num == d10v_predefined_registers[i].value)
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{
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if (d10v_predefined_registers[i].pname)
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(*info->fprintf_func) (info->stream, "%s",d10v_predefined_registers[i].pname);
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(*info->fprintf_func) (info->stream, "%s",
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d10v_predefined_registers[i].pname);
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else
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(*info->fprintf_func) (info->stream, "%s",d10v_predefined_registers[i].name);
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match=1;
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(*info->fprintf_func) (info->stream, "%s",
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d10v_predefined_registers[i].name);
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match = 1;
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break;
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}
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}
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if (match == 0)
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{
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/* this would only get executed if a register was not in the
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register table */
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if (oper->flags & (OPERAND_ACC0|OPERAND_ACC1))
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/* This would only get executed if a register was not in the
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register table. */
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if (oper->flags & (OPERAND_ACC0 | OPERAND_ACC1))
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(*info->fprintf_func) (info->stream, "a");
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else if (oper->flags & OPERAND_CONTROL)
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(*info->fprintf_func) (info->stream, "cr");
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else if(oper->flags & OPERAND_REG)
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else if (oper->flags & OPERAND_REG)
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(*info->fprintf_func) (info->stream, "r");
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(*info->fprintf_func) (info->stream, "%d",num);
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(*info->fprintf_func) (info->stream, "%d", num);
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}
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}
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else
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{
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/* addresses are right-shifted by 2 */
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/* Addresses are right-shifted by 2. */
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if (oper->flags & OPERAND_ADDR)
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{
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long max;
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int neg=0;
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int neg = 0;
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max = (1 << (oper->bits - 1));
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if (num & max)
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{
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num = -num & ((1 << oper->bits)-1);
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num = -num & ((1 << oper->bits) - 1);
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neg = 1;
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}
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num = num<<2;
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num = num << 2;
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if (info->flags & INSN_HAS_RELOC)
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(*info->print_address_func) (num & PC_MASK, info);
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else
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@ -174,16 +176,15 @@ print_operand (oper, insn, op, memaddr, info)
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int max = (1 << (oper->bits - 1));
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if (num & max)
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{
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num = -num & ((1 << oper->bits)-1);
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num = -num & ((1 << oper->bits) - 1);
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(*info->fprintf_func) (info->stream, "-");
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}
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}
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(*info->fprintf_func) (info->stream, "0x%x",num);
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(*info->fprintf_func) (info->stream, "0x%x", num);
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}
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}
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}
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static void
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dis_long (insn, memaddr, info)
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unsigned long insn;
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@ -192,7 +193,7 @@ dis_long (insn, memaddr, info)
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{
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int i;
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char buf[32];
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struct d10v_opcode *op = (struct d10v_opcode *)d10v_opcodes;
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struct d10v_opcode *op = (struct d10v_opcode *) d10v_opcodes;
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struct d10v_operand *oper;
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int need_paren = 0;
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int match = 0;
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@ -202,17 +203,17 @@ dis_long (insn, memaddr, info)
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if ((op->format & LONG_OPCODE) && ((op->mask & insn) == op->opcode))
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{
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match = 1;
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(*info->fprintf_func) (info->stream, "%s\t", op->name);
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for ( i=0; op->operands[i]; i++)
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(*info->fprintf_func) (info->stream, "%s\t", op->name);
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for (i = 0; op->operands[i]; i++)
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{
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oper = (struct d10v_operand *)&d10v_operands[op->operands[i]];
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oper = (struct d10v_operand *) &d10v_operands[op->operands[i]];
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if (oper->flags == OPERAND_ATPAR)
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need_paren = 1;
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print_operand (oper, insn, op, memaddr, info);
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if (op->operands[i+1] && oper->bits &&
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d10v_operands[op->operands[i+1]].flags != OPERAND_PLUS &&
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d10v_operands[op->operands[i+1]].flags != OPERAND_MINUS)
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(*info->fprintf_func) (info->stream, ", ");
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if (op->operands[i + 1] && oper->bits
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&& d10v_operands[op->operands[i + 1]].flags != OPERAND_PLUS
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&& d10v_operands[op->operands[i + 1]].flags != OPERAND_MINUS)
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(*info->fprintf_func) (info->stream, ", ");
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}
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break;
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}
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@ -220,10 +221,10 @@ dis_long (insn, memaddr, info)
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}
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if (!match)
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(*info->fprintf_func) (info->stream, ".long\t0x%08x",insn);
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(*info->fprintf_func) (info->stream, ".long\t0x%08x", insn);
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if (need_paren)
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(*info->fprintf_func) (info->stream, ")");
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(*info->fprintf_func) (info->stream, ")");
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}
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static void
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@ -233,37 +234,38 @@ dis_2_short (insn, memaddr, info, order)
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struct disassemble_info *info;
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int order;
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{
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int i,j;
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int i, j;
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char astr[2][32];
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unsigned int ins[2];
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struct d10v_opcode *op;
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char buf[32];
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int match, num_match=0;
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int match, num_match = 0;
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struct d10v_operand *oper;
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int need_paren = 0;
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ins[0] = (insn & 0x3FFFFFFF) >> 15;
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ins[1] = insn & 0x00007FFF;
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for(j=0;j<2;j++)
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for (j = 0; j < 2; j++)
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{
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op = (struct d10v_opcode *)d10v_opcodes;
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match=0;
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op = (struct d10v_opcode *) d10v_opcodes;
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match = 0;
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while (op->name)
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{
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if ((op->format & SHORT_OPCODE) && ((op->mask & ins[j]) == op->opcode))
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if ((op->format & SHORT_OPCODE)
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&& ((op->mask & ins[j]) == op->opcode))
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{
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(*info->fprintf_func) (info->stream, "%s\t",op->name);
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for (i=0; op->operands[i]; i++)
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(*info->fprintf_func) (info->stream, "%s\t", op->name);
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for (i = 0; op->operands[i]; i++)
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{
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oper = (struct d10v_operand *)&d10v_operands[op->operands[i]];
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oper = (struct d10v_operand *) &d10v_operands[op->operands[i]];
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if (oper->flags == OPERAND_ATPAR)
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need_paren = 1;
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print_operand (oper, ins[j], op, memaddr, info);
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if (op->operands[i+1] && oper->bits &&
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d10v_operands[op->operands[i+1]].flags != OPERAND_PLUS &&
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d10v_operands[op->operands[i+1]].flags != OPERAND_MINUS)
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(*info->fprintf_func) (info->stream, ", ");
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if (op->operands[i + 1] && oper->bits
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&& d10v_operands[op->operands[i + 1]].flags != OPERAND_PLUS
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&& d10v_operands[op->operands[i + 1]].flags != OPERAND_MINUS)
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(*info->fprintf_func) (info->stream, ", ");
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}
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match = 1;
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num_match++;
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@ -272,20 +274,20 @@ dis_2_short (insn, memaddr, info, order)
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op++;
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}
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if (!match)
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(*info->fprintf_func) (info->stream, "unknown");
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(*info->fprintf_func) (info->stream, "unknown");
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switch (order)
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{
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case 0:
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(*info->fprintf_func) (info->stream, "\t->\t");
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(*info->fprintf_func) (info->stream, "\t->\t");
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order = -1;
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break;
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case 1:
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(*info->fprintf_func) (info->stream, "\t<-\t");
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(*info->fprintf_func) (info->stream, "\t<-\t");
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order = -1;
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break;
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case 2:
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(*info->fprintf_func) (info->stream, "\t||\t");
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(*info->fprintf_func) (info->stream, "\t||\t");
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order = -1;
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break;
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default:
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@ -294,8 +296,8 @@ dis_2_short (insn, memaddr, info, order)
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}
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if (num_match == 0)
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(*info->fprintf_func) (info->stream, ".long\t0x%08x",insn);
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(*info->fprintf_func) (info->stream, ".long\t0x%08x", insn);
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if (need_paren)
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(*info->fprintf_func) (info->stream, ")");
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(*info->fprintf_func) (info->stream, ")");
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}
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@ -1,5 +1,5 @@
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/* Disassemble D30V instructions.
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Copyright 1997, 1998, 2000 Free Software Foundation, Inc.
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Copyright 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -17,29 +17,29 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "sysdep.h"
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#include "opcode/d30v.h"
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#include "opcode/d30v.h"
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#include "dis-asm.h"
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#include "opintl.h"
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#define PC_MASK 0xFFFFFFFF
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static int lookup_opcode PARAMS (( struct d30v_insn *insn, long num, int is_long ));
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static void print_insn PARAMS (( struct disassemble_info *info, bfd_vma memaddr, long long num,
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struct d30v_insn *insn, int is_long, int show_ext ));
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static int extract_value PARAMS (( long long num, struct d30v_operand *oper, int is_long ));
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static int lookup_opcode PARAMS ((struct d30v_insn *insn, long num, int is_long));
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static void print_insn PARAMS ((struct disassemble_info *info, bfd_vma memaddr, long long num,
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struct d30v_insn *insn, int is_long, int show_ext));
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static int extract_value PARAMS ((long long num, struct d30v_operand *oper, int is_long));
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int
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int
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print_insn_d30v (memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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{
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int status, result;
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bfd_byte buffer[12];
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unsigned long in1,in2;
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unsigned long in1, in2;
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struct d30v_insn insn;
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long long num;
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insn.form = (struct d30v_format *)NULL;
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insn.form = (struct d30v_format *) NULL;
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info->bytes_per_line = 8;
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info->bytes_per_chunk = 4;
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@ -53,96 +53,97 @@ print_insn_d30v (memaddr, info)
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}
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in1 = bfd_getb32 (buffer);
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status = (*info->read_memory_func) (memaddr+4, buffer, 4, info);
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status = (*info->read_memory_func) (memaddr + 4, buffer, 4, info);
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if (status != 0)
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{
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info->bytes_per_line = 8;
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if (!(result = lookup_opcode(&insn, in1, 0)))
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(*info->fprintf_func) (info->stream, ".long\t0x%x",in1);
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if (!(result = lookup_opcode (&insn, in1, 0)))
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(*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
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else
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print_insn(info, memaddr, (long long) in1, &insn, 0, result);
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return 4;
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print_insn (info, memaddr, (long long) in1, &insn, 0, result);
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return 4;
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}
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in2 = bfd_getb32 (buffer);
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if (in1 & in2 & FM01)
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{
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/* LONG instruction */
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if (!(result = lookup_opcode(&insn, in1, 1)))
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/* LONG instruction. */
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if (!(result = lookup_opcode (&insn, in1, 1)))
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{
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(*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x",in1,in2);
|
||||
(*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x", in1, in2);
|
||||
return 8;
|
||||
}
|
||||
num = (long long)in1 << 32 | in2;
|
||||
print_insn(info, memaddr, num, &insn, 1, result);
|
||||
num = (long long) in1 << 32 | in2;
|
||||
print_insn (info, memaddr, num, &insn, 1, result);
|
||||
}
|
||||
else
|
||||
{
|
||||
num = in1;
|
||||
if (!(result = lookup_opcode(&insn, in1, 0)))
|
||||
(*info->fprintf_func) (info->stream, ".long\t0x%x",in1);
|
||||
if (!(result = lookup_opcode (&insn, in1, 0)))
|
||||
(*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
|
||||
else
|
||||
print_insn(info, memaddr, num, &insn, 0, result);
|
||||
|
||||
switch ( ((in1>>31)<<1) | (in2>>31) )
|
||||
print_insn (info, memaddr, num, &insn, 0, result);
|
||||
|
||||
switch (((in1 >> 31) << 1) | (in2 >> 31))
|
||||
{
|
||||
case 0:
|
||||
(*info->fprintf_func) (info->stream, "\t||\t");
|
||||
(*info->fprintf_func) (info->stream, "\t||\t");
|
||||
break;
|
||||
case 1:
|
||||
(*info->fprintf_func) (info->stream, "\t->\t");
|
||||
(*info->fprintf_func) (info->stream, "\t->\t");
|
||||
break;
|
||||
case 2:
|
||||
(*info->fprintf_func) (info->stream, "\t<-\t");
|
||||
(*info->fprintf_func) (info->stream, "\t<-\t");
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
insn.form = (struct d30v_format *)NULL;
|
||||
num = in2;
|
||||
if (!(result = lookup_opcode(&insn, in2, 0)))
|
||||
(*info->fprintf_func) (info->stream, ".long\t0x%x",in2);
|
||||
else
|
||||
print_insn(info, memaddr, num, &insn, 0, result);
|
||||
|
||||
insn.form = (struct d30v_format *) NULL;
|
||||
num = in2;
|
||||
if (!(result = lookup_opcode (&insn, in2, 0)))
|
||||
(*info->fprintf_func) (info->stream, ".long\t0x%x", in2);
|
||||
else
|
||||
print_insn (info, memaddr, num, &insn, 0, result);
|
||||
}
|
||||
return 8;
|
||||
}
|
||||
|
||||
/* Return 0 if lookup fails,
|
||||
1 if found and only one form,
|
||||
2 if found and there are short and long forms. */
|
||||
|
||||
/* returns 0 if lookup fails */
|
||||
/* 1 if found and only one form */
|
||||
/* 2 if found and there are short and long forms */
|
||||
static int
|
||||
lookup_opcode (insn, num, is_long)
|
||||
struct d30v_insn *insn;
|
||||
long num;
|
||||
int is_long;
|
||||
{
|
||||
int i=0, index;
|
||||
int i = 0, index;
|
||||
struct d30v_format *f;
|
||||
struct d30v_opcode *op = (struct d30v_opcode *)d30v_opcode_table;
|
||||
struct d30v_opcode *op = (struct d30v_opcode *) d30v_opcode_table;
|
||||
int op1 = (num >> 25) & 0x7;
|
||||
int op2 = (num >> 20) & 0x1f;
|
||||
int mod = (num >> 18) & 0x3;
|
||||
|
||||
/* find the opcode */
|
||||
do {
|
||||
if ((op->op1 == op1) && (op->op2 == op2))
|
||||
break;
|
||||
op++;
|
||||
} while (op->name);
|
||||
/* Find the opcode. */
|
||||
do
|
||||
{
|
||||
if ((op->op1 == op1) && (op->op2 == op2))
|
||||
break;
|
||||
op++;
|
||||
}
|
||||
while (op->name);
|
||||
|
||||
if (!op || !op->name)
|
||||
return 0;
|
||||
|
||||
while (op->op1 == op1 && op->op2 == op2)
|
||||
{
|
||||
/* scan through all the formats for the opcode */
|
||||
/* Scan through all the formats for the opcode. */
|
||||
index = op->format[i++];
|
||||
do
|
||||
do
|
||||
{
|
||||
f = (struct d30v_format *)&d30v_format_table[index];
|
||||
f = (struct d30v_format *) &d30v_format_table[index];
|
||||
while (f->form == index)
|
||||
{
|
||||
if ((!is_long || f->form >= LONG) && (f->modifier == mod))
|
||||
|
|
@ -154,11 +155,12 @@ lookup_opcode (insn, num, is_long)
|
|||
}
|
||||
if (insn->form)
|
||||
break;
|
||||
} while ((index = op->format[i++]) != 0);
|
||||
}
|
||||
while ((index = op->format[i++]) != 0);
|
||||
if (insn->form)
|
||||
break;
|
||||
op++;
|
||||
i=0;
|
||||
i = 0;
|
||||
}
|
||||
if (insn->form == NULL)
|
||||
return 0;
|
||||
|
|
@ -171,9 +173,8 @@ lookup_opcode (insn, num, is_long)
|
|||
return 1;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
||||
static void
|
||||
print_insn (info, memaddr, num, insn, is_long, show_ext)
|
||||
struct disassemble_info *info;
|
||||
bfd_vma memaddr;
|
||||
long long num;
|
||||
|
|
@ -181,21 +182,24 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
int is_long;
|
||||
int show_ext;
|
||||
{
|
||||
int val, opnum, need_comma=0;
|
||||
int val, opnum, need_comma = 0;
|
||||
struct d30v_operand *oper;
|
||||
int i, match, opind=0, need_paren=0, found_control=0;
|
||||
int i, match, opind = 0, need_paren = 0, found_control = 0;
|
||||
|
||||
(*info->fprintf_func) (info->stream, "%s",insn->op->name);
|
||||
(*info->fprintf_func) (info->stream, "%s", insn->op->name);
|
||||
|
||||
/* check for CMP or CMPU */
|
||||
/* Check for CMP or CMPU. */
|
||||
if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME)
|
||||
{
|
||||
opind++;
|
||||
val = extract_value(num,(struct d30v_operand *)&d30v_operand_table[insn->form->operands[0]],is_long);
|
||||
(*info->fprintf_func) (info->stream, "%s",d30v_cc_names[val]);
|
||||
val =
|
||||
extract_value (num,
|
||||
(struct d30v_operand *) &d30v_operand_table[insn->form->operands[0]],
|
||||
is_long);
|
||||
(*info->fprintf_func) (info->stream, "%s", d30v_cc_names[val]);
|
||||
}
|
||||
|
||||
/* add in ".s" or ".l" */
|
||||
/* Add in ".s" or ".l". */
|
||||
if (show_ext == 2)
|
||||
{
|
||||
if (is_long)
|
||||
|
|
@ -205,21 +209,23 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
}
|
||||
|
||||
if (insn->ecc)
|
||||
(*info->fprintf_func) (info->stream, "/%s",d30v_ecc_names[insn->ecc]);
|
||||
(*info->fprintf_func) (info->stream, "/%s", d30v_ecc_names[insn->ecc]);
|
||||
|
||||
(*info->fprintf_func) (info->stream, "\t");
|
||||
|
||||
while ((opnum = insn->form->operands[opind++]) != 0)
|
||||
{
|
||||
int bits;
|
||||
oper = (struct d30v_operand *)&d30v_operand_table[opnum];
|
||||
oper = (struct d30v_operand *) &d30v_operand_table[opnum];
|
||||
bits = oper->bits;
|
||||
if (oper->flags & OPERAND_SHIFT)
|
||||
bits += 3;
|
||||
|
||||
if (need_comma && oper->flags != OPERAND_PLUS && oper->flags != OPERAND_MINUS)
|
||||
if (need_comma
|
||||
&& oper->flags != OPERAND_PLUS
|
||||
&& oper->flags != OPERAND_MINUS)
|
||||
{
|
||||
need_comma=0;
|
||||
need_comma = 0;
|
||||
(*info->fprintf_func) (info->stream, ", ");
|
||||
}
|
||||
|
||||
|
|
@ -230,22 +236,22 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
}
|
||||
if (oper->flags == OPERAND_MINUS)
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "-");
|
||||
(*info->fprintf_func) (info->stream, "-");
|
||||
continue;
|
||||
}
|
||||
if (oper->flags == OPERAND_PLUS)
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "+");
|
||||
(*info->fprintf_func) (info->stream, "+");
|
||||
continue;
|
||||
}
|
||||
if (oper->flags == OPERAND_ATSIGN)
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "@");
|
||||
(*info->fprintf_func) (info->stream, "@");
|
||||
continue;
|
||||
}
|
||||
if (oper->flags == OPERAND_ATPAR)
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "@(");
|
||||
(*info->fprintf_func) (info->stream, "@(");
|
||||
need_paren = 1;
|
||||
continue;
|
||||
}
|
||||
|
|
@ -253,18 +259,18 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
if (oper->flags == OPERAND_SPECIAL)
|
||||
continue;
|
||||
|
||||
val = extract_value(num, oper, is_long);
|
||||
|
||||
val = extract_value (num, oper, is_long);
|
||||
|
||||
if (oper->flags & OPERAND_REG)
|
||||
{
|
||||
match = 0;
|
||||
if (oper->flags & OPERAND_CONTROL)
|
||||
{
|
||||
struct d30v_operand *oper3 =
|
||||
(struct d30v_operand *)&d30v_operand_table[insn->form->operands[2]];
|
||||
int id = extract_value (num, oper3, is_long );
|
||||
struct d30v_operand *oper3 =
|
||||
(struct d30v_operand *) &d30v_operand_table[insn->form->operands[2]];
|
||||
int id = extract_value (num, oper3, is_long);
|
||||
found_control = 1;
|
||||
switch ( id )
|
||||
switch (id)
|
||||
{
|
||||
case 0:
|
||||
val |= OPERAND_CONTROL;
|
||||
|
|
@ -277,33 +283,33 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
val |= OPERAND_FLAG;
|
||||
break;
|
||||
default:
|
||||
fprintf(stderr,"illegal id (%d)\n",id);
|
||||
fprintf (stderr, "illegal id (%d)\n", id);
|
||||
}
|
||||
}
|
||||
else if (oper->flags & OPERAND_ACC)
|
||||
val |= OPERAND_ACC;
|
||||
else if (oper->flags & OPERAND_FLAG)
|
||||
val |= OPERAND_FLAG;
|
||||
for (i=0;i<reg_name_cnt();i++)
|
||||
for (i = 0; i < reg_name_cnt (); i++)
|
||||
{
|
||||
if (val == pre_defined_registers[i].value)
|
||||
{
|
||||
if (pre_defined_registers[i].pname)
|
||||
(*info->fprintf_func)
|
||||
(info->stream, "%s",pre_defined_registers[i].pname);
|
||||
(info->stream, "%s", pre_defined_registers[i].pname);
|
||||
else
|
||||
(*info->fprintf_func)
|
||||
(info->stream, "%s",pre_defined_registers[i].name);
|
||||
match=1;
|
||||
(info->stream, "%s", pre_defined_registers[i].name);
|
||||
match = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (match==0)
|
||||
if (match == 0)
|
||||
{
|
||||
/* this would only get executed if a register was not in the
|
||||
register table */
|
||||
/* This would only get executed if a register was not in
|
||||
the register table. */
|
||||
(*info->fprintf_func)
|
||||
(info->stream, _("<unknown register %d>"), val & 0x3F);
|
||||
(info->stream, _("<unknown register %d>"), val & 0x3F);
|
||||
}
|
||||
}
|
||||
/* repeati has a relocation, but its first argument is a plain
|
||||
|
|
@ -314,7 +320,7 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
else if (oper->flags & OPERAND_PCREL)
|
||||
{
|
||||
int neg = 0;
|
||||
|
||||
|
||||
/* IMM6S3 is unsigned. */
|
||||
if (oper->flags & OPERAND_SIGNED || bits == 32)
|
||||
{
|
||||
|
|
@ -325,19 +331,19 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
if (bits == 32)
|
||||
val = -val;
|
||||
else
|
||||
val = -val & ((1 << bits)-1);
|
||||
val = -val & ((1 << bits) - 1);
|
||||
neg = 1;
|
||||
}
|
||||
}
|
||||
if (neg)
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "-%x\t(",val);
|
||||
(*info->fprintf_func) (info->stream, "-%x\t(", val);
|
||||
(*info->print_address_func) ((memaddr - val) & PC_MASK, info);
|
||||
(*info->fprintf_func) (info->stream, ")");
|
||||
}
|
||||
else
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "%x\t(",val);
|
||||
(*info->fprintf_func) (info->stream, "%x\t(", val);
|
||||
(*info->print_address_func) ((memaddr + val) & PC_MASK, info);
|
||||
(*info->fprintf_func) (info->stream, ")");
|
||||
}
|
||||
|
|
@ -359,9 +365,9 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
(*info->fprintf_func) (info->stream, "-");
|
||||
}
|
||||
}
|
||||
(*info->fprintf_func) (info->stream, "0x%x",val);
|
||||
(*info->fprintf_func) (info->stream, "0x%x", val);
|
||||
}
|
||||
/* if there is another operand, then write a comma and space */
|
||||
/* If there is another operand, then write a comma and space. */
|
||||
if (insn->form->operands[opind] && !(found_control && opind == 2))
|
||||
need_comma = 1;
|
||||
}
|
||||
|
|
@ -369,8 +375,6 @@ print_insn ( info, memaddr, num, insn, is_long, show_ext )
|
|||
(*info->fprintf_func) (info->stream, ")");
|
||||
}
|
||||
|
||||
|
||||
|
||||
static int
|
||||
extract_value (num, oper, is_long)
|
||||
long long num;
|
||||
|
|
@ -383,15 +387,15 @@ extract_value (num, oper, is_long)
|
|||
|
||||
if (is_long)
|
||||
{
|
||||
if (oper->bits == 32)
|
||||
if (oper->bits == 32)
|
||||
{
|
||||
/* piece together 32-bit constant */
|
||||
/* Piece together 32-bit constant. */
|
||||
val = ((num & 0x3FFFF)
|
||||
| ((num & 0xFF00000) >> 2)
|
||||
| ((num & 0x3F00000000LL) >> 6));
|
||||
}
|
||||
else
|
||||
val = (num >> (32 + shift)) & mask;
|
||||
else
|
||||
val = (num >> (32 + shift)) & mask;
|
||||
}
|
||||
else
|
||||
val = (num >> shift) & mask;
|
||||
|
|
|
|||
Loading…
Reference in New Issue