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FT32: adjust disassembly opcode match fields

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Tighten up the opcode match fields for conditional jump and call
instructions so more general opcodes don't match them in disassembly.

opcodes/ChangeLog:

	* opcodes/ft32-opc.c (ft32_opc_info): Correct mask for "callc"
	and "jmpc".
This commit is contained in:
jamesbowman 2016-07-08 11:38:35 -07:00
parent b8bca85b33
commit 2f831b9a2b
2 changed files with 7 additions and 2 deletions
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5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2016-07-07 James Bowman <james.bowman@ftdichip.com>
* ft32-opc.c (ft32_opc_info): Correct mask for "callc"
and "jmpc".
2016-07-01 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl (movzbl, movzbw, movzbq, movzwl, movzwq): Remove.

4
opcodes/ft32-opc.c
View File

@ -40,7 +40,7 @@ const ft32_opc_info_t ft32_opc_info[] =
{ "btst", 1, 0xf9f0000fU, 0x59e0000cU, FT32_FLD_R_1|FT32_FLD_RIMM},
{ "link", 0, 0xfe000000U, 0x94000000U, FT32_FLD_R_D|FT32_FLD_K16},
{ "call", 0, 0xfffc0000U, 0x00340000U, FT32_FLD_PA},
{ "callc", 0, 0xf8340000U, 0x00240000U, FT32_FLD_CBCRCV|FT32_FLD_PA},
{ "callc", 0, 0xfe340000U, 0x00240000U, FT32_FLD_CBCRCV|FT32_FLD_PA},
{ "callx", 0, 0xf8040000U, 0x00040000U, FT32_FLD_CR|FT32_FLD_CB|FT32_FLD_CV|FT32_FLD_PA},
{ "streamini", 1, 0xf800000fU, 0xf000000dU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
{ "lda", 1, 0xf8000000U, 0xc0000000U, FT32_FLD_R_D|FT32_FLD_AA},
@ -80,7 +80,7 @@ const ft32_opc_info_t ft32_opc_info[] =
{ "jmpi", 0, 0xfffc0000U, 0x08300000U, FT32_FLD_R_2},
{ "jmpic", 0, 0xf8040000U, 0x08000000U, FT32_FLD_CBCRCV|FT32_FLD_R_2},
{ "ashl", 1, 0xf800000fU, 0x40000008U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
{ "jmpc", 0, 0xf8340000U, 0x00200000U, FT32_FLD_CBCRCV|FT32_FLD_PA},
{ "jmpc", 0, 0xfe340000U, 0x00200000U, FT32_FLD_CBCRCV|FT32_FLD_PA},
{ "jmpx", 0, 0xf8040000U, 0x00000000U, FT32_FLD_CR|FT32_FLD_CB|FT32_FLD_CV|FT32_FLD_PA},
{ "lpm", 1, 0xf8000000U, 0x68000000U, FT32_FLD_R_D|FT32_FLD_PA},
{"streamouti", 1, 0xf800000fU, 0xf000000fU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},