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Add support for linking ARMv8-M object files 

2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
    * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update
    logic around Tag_CPU_arch values to return TRUE for ARMv8-M
    architectures.
    (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update
    v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic.
    (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for
    ARMv8-M.

bfd/testsuite/
    * ld-arm/arm-elf.exp (armeabitests_common): Run new tests
    "Thumb-Thumb farcall v8-M", "EABI attribute merging 8",
    "EABI attribute merging 9" and "EABI attribute merging 10".
    (Thumb-Thumb farcall v8-M): Renamed to ...
    (Thumb-Thumb farcall v8-M Mainline): This.
    (Thumb-Thumb farcall v8-M Baseline): New test.
    * ld-arm/attr-merge-8a.s: New file.
    * ld-arm/attr-merge-8b.s: Likewise.
    * ld-arm/attr-merge-8.attr: Likewise.
    * ld-arm/attr-merge-9a.s: Likewise.
    * ld-arm/attr-merge-9b.s: Likewise.
    * ld-arm/attr-merge-9.out: Likewise.
    * ld-arm/attr-merge-10a.s: Likewise.
    * ld-arm/attr-merge-10b.s: Likewise.
    * ld-arm/attr-merge-10.attr: Likewise.
This commit is contained in:
Thomas Preud'homme 2015-12-24 17:33:17 +08:00
parent ff8646eef8
commit 2fd158eb7b
13 changed files with 150 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
bfd/ChangeLog
View File

@ -1,3 +1,13 @@
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (using_thumb_only): Check that profile is 'M' and update
logic around Tag_CPU_arch values to return TRUE for ARMv8-M
architectures.
(tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update
v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic.
(elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for
ARMv8-M.
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
(tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards

79
bfd/elf32-arm.c
View File

@ -3504,20 +3504,23 @@ create_ifunc_sections (struct bfd_link_info *info)
static bfd_boolean
using_thumb_only (struct elf32_arm_link_hash_table *globals)
{
int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
Tag_CPU_arch);
int profile;
int arch;
int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
Tag_CPU_arch_profile);
if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
if (profile)
return profile == 'M';
arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
if (arch == TAG_CPU_ARCH_V6_M
|| arch == TAG_CPU_ARCH_V6S_M
|| arch == TAG_CPU_ARCH_V7E_M
|| arch == TAG_CPU_ARCH_V8M_BASE
|| arch == TAG_CPU_ARCH_V8M_MAIN)
return TRUE;
if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
return FALSE;
profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
Tag_CPU_arch_profile);
return profile == 'M';
return FALSE;
}
/* Determine if we're dealing with a Thumb-2 object. */
@ -12275,6 +12278,47 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
T(V8), /* V7E_M. */
T(V8) /* V8. */
};
const int v8m_baseline[] =
{
-1, /* PRE_V4. */
-1, /* V4. */
-1, /* V4T. */
-1, /* V5T. */
-1, /* V5TE. */
-1, /* V5TEJ. */
-1, /* V6. */
-1, /* V6KZ. */
-1, /* V6T2. */
-1, /* V6K. */
-1, /* V7. */
T(V8M_BASE), /* V6_M. */
T(V8M_BASE), /* V6S_M. */
-1, /* V7E_M. */
-1, /* V8. */
-1,
T(V8M_BASE) /* V8-M BASELINE. */
};
const int v8m_mainline[] =
{
-1, /* PRE_V4. */
-1, /* V4. */
-1, /* V4T. */
-1, /* V5T. */
-1, /* V5TE. */
-1, /* V5TEJ. */
-1, /* V6. */
-1, /* V6KZ. */
-1, /* V6T2. */
-1, /* V6K. */
T(V8M_MAIN), /* V7. */
T(V8M_MAIN), /* V6_M. */
T(V8M_MAIN), /* V6S_M. */
T(V8M_MAIN), /* V7E_M. */
-1, /* V8. */
-1,
T(V8M_MAIN), /* V8-M BASELINE. */
T(V8M_MAIN) /* V8-M MAINLINE. */
};
const int v4t_plus_v6_m[] =
{
-1, /* PRE_V4. */
@ -12293,8 +12337,8 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
T(V7E_M), /* V7E_M. */
T(V8), /* V8. */
-1, /* Unused. */
-1, /* V8-M BASELINE. */
-1, /* V8-M MAINLINE. */
T(V8M_BASE), /* V8-M BASELINE. */
T(V8M_MAIN), /* V8-M MAINLINE. */
T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
};
const int *comb[] =
@ -12307,8 +12351,8 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
v7e_m,
v8,
NULL,
NULL,
NULL,
v8m_baseline,
v8m_mainline,
/* Pseudo-architecture. */
v4t_plus_v6_m
};
@ -12524,7 +12568,10 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
"ARM v7",
"ARM v6-M",
"ARM v6S-M",
"ARM v8"
"ARM v8",
"",
"ARM v8-M.baseline",
"ARM v8-M.mainline",
};
/* Merge Tag_CPU_arch and Tag_also_compatible_with. */

18
ld/testsuite/ChangeLog
View File

@ -1,3 +1,21 @@
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
* ld-arm/arm-elf.exp (armeabitests_common): Run new tests
"Thumb-Thumb farcall v8-M", "EABI attribute merging 8",
"EABI attribute merging 9" and "EABI attribute merging 10".
(Thumb-Thumb farcall v8-M): Renamed to ...
(Thumb-Thumb farcall v8-M Mainline): This.
(Thumb-Thumb farcall v8-M Baseline): New test.
* ld-arm/attr-merge-8a.s: New file.
* ld-arm/attr-merge-8b.s: Likewise.
* ld-arm/attr-merge-8.attr: Likewise.
* ld-arm/attr-merge-9a.s: Likewise.
* ld-arm/attr-merge-9b.s: Likewise.
* ld-arm/attr-merge-9.out: Likewise.
* ld-arm/attr-merge-10a.s: Likewise.
* ld-arm/attr-merge-10b.s: Likewise.
* ld-arm/attr-merge-10.attr: Likewise.
2015-12-21 Yury Usishchev <y.usishchev@samsung.com>
* ld-arm/arm-elf.exp: New test.

15
ld/testsuite/ld-arm/arm-elf.exp
View File

@ -388,6 +388,15 @@ set armeabitests_common {
{"EABI attribute merging 7" "-r" "" "" {attr-merge-7a.s attr-merge-7b.s}
{{readelf -A attr-merge-7.attr}}
"attr-merge-7"}
{"EABI attribute merging 8" "-r" "" "" {attr-merge-8a.s attr-merge-8b.s}
{{readelf -A attr-merge-8.attr}}
"attr-merge-8"}
{"EABI attribute merging 9" "-r" "" "" {attr-merge-9a.s attr-merge-9b.s}
{{ld attr-merge-9.out}}
"attr-merge-9"}
{"EABI attribute merging 10" "-r" "" "" {attr-merge-10a.s attr-merge-10b.s}
{{readelf -A attr-merge-10.attr}}
"attr-merge-10"}
{"EABI attribute arch merging 1" "-r" "" "" {arch-v6k.s arch-v6t2.s}
{{readelf -A attr-merge-arch-1.attr}}
"attr-merge-arch-1"}
@ -451,6 +460,12 @@ set armeabitests_nonacl {
{"Thumb-Thumb farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv7-m" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-m.d}}
"farcall-thumb-thumb-m"}
{"Thumb-Thumb farcall v8-M Baseline" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv8-m.base" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-m.d}}
"farcall-thumb-thumb-v8-m-base"}
{"Thumb-Thumb farcall v8-M Mainline" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv8-m.main" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-m.d}}
"farcall-thumb-thumb-v8-m-main"}
{"Thumb-Thumb farcall v6-M" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv6-m" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-m.d}}
"farcall-thumb-thumb-v6-m"}

6
ld/testsuite/ld-arm/attr-merge-10.attr Normal file
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@ -0,0 +1,6 @@
Attribute Section: aeabi
File Attributes
Tag_CPU_name: "8-M.MAIN"
Tag_CPU_arch: v8-M.mainline
Tag_CPU_arch_profile: Microcontroller
Tag_THUMB_ISA_use: Yes

5
ld/testsuite/ld-arm/attr-merge-10a.s Normal file
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@ -0,0 +1,5 @@
.arch armv8-m.base
@ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M.BASE
.eabi_attribute Tag_CPU_arch, 16
.eabi_attribute Tag_CPU_arch_profile, 'M'

5
ld/testsuite/ld-arm/attr-merge-10b.s Normal file
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@ -0,0 +1,5 @@
.arch armv8-m.main
@ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M.MAIN
.eabi_attribute Tag_CPU_arch, 17
.eabi_attribute Tag_CPU_arch_profile, 'M'

6
ld/testsuite/ld-arm/attr-merge-8.attr Normal file
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@ -0,0 +1,6 @@
Attribute Section: aeabi
File Attributes
Tag_CPU_name: "8-M.BASE"
Tag_CPU_arch: v8-M.baseline
Tag_CPU_arch_profile: Microcontroller
Tag_THUMB_ISA_use: Yes

5
ld/testsuite/ld-arm/attr-merge-8a.s Normal file
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@ -0,0 +1,5 @@
.arch armv6-m
@ Tag_CPU_arch & Tag_CPU_arch_profile = v6-M
.eabi_attribute Tag_CPU_arch, 11
.eabi_attribute Tag_CPU_arch_profile, 'M'

5
ld/testsuite/ld-arm/attr-merge-8b.s Normal file
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@ -0,0 +1,5 @@
.arch armv8-m.base
@ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M Baseline
.eabi_attribute Tag_CPU_arch, 16
.eabi_attribute Tag_CPU_arch_profile, 'M'

2
ld/testsuite/ld-arm/attr-merge-9.out Normal file
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@ -0,0 +1,2 @@
.*: error: .*: Conflicting CPU architectures 10/16
.*: failed to merge target specific data of file tmpdir/attr-merge-9b.o

5
ld/testsuite/ld-arm/attr-merge-9a.s Normal file
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@ -0,0 +1,5 @@
.arch armv7-m
@ Tag_CPU_arch & Tag_CPU_arch_profile = v7-M
.eabi_attribute Tag_CPU_arch, 10
.eabi_attribute Tag_CPU_arch_profile, 'M'

5
ld/testsuite/ld-arm/attr-merge-9b.s Normal file
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@ -0,0 +1,5 @@
.arch armv8-m.base
@ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M Baseline
.eabi_attribute Tag_CPU_arch, 16
.eabi_attribute Tag_CPU_arch_profile, 'M'