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Fix handling of v850e bit-twiddle instructions. 

* simops.c (OP_E6077E0): And op1 with 7 after reading register, not
	before.
	(BIT_CHANGE_OP): Likewise.
This commit is contained in:
Jim Wilson 2002-09-30 20:11:08 +00:00
parent 28ee05e924
commit 30458d39d6
2 changed files with 8 additions and 2 deletions
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6
sim/v850/ChangeLog
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@ -1,3 +1,9 @@
2002-09-27 Jim Wilson <wilson@redhat.com>
* simops.c (OP_E6077E0): And op1 with 7 after reading register, not
before.
(BIT_CHANGE_OP): Likewise.
2002-09-26 Jim Wilson <wilson@redhat.com>
* simops (OP_10007E0): Don't subtract 4 from PC.

4
sim/v850/simops.c
View File

@ -1897,7 +1897,7 @@ OP_E607E0 (void)
temp = load_mem (State.regs[ OP[0] ], 1);
PSW &= ~PSW_Z;
if ((temp & (1 << State.regs[ OP[1] & 0x7 ])) == 0)
if ((temp & (1 << (State.regs[ OP[1] ] & 0x7))) == 0)
PSW |= PSW_Z;
trace_output (OP_BIT);
@ -1924,7 +1924,7 @@ OP_22207E0 (void)
\
trace_input (name, OP_BIT_CHANGE, 0); \
\
bit = 1 << State.regs[ OP[1] & 0x7 ]; \
bit = 1 << (State.regs[ OP[1] ] & 0x7); \
temp = load_mem (State.regs[ OP[0] ], 1); \
\
PSW &= ~PSW_Z; \