Allow stm.l and ldm.l insns to accept parentheses enclosed register lists.
This commit is contained in:
Nick Clifton
parent
149add75fa
commit
3048287aca
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@ -1,3 +1,8 @@
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2002-05-31 Shrinivas Atre <ShrinivasA@kpit.com>
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* config/tc-h8300.c (get_operand): Allow stm.l and ldm.l insns to
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accept parentheses enclosed register lists.
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2002-05-31 Alan Modra <amodra@bigpond.net.au>
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* Makefile.am: Run "make dep-am".
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@ -38,24 +38,24 @@ const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "";
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/* This table describes all the machine specific pseudo-ops the assembler
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has to support. The fields are:
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pseudo-op name without dot
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function to call to execute this pseudo-op
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Integer arg to pass to the function
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*/
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void cons ();
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void cons PARAMS ((int));
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void sbranch PARAMS ((int));
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void h8300hmode PARAMS ((int));
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void h8300smode PARAMS ((int));
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static void pint PARAMS ((int));
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int Hmode;
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int Smode;
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#define PSIZE (Hmode ? L_32 : L_16)
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#define DMODE (L_16)
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#define DSYMMODE (Hmode ? L_24 : L_16)
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int bsize = L_8; /* default branch displacement */
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void
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h8300hmode ()
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h8300hmode (arg)
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int arg ATTRIBUTE_UNUSED;
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{
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Hmode = 1;
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Smode = 0;
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@ -66,7 +66,8 @@ h8300hmode ()
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}
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void
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h8300smode ()
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h8300smode (arg)
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int arg ATTRIBUTE_UNUSED;
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{
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Smode = 1;
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Hmode = 1;
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@ -84,11 +85,18 @@ sbranch (size)
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}
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static void
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pint ()
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pint (arg)
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int arg ATTRIBUTE_UNUSED;
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{
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cons (Hmode ? 4 : 2);
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}
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/* This table describes all the machine specific pseudo-ops the assembler
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has to support. The fields are:
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pseudo-op name without dot
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function to call to execute this pseudo-op
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Integer arg to pass to the function. */
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const pseudo_typeS md_pseudo_table[] =
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{
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{"h8300h", h8300hmode, 0},
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@ -112,16 +120,17 @@ const int md_reloc_size;
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const char EXP_CHARS[] = "eE";
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/* Chars that mean this number is a floating point constant */
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/* As in 0f12.456 */
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/* or 0d1.2345e12 */
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/* Chars that mean this number is a floating point constant
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As in 0f12.456
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or 0d1.2345e12. */
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const char FLT_CHARS[] = "rRsSfFdDxXpP";
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static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
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static struct hash_control *opcode_hash_control; /* Opcode mnemonics. */
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/* This function is called once, at assembler startup time. This
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should set up all the tables, etc. that the MD part of the assembler
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needs. */
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void
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md_begin ()
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{
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@ -188,7 +197,7 @@ struct h8_exp
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};
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int dispreg;
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int opsize; /* Set when a register size is seen */
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int opsize; /* Set when a register size is seen. */
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struct h8_op
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{
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@ -197,6 +206,18 @@ struct h8_op
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expressionS exp;
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};
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static void clever_message PARAMS ((struct h8_opcode *, struct h8_op *));
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static void build_bytes PARAMS ((struct h8_opcode *, struct h8_op *));
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static void do_a_fix_imm PARAMS ((int, struct h8_op *, int));
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static void check_operand PARAMS ((struct h8_op *, unsigned int, char *));
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static struct h8_opcode * get_specific PARAMS ((struct h8_opcode *, struct h8_op *, int));
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static char * get_operands PARAMS ((unsigned, char *, struct h8_op *));
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static void get_operand PARAMS ((char **, struct h8_op *, unsigned, int));
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static char * skip_colonthing PARAMS ((char *, expressionS *, int *));
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static char * parse_exp PARAMS ((char *, expressionS *));
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static int parse_reg PARAMS ((char *, op_type *, unsigned *, int));
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char * colonmod24 PARAMS ((struct h8_op *, char *));
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/*
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parse operands
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WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
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@ -216,7 +237,6 @@ parse_reg (src, mode, reg, direction)
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op_type *mode;
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unsigned int *reg;
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int direction;
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{
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char *end;
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int len;
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@ -329,7 +349,7 @@ skip_colonthing (ptr, exp, mode)
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if (*ptr == '8')
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{
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ptr++;
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/* ff fill any 8 bit quantity */
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/* ff fill any 8 bit quantity. */
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/* exp->X_add_number -= 0x100; */
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*mode |= L_8;
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}
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@ -367,15 +387,12 @@ skip_colonthing (ptr, exp, mode)
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#xx[:size] immediate data
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@(exp:[8], pc) pc rel
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@@aa[:8] memory indirect
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*/
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@@aa[:8] memory indirect. */
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char *
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colonmod24 (op, src)
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struct h8_op *op;
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char *src;
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{
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int mode = 0;
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src = skip_colonthing (src, &op->exp, &mode);
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@ -397,9 +414,9 @@ colonmod24 (op, src)
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else
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mode = DMODE;
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}
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op->mode |= mode;
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return src;
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}
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static void
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@ -416,6 +433,10 @@ get_operand (ptr, op, dst, direction)
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op->mode = E;
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/* Check for '(' and ')' for instructions ldm and stm. */
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if (src[0] == '(' && src[8] == ')')
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++ src;
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/* Gross. Gross. ldm and stm have a format not easily handled
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by get_operand. We deal with it explicitly here. */
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if (src[0] == 'e' && src[1] == 'r' && ISDIGIT (src[2])
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@ -445,7 +466,10 @@ get_operand (ptr, op, dst, direction)
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so we know this is "very special". */
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op->reg = 0x80000000 | (high << 8) | low;
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op->mode = REG;
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*ptr = src + 7;
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if (src[7] == ')')
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*ptr = src + 8;
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else
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*ptr = src + 7;
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return;
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}
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@ -613,14 +637,11 @@ get_operand (ptr, op, dst, direction)
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src += 2;
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}
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else
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{
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as_bad (_("expect :8 or :16 here"));
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}
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as_bad (_("expect :8 or :16 here"));
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}
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else
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{
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op->mode = PCREL | bsize;
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}
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op->mode = PCREL | bsize;
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*ptr = src;
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}
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}
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@ -672,6 +693,7 @@ get_operands (noperands, op_end, operand)
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/* Passed a pointer to a list of opcodes which use different
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addressing modes, return the opcode which matches the opcodes
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provided. */
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static struct h8_opcode *
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get_specific (opcode, operands, size)
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struct h8_opcode *opcode;
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@ -680,8 +702,7 @@ get_specific (opcode, operands, size)
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{
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struct h8_opcode *this_try = opcode;
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int found = 0;
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unsigned int this_index = opcode->idx;
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int this_index = opcode->idx;
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/* There's only one ldm/stm and it's easier to just
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get out quick for them. */
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@ -704,7 +725,7 @@ get_specific (opcode, operands, size)
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}
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else
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{
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unsigned int i;
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int i;
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for (i = 0; i < this_try->noperands && found; i++)
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{
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@ -804,7 +825,7 @@ check_operand (operand, width, string)
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fs. */
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if ((operand->exp.X_add_number & ~width) != 0 &&
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(operand->exp.X_add_number | width) != (~0))
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(operand->exp.X_add_number | width) != (unsigned)(~0))
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{
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if (width == 255
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&& (operand->exp.X_add_number & 0xff00) == 0xff00)
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@ -940,20 +961,20 @@ do_a_fix_imm (offset, operand, relaxmode)
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}
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/* Now we know what sort of opcodes it is, let's build the bytes. */
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static void
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build_bytes (this_try, operand)
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struct h8_opcode *this_try;
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struct h8_op *operand;
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{
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unsigned int i;
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int i;
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char *output = frag_more (this_try->length);
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op_type *nibble_ptr = this_try->data.nib;
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op_type c;
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unsigned int nibble_count = 0;
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int absat;
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int immat;
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int nib;
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int absat = 0;
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int immat = 0;
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int nib = 0;
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int movb = 0;
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char asnibbles[30];
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char *p = asnibbles;
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@ -970,19 +991,15 @@ build_bytes (this_try, operand)
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d = (c & (DST | SRC_IN_DST)) != 0;
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if (c < 16)
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{
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nib = c;
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}
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nib = c;
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else
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{
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if (c & (REG | IND | INC | DEC))
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{
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nib = operand[d].reg;
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}
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nib = operand[d].reg;
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else if ((c & DISPREG) == (DISPREG))
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{
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nib = dispreg;
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}
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nib = dispreg;
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else if (c & ABS)
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{
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operand[d].mode = c;
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@ -996,9 +1013,8 @@ build_bytes (this_try, operand)
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nib = 0;
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}
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else if (c & IGNORE)
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{
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nib = 0;
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}
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nib = 0;
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else if (c & DBIT)
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{
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switch (operand[0].exp.X_add_number)
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@ -1038,14 +1054,10 @@ build_bytes (this_try, operand)
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}
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if (c & MEMRELAX)
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{
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operand[d].mode |= MEMRELAX;
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}
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operand[d].mode |= MEMRELAX;
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if (c & B31)
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{
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nib |= 0x8;
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}
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nib |= 0x8;
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if (c & MACREG)
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{
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@ -1076,9 +1088,7 @@ build_bytes (this_try, operand)
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}
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for (i = 0; i < this_try->length; i++)
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{
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output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
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}
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output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
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/* Note if this is a movb instruction -- there's a special relaxation
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which only applies to them. */
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@ -1091,18 +1101,16 @@ build_bytes (this_try, operand)
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int x = operand[i].mode;
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if (x & (IMM | DISP))
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{
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do_a_fix_imm (output - frag_now->fr_literal + immat,
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operand + i, x & MEMRELAX != 0);
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}
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do_a_fix_imm (output - frag_now->fr_literal + immat,
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operand + i, (x & MEMRELAX) != 0);
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else if (x & ABS)
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{
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do_a_fix_imm (output - frag_now->fr_literal + absat,
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operand + i, x & MEMRELAX ? movb + 1 : 0);
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}
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do_a_fix_imm (output - frag_now->fr_literal + absat,
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operand + i, (x & MEMRELAX) ? movb + 1 : 0);
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else if (x & PCREL)
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{
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int size16 = x & L_16;
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int size16 = x & (L_16);
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int where = size16 ? 2 : 1;
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int size = size16 ? 2 : 1;
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int type = size16 ? R_PCRWORD : R_PCRBYTE;
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@ -1111,11 +1119,8 @@ build_bytes (this_try, operand)
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check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
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if (operand[i].exp.X_add_number & 1)
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{
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as_warn (_("branch operand has odd offset (%lx)\n"),
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(unsigned long) operand->exp.X_add_number);
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}
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as_warn (_("branch operand has odd offset (%lx)\n"),
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(unsigned long) operand->exp.X_add_number);
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#ifndef OBJ_ELF
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/* The COFF port has always been off by one, changing it
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now would be an incompatible change, so we leave it as-is.
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@ -1124,7 +1129,6 @@ build_bytes (this_try, operand)
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compatible with the proposed ELF format from Hitachi. */
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operand[i].exp.X_add_number -= 1;
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#endif
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operand[i].exp.X_add_number =
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((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
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@ -1160,11 +1164,11 @@ build_bytes (this_try, operand)
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/* This jmp may be a jump or a branch. */
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check_operand (operand + i, Hmode ? 0xffffff : 0xffff, "@");
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if (operand[i].exp.X_add_number & 1)
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{
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as_warn (_("branch operand has odd offset (%lx)\n"),
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(unsigned long) operand->exp.X_add_number);
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}
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as_warn (_("branch operand has odd offset (%lx)\n"),
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(unsigned long) operand->exp.X_add_number);
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if (!Hmode)
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operand[i].exp.X_add_number =
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((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
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@ -1180,6 +1184,7 @@ build_bytes (this_try, operand)
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/* Try to give an intelligent error message for common and simple to
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detect errors. */
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static void
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clever_message (opcode, operand)
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struct h8_opcode *opcode;
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@ -1189,7 +1194,7 @@ clever_message (opcode, operand)
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if ((opcode + 1)->idx != opcode->idx)
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{
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unsigned int argn;
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int argn;
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/* Only one opcode of this flavour, try to guess which operand
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didn't match. */
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@ -1246,6 +1251,7 @@ clever_message (opcode, operand)
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/* This is the guts of the machine-dependent assembler. STR points to
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a machine dependent instruction. This function is supposed to emit
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the frags/bytes it assembles. */
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void
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md_assemble (str)
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char *str;
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@ -1388,7 +1394,6 @@ md_atof (type, litP, sizeP)
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LITTLENUM_TYPE words[MAX_LITTLENUMS];
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LITTLENUM_TYPE *wordP;
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char *t;
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char *atof_ieee ();
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switch (type)
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{
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@ -1454,6 +1459,8 @@ md_show_usage (stream)
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{
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}
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void tc_aout_fix_to_chars PARAMS ((void));
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void
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tc_aout_fix_to_chars ()
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{
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