diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 23d5afdb3f..fb49039d41 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2005-08-25 Chao-ying Fu + + * gas/mips/mips.exp: Run DSP test. + * gas/mips/mips32-dsp.[sdl]: New test. + 2005-08-22 Jan Beulich * gas/i386/mixed-mode-reloc.s, gas/i386/mixed-mode-reloc32.d, diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 09da50b371..0df86448ab 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -762,6 +762,8 @@ if { [istarget mips*-*-*] } then { run_list_test "noat-6" "" run_list_test "noat-7" "" + run_dump_test_arches "mips32-dsp" [mips_arch_list_matching mips32 !sb1] + if { $elf && !$no_mips16 } { run_dump_test "mips16-dwarf2" if $has_newabi { diff --git a/gas/testsuite/gas/mips/mips32-dsp.d b/gas/testsuite/gas/mips/mips32-dsp.d new file mode 100644 index 0000000000..c1098c1bb5 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32-dsp.d @@ -0,0 +1,178 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS DSP ASE for MIPS32 +#as: -mdsp +#stderr: mips32-dsp.l + +# Check MIPS DSP ASE for MIPS32 Instruction Assembly + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> 7c220290 addq\.ph zero,at,v0 +0+0004 <[^>]*> 7c430b90 addq_s\.ph at,v0,v1 +0+0008 <[^>]*> 7c641590 addq_s\.w v0,v1,a0 +0+000c <[^>]*> 7c851810 addu\.qb v1,a0,a1 +0+0010 <[^>]*> 7ca62110 addu_s\.qb a0,a1,a2 +0+0014 <[^>]*> 7cc72ad0 subq\.ph a1,a2,a3 +0+0018 <[^>]*> 7ce833d0 subq_s\.ph a2,a3,t0 +0+001c <[^>]*> 7d093dd0 subq_s\.w a3,t0,t1 +0+0020 <[^>]*> 7d2a4050 subu\.qb t0,t1,t2 +0+0024 <[^>]*> 7d4b4950 subu_s\.qb t1,t2,t3 +0+0028 <[^>]*> 7d6c5410 addsc t2,t3,t4 +0+002c <[^>]*> 7d8d5c50 addwc t3,t4,t5 +0+0030 <[^>]*> 7dae6490 modsub t4,t5,t6 +0+0034 <[^>]*> 7dc06d10 raddu\.w\.qb t5,t6 +0+0038 <[^>]*> 7c0f7252 absq_s\.ph t6,t7 +0+003c <[^>]*> 7c107c52 absq_s\.w t7,s0 +0+0040 <[^>]*> 7e328311 precrq\.qb\.ph s0,s1,s2 +0+0044 <[^>]*> 7e538d11 precrq\.ph\.w s1,s2,s3 +0+0048 <[^>]*> 7e749551 precrq_rs\.ph\.w s2,s3,s4 +0+004c <[^>]*> 7e959bd1 precrqu_s\.qb\.ph s3,s4,s5 +0+0050 <[^>]*> 7c15a312 preceq\.w\.phl s4,s5 +0+0054 <[^>]*> 7c16ab52 preceq\.w\.phr s5,s6 +0+0058 <[^>]*> 7c17b112 precequ\.ph\.qbl s6,s7 +0+005c <[^>]*> 7c18b952 precequ\.ph\.qbr s7,t8 +0+0060 <[^>]*> 7c19c192 precequ\.ph\.qbla t8,t9 +0+0064 <[^>]*> 7c1ac9d2 precequ\.ph\.qbra t9,k0 +0+0068 <[^>]*> 7c1bd712 preceu\.ph\.qbl k0,k1 +0+006c <[^>]*> 7c1cdf52 preceu\.ph\.qbr k1,gp +0+0070 <[^>]*> 7c1de792 preceu\.ph\.qbla gp,sp +0+0074 <[^>]*> 7c1eefd2 preceu\.ph\.qbra sp,s8 +0+0078 <[^>]*> 7cfff013 shll\.qb s8,ra,0x7 +0+007c <[^>]*> 7c1ff013 shll\.qb s8,ra,0x0 +0+0080 <[^>]*> 7cfff013 shll\.qb s8,ra,0x7 +0+0084 <[^>]*> 7c1ff013 shll\.qb s8,ra,0x0 +0+0088 <[^>]*> 7c20f893 shllv\.qb ra,zero,at +0+008c <[^>]*> 7de10213 shll\.ph zero,at,0xf +0+0090 <[^>]*> 7c010213 shll\.ph zero,at,0x0 +0+0094 <[^>]*> 7de10213 shll\.ph zero,at,0xf +0+0098 <[^>]*> 7c010213 shll\.ph zero,at,0x0 +0+009c <[^>]*> 7c620a93 shllv\.ph at,v0,v1 +0+00a0 <[^>]*> 7de31313 shll_s\.ph v0,v1,0xf +0+00a4 <[^>]*> 7c031313 shll_s\.ph v0,v1,0x0 +0+00a8 <[^>]*> 7de31313 shll_s\.ph v0,v1,0xf +0+00ac <[^>]*> 7c031313 shll_s\.ph v0,v1,0x0 +0+00b0 <[^>]*> 7ca41b93 shllv_s\.ph v1,a0,a1 +0+00b4 <[^>]*> 7fe52513 shll_s\.w a0,a1,0x1f +0+00b8 <[^>]*> 7c052513 shll_s\.w a0,a1,0x0 +0+00bc <[^>]*> 7fe52513 shll_s\.w a0,a1,0x1f +0+00c0 <[^>]*> 7c052513 shll_s\.w a0,a1,0x0 +0+00c4 <[^>]*> 7ce62d93 shllv_s\.w a1,a2,a3 +0+00c8 <[^>]*> 7ce73053 shrl\.qb a2,a3,0x7 +0+00cc <[^>]*> 7c073053 shrl\.qb a2,a3,0x0 +0+00d0 <[^>]*> 7ce73053 shrl\.qb a2,a3,0x7 +0+00d4 <[^>]*> 7c073053 shrl\.qb a2,a3,0x0 +0+00d8 <[^>]*> 7d2838d3 shrlv\.qb a3,t0,t1 +0+00dc <[^>]*> 7de94253 shra\.ph t0,t1,0xf +0+00e0 <[^>]*> 7c094253 shra\.ph t0,t1,0x0 +0+00e4 <[^>]*> 7de94253 shra\.ph t0,t1,0xf +0+00e8 <[^>]*> 7c094253 shra\.ph t0,t1,0x0 +0+00ec <[^>]*> 7d6a4ad3 shrav\.ph t1,t2,t3 +0+00f0 <[^>]*> 7deb5353 shra_r\.ph t2,t3,0xf +0+00f4 <[^>]*> 7c0b5353 shra_r\.ph t2,t3,0x0 +0+00f8 <[^>]*> 7deb5353 shra_r\.ph t2,t3,0xf +0+00fc <[^>]*> 7c0b5353 shra_r\.ph t2,t3,0x0 +0+0100 <[^>]*> 7dac5bd3 shrav_r\.ph t3,t4,t5 +0+0104 <[^>]*> 7fed6553 shra_r\.w t4,t5,0x1f +0+0108 <[^>]*> 7c0d6553 shra_r\.w t4,t5,0x0 +0+010c <[^>]*> 7fed6553 shra_r\.w t4,t5,0x1f +0+0110 <[^>]*> 7c0d6553 shra_r\.w t4,t5,0x0 +0+0114 <[^>]*> 7dee6dd3 shrav_r\.w t5,t6,t7 +0+0118 <[^>]*> 7df07190 muleu_s\.ph\.qbl t6,t7,s0 +0+011c <[^>]*> 7e1179d0 muleu_s\.ph\.qbr t7,s0,s1 +0+0120 <[^>]*> 7e3287d0 mulq_rs\.ph s0,s1,s2 +0+0124 <[^>]*> 7e538f10 muleq_s\.w\.phl s1,s2,s3 +0+0128 <[^>]*> 7e749750 muleq_s\.w\.phr s2,s3,s4 +0+012c <[^>]*> 7e7400f0 dpau\.h\.qbl \$ac0,s3,s4 +0+0130 <[^>]*> 7e9509f0 dpau\.h\.qbr \$ac1,s4,s5 +0+0134 <[^>]*> 7eb612f0 dpsu\.h\.qbl \$ac2,s5,s6 +0+0138 <[^>]*> 7ed71bf0 dpsu\.h\.qbr \$ac3,s6,s7 +0+013c <[^>]*> 7ef80130 dpaq_s\.w\.ph \$ac0,s7,t8 +0+0140 <[^>]*> 7f190970 dpsq_s\.w\.ph \$ac1,t8,t9 +0+0144 <[^>]*> 7f3a11b0 mulsaq_s\.w\.ph \$ac2,t9,k0 +0+0148 <[^>]*> 7f5b1b30 dpaq_sa\.l\.w \$ac3,k0,k1 +0+014c <[^>]*> 7f7c0370 dpsq_sa\.l\.w \$ac0,k1,gp +0+0150 <[^>]*> 7f9d0d30 maq_s\.w\.phl \$ac1,gp,sp +0+0154 <[^>]*> 7fbe15b0 maq_s\.w\.phr \$ac2,sp,s8 +0+0158 <[^>]*> 7fdf1c30 maq_sa\.w\.phl \$ac3,s8,ra +0+015c <[^>]*> 7fe004b0 maq_sa\.w\.phr \$ac0,ra,zero +0+0160 <[^>]*> 7c0106d2 bitrev zero,at +0+0164 <[^>]*> 7c41000c insv at,v0 +0+0168 <[^>]*> 7cff1092 repl\.qb v0,0xff +0+016c <[^>]*> 7c001092 repl\.qb v0,0x0 +0+0170 <[^>]*> 7cff1092 repl\.qb v0,0xff +0+0174 <[^>]*> 7c001092 repl\.qb v0,0x0 +0+0178 <[^>]*> 7c0418d2 replv\.qb v1,a0 +0+017c <[^>]*> 7dff2292 repl\.ph a0,511 +0+0180 <[^>]*> 7e002292 repl\.ph a0,-512 +0+0184 <[^>]*> 7dff2292 repl\.ph a0,511 +0+0188 <[^>]*> 7e002292 repl\.ph a0,-512 +0+018c <[^>]*> 7c062ad2 replv\.ph a1,a2 +0+0190 <[^>]*> 7cc70011 cmpu\.eq\.qb a2,a3 +0+0194 <[^>]*> 7ce80051 cmpu\.lt\.qb a3,t0 +0+0198 <[^>]*> 7d090091 cmpu\.le\.qb t0,t1 +0+019c <[^>]*> 7d4b4911 cmpgu\.eq\.qb t1,t2,t3 +0+01a0 <[^>]*> 7d6c5151 cmpgu\.lt\.qb t2,t3,t4 +0+01a4 <[^>]*> 7d8d5991 cmpgu\.le\.qb t3,t4,t5 +0+01a8 <[^>]*> 7d8d0211 cmp\.eq\.ph t4,t5 +0+01ac <[^>]*> 7dae0251 cmp\.lt\.ph t5,t6 +0+01b0 <[^>]*> 7dcf0291 cmp\.le\.ph t6,t7 +0+01b4 <[^>]*> 7e1178d1 pick\.qb t7,s0,s1 +0+01b8 <[^>]*> 7e3282d1 pick\.ph s0,s1,s2 +0+01bc <[^>]*> 7e538b91 packrl\.ph s1,s2,s3 +0+01c0 <[^>]*> 7ff20838 extr\.w s2,\$ac1,0x1f +0+01c4 <[^>]*> 7c120838 extr\.w s2,\$ac1,0x0 +0+01c8 <[^>]*> 7ff20838 extr\.w s2,\$ac1,0x1f +0+01cc <[^>]*> 7c120838 extr\.w s2,\$ac1,0x0 +0+01d0 <[^>]*> 7ff31138 extr_r\.w s3,\$ac2,0x1f +0+01d4 <[^>]*> 7c131138 extr_r\.w s3,\$ac2,0x0 +0+01d8 <[^>]*> 7ff31138 extr_r\.w s3,\$ac2,0x1f +0+01dc <[^>]*> 7c131138 extr_r\.w s3,\$ac2,0x0 +0+01e0 <[^>]*> 7ff419b8 extr_rs\.w s4,\$ac3,0x1f +0+01e4 <[^>]*> 7c1419b8 extr_rs\.w s4,\$ac3,0x0 +0+01e8 <[^>]*> 7ff419b8 extr_rs\.w s4,\$ac3,0x1f +0+01ec <[^>]*> 7c1419b8 extr_rs\.w s4,\$ac3,0x0 +0+01f0 <[^>]*> 7ff503b8 extr_s\.h s5,\$ac0,0x1f +0+01f4 <[^>]*> 7c1503b8 extr_s\.h s5,\$ac0,0x0 +0+01f8 <[^>]*> 7ff503b8 extr_s\.h s5,\$ac0,0x1f +0+01fc <[^>]*> 7c1503b8 extr_s\.h s5,\$ac0,0x0 +0+0200 <[^>]*> 7ef60bf8 extrv_s\.h s6,\$ac1,s7 +0+0204 <[^>]*> 7f171078 extrv\.w s7,\$ac2,t8 +0+0208 <[^>]*> 7f381978 extrv_r\.w t8,\$ac3,t9 +0+020c <[^>]*> 7f5901f8 extrv_rs\.w t9,\$ac0,k0 +0+0210 <[^>]*> 7ffa08b8 extp k0,\$ac1,0x1f +0+0214 <[^>]*> 7c1a08b8 extp k0,\$ac1,0x0 +0+0218 <[^>]*> 7ffa08b8 extp k0,\$ac1,0x1f +0+021c <[^>]*> 7c1a08b8 extp k0,\$ac1,0x0 +0+0220 <[^>]*> 7f9b10f8 extpv k1,\$ac2,gp +0+0224 <[^>]*> 7ffc1ab8 extpdp gp,\$ac3,0x1f +0+0228 <[^>]*> 7c1c1ab8 extpdp gp,\$ac3,0x0 +0+022c <[^>]*> 7ffc1ab8 extpdp gp,\$ac3,0x1f +0+0230 <[^>]*> 7c1c1ab8 extpdp gp,\$ac3,0x0 +0+0234 <[^>]*> 7fdd02f8 extpdpv sp,\$ac0,s8 +0+0238 <[^>]*> 7df00eb8 shilo \$ac1,31 +0+023c <[^>]*> 7e000eb8 shilo \$ac1,-32 +0+0240 <[^>]*> 7df00eb8 shilo \$ac1,31 +0+0244 <[^>]*> 7e000eb8 shilo \$ac1,-32 +0+0248 <[^>]*> 7fc016f8 shilov \$ac2,s8 +0+024c <[^>]*> 7fe01ff8 mthlip ra,\$ac3 +0+0250 <[^>]*> 00000010 mfhi zero +0+0254 <[^>]*> 00200812 mflo at,\$ac1 +0+0258 <[^>]*> 00401011 mthi v0,\$ac2 +0+025c <[^>]*> 00601813 mtlo v1,\$ac3 +0+0260 <[^>]*> 7c81fcf8 wrdsp a0,0x3f +0+0264 <[^>]*> 7c8004f8 wrdsp a0,0x0 +0+0268 <[^>]*> 7c81fcf8 wrdsp a0,0x3f +0+026c <[^>]*> 7c8004f8 wrdsp a0,0x0 +0+0270 <[^>]*> 7cbffcf8 wrdsp a1 +0+0274 <[^>]*> 7c3f34b8 rddsp a2,0x3f +0+0278 <[^>]*> 7c0034b8 rddsp a2,0x0 +0+027c <[^>]*> 7c3f34b8 rddsp a2,0x3f +0+0280 <[^>]*> 7c0034b8 rddsp a2,0x0 +0+0284 <[^>]*> 7fff3cb8 rddsp a3 +0+0288 <[^>]*> 7d49418a lbux t0,t1\(t2\) +0+028c <[^>]*> 7d6a490a lhx t1,t2\(t3\) +0+0290 <[^>]*> 7d8b500a lwx t2,t3\(t4\) +0+0294 <[^>]*> 041cff5a bposge32 0+0000 +0+0298 <[^>]*> 00000000 nop + ... diff --git a/gas/testsuite/gas/mips/mips32-dsp.l b/gas/testsuite/gas/mips/mips32-dsp.l new file mode 100644 index 0000000000..3250bfabe9 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32-dsp.l @@ -0,0 +1,39 @@ +.*: Assembler messages: +.*:39: Warning: DSP immediate not in range 0..7 \(4294967295\) +.*:42: Warning: DSP immediate not in range 0..7 \(8\) +.*:44: Warning: DSP immediate not in range 0..15 \(4294967295\) +.*:47: Warning: DSP immediate not in range 0..15 \(16\) +.*:49: Warning: DSP immediate not in range 0..15 \(4294967295\) +.*:52: Warning: DSP immediate not in range 0..15 \(16\) +.*:54: Warning: DSP immediate not in range 0..31 \(4294967295\) +.*:57: Warning: DSP immediate not in range 0..31 \(32\) +.*:59: Warning: DSP immediate not in range 0..7 \(4294967295\) +.*:62: Warning: DSP immediate not in range 0..7 \(8\) +.*:64: Warning: DSP immediate not in range 0..15 \(4294967295\) +.*:67: Warning: DSP immediate not in range 0..15 \(16\) +.*:69: Warning: DSP immediate not in range 0..15 \(4294967295\) +.*:72: Warning: DSP immediate not in range 0..15 \(16\) +.*:74: Warning: DSP immediate not in range 0..31 \(4294967295\) +.*:77: Warning: DSP immediate not in range 0..31 \(32\) +.*:99: Warning: DSP immediate not in range 0..255 \(4294967295\) +.*:102: Warning: DSP immediate not in range 0..255 \(256\) +.*:104: Warning: DSP immediate not in range -512..511 \(-513\) +.*:107: Warning: DSP immediate not in range -512..511 \(512\) +.*:121: Warning: DSP immediate not in range 0..31 \(4294967295\) +.*:124: Warning: DSP immediate not in range 0..31 \(32\) +.*:125: Warning: DSP immediate not in range 0..31 \(4294967295\) +.*:128: Warning: DSP immediate not in range 0..31 \(32\) +.*:129: Warning: DSP immediate not in range 0..31 \(4294967295\) +.*:132: Warning: DSP immediate not in range 0..31 \(32\) +.*:133: Warning: DSP immediate not in range 0..31 \(4294967295\) +.*:136: Warning: DSP immediate not in range 0..31 \(32\) +.*:141: Warning: DSP immediate not in range 0..31 \(4294967295\) +.*:144: Warning: DSP immediate not in range 0..31 \(32\) +.*:146: Warning: DSP immediate not in range 0..31 \(4294967295\) +.*:149: Warning: DSP immediate not in range 0..31 \(32\) +.*:151: Warning: DSP immediate not in range -32..31 \(-33\) +.*:154: Warning: DSP immediate not in range -32..31 \(32\) +.*:161: Warning: DSP immediate not in range 0..63 \(4294967295\) +.*:164: Warning: DSP immediate not in range 0..63 \(64\) +.*:166: Warning: DSP immediate not in range 0..63 \(4294967295\) +.*:169: Warning: DSP immediate not in range 0..63 \(64\) diff --git a/gas/testsuite/gas/mips/mips32-dsp.s b/gas/testsuite/gas/mips/mips32-dsp.s new file mode 100644 index 0000000000..aa818ce851 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32-dsp.s @@ -0,0 +1,178 @@ +# source file to test assembly of MIPS DSP ASE for MIPS32 instructions + + .set noreorder + .set noat + + .text +text_label: + + addq.ph $0,$1,$2 + addq_s.ph $1,$2,$3 + addq_s.w $2,$3,$4 + addu.qb $3,$4,$5 + addu_s.qb $4,$5,$6 + subq.ph $5,$6,$7 + subq_s.ph $6,$7,$8 + subq_s.w $7,$8,$9 + subu.qb $8,$9,$10 + subu_s.qb $9,$10,$11 + addsc $10,$11,$12 + addwc $11,$12,$13 + modsub $12,$13,$14 + raddu.w.qb $13,$14 + absq_s.ph $14,$15 + absq_s.w $15,$16 + precrq.qb.ph $16,$17,$18 + precrq.ph.w $17,$18,$19 + precrq_rs.ph.w $18,$19,$20 + precrqu_s.qb.ph $19,$20,$21 + preceq.w.phl $20,$21 + preceq.w.phr $21,$22 + precequ.ph.qbl $22,$23 + precequ.ph.qbr $23,$24 + precequ.ph.qbla $24,$25 + precequ.ph.qbra $25,$26 + preceu.ph.qbl $26,$27 + preceu.ph.qbr $27,$28 + preceu.ph.qbla $28,$29 + preceu.ph.qbra $29,$30 + shll.qb $30,$31,-1 + shll.qb $30,$31,0 + shll.qb $30,$31,7 + shll.qb $30,$31,8 + shllv.qb $31,$0,$1 + shll.ph $0,$1,-1 + shll.ph $0,$1,0 + shll.ph $0,$1,15 + shll.ph $0,$1,16 + shllv.ph $1,$2,$3 + shll_s.ph $2,$3,-1 + shll_s.ph $2,$3,0 + shll_s.ph $2,$3,15 + shll_s.ph $2,$3,16 + shllv_s.ph $3,$4,$5 + shll_s.w $4,$5,-1 + shll_s.w $4,$5,0 + shll_s.w $4,$5,31 + shll_s.w $4,$5,32 + shllv_s.w $5,$6,$7 + shrl.qb $6,$7,-1 + shrl.qb $6,$7,0 + shrl.qb $6,$7,7 + shrl.qb $6,$7,8 + shrlv.qb $7,$8,$9 + shra.ph $8,$9,-1 + shra.ph $8,$9,0 + shra.ph $8,$9,15 + shra.ph $8,$9,16 + shrav.ph $9,$10,$11 + shra_r.ph $10,$11,-1 + shra_r.ph $10,$11,0 + shra_r.ph $10,$11,15 + shra_r.ph $10,$11,16 + shrav_r.ph $11,$12,$13 + shra_r.w $12,$13,-1 + shra_r.w $12,$13,0 + shra_r.w $12,$13,31 + shra_r.w $12,$13,32 + shrav_r.w $13,$14,$15 + muleu_s.ph.qbl $14,$15,$16 + muleu_s.ph.qbr $15,$16,$17 + mulq_rs.ph $16,$17,$18 + muleq_s.w.phl $17,$18,$19 + muleq_s.w.phr $18,$19,$20 + dpau.h.qbl $ac0,$19,$20 + dpau.h.qbr $ac1,$20,$21 + dpsu.h.qbl $ac2,$21,$22 + dpsu.h.qbr $ac3,$22,$23 + dpaq_s.w.ph $ac0,$23,$24 + dpsq_s.w.ph $ac1,$24,$25 + mulsaq_s.w.ph $ac2,$25,$26 + dpaq_sa.l.w $ac3,$26,$27 + dpsq_sa.l.w $ac0,$27,$28 + maq_s.w.phl $ac1,$28,$29 + maq_s.w.phr $ac2,$29,$30 + maq_sa.w.phl $ac3,$30,$31 + maq_sa.w.phr $ac0,$31,$0 + bitrev $0,$1 + insv $1,$2 + repl.qb $2,-1 + repl.qb $2,0 + repl.qb $2,255 + repl.qb $2,256 + replv.qb $3,$4 + repl.ph $4,-513 + repl.ph $4,-512 + repl.ph $4,511 + repl.ph $4,512 + replv.ph $5,$6 + cmpu.eq.qb $6,$7 + cmpu.lt.qb $7,$8 + cmpu.le.qb $8,$9 + cmpgu.eq.qb $9,$10,$11 + cmpgu.lt.qb $10,$11,$12 + cmpgu.le.qb $11,$12,$13 + cmp.eq.ph $12,$13 + cmp.lt.ph $13,$14 + cmp.le.ph $14,$15 + pick.qb $15,$16,$17 + pick.ph $16,$17,$18 + packrl.ph $17,$18,$19 + extr.w $18,$ac1,-1 + extr.w $18,$ac1,0 + extr.w $18,$ac1,31 + extr.w $18,$ac1,32 + extr_r.w $19,$ac2,-1 + extr_r.w $19,$ac2,0 + extr_r.w $19,$ac2,31 + extr_r.w $19,$ac2,32 + extr_rs.w $20,$ac3,-1 + extr_rs.w $20,$ac3,0 + extr_rs.w $20,$ac3,31 + extr_rs.w $20,$ac3,32 + extr_s.h $21,$ac0,-1 + extr_s.h $21,$ac0,0 + extr_s.h $21,$ac0,31 + extr_s.h $21,$ac0,32 + extrv_s.h $22,$ac1,$23 + extrv.w $23,$ac2,$24 + extrv_r.w $24,$ac3,$25 + extrv_rs.w $25,$ac0,$26 + extp $26,$ac1,-1 + extp $26,$ac1,0 + extp $26,$ac1,31 + extp $26,$ac1,32 + extpv $27,$ac2,$28 + extpdp $28,$ac3,-1 + extpdp $28,$ac3,0 + extpdp $28,$ac3,31 + extpdp $28,$ac3,32 + extpdpv $29,$ac0,$30 + shilo $ac1,-33 + shilo $ac1,-32 + shilo $ac1,31 + shilo $ac1,32 + shilov $ac2,$30 + mthlip $31,$ac3 + mfhi $0,$ac0 + mflo $1,$ac1 + mthi $2,$ac2 + mtlo $3,$ac3 + wrdsp $4,-1 + wrdsp $4,0 + wrdsp $4,63 + wrdsp $4,64 + wrdsp $5 + rddsp $6,-1 + rddsp $6,0 + rddsp $6,63 + rddsp $6,64 + rddsp $7 + lbux $8,$9($10) + lhx $9,$10($11) + lwx $10,$11($12) + bposge32 text_label + nop + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8