[ gas/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c (mips_ip): Capitalize first word of existing condition code warning, and add condition code warnings for .ps instructions, and for bc1any[24][tf]. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * lib/gas-defs.exp (run_dump_test): If stderr file is specified and there was no stderr output, compare anyway (i.e., cause a test failure). * gas/mips/mips64-mips3d.s: Add some new instructions to test warnings. * gas/mips/mips64-mips3d.l: New file. * gas/mips/mips64-mips3d.d: Use mips64-mips3d.l, and update for changes to mips64-mips3d.s. * gas/mips/mips64-mips3d-incl.d: Likewise. * gas/mips/set-arch.l: New file. * gas/mips/set-arch.d: Specify set-arch.l as stderr output to check. * gas/mips/mips5.l: Make error messages match source.
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@ -1,3 +1,9 @@
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2003-09-30 Chris Demetriou <cgd@broadcom.com>
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* config/tc-mips.c (mips_ip): Capitalize first word of
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existing condition code warning, and add condition code
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warnings for .ps instructions, and for bc1any[24][tf].
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2003-09-30 Chris Demetriou <cgd@broadcom.com>
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* NEWS: Mention support for MIPS64 Release 2.
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@ -9369,7 +9369,18 @@ do_msbd:
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}
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while (ISDIGIT (*s));
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if (regno > 7)
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as_bad (_("invalid condition code register $fcc%d"), regno);
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as_bad (_("Invalid condition code register $fcc%d"), regno);
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if ((strcmp(str + strlen(str) - 3, ".ps") == 0
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|| strcmp(str + strlen(str) - 5, "any2f") == 0
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|| strcmp(str + strlen(str) - 5, "any2t") == 0)
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&& (regno & 1) != 0)
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as_warn(_("Condition code register should be even for %s, was %d"),
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str, regno);
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if ((strcmp(str + strlen(str) - 5, "any4f") == 0
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|| strcmp(str + strlen(str) - 5, "any4t") == 0)
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&& (regno & 3) != 0)
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as_warn(_("Condition code register should be 0 or 4 for %s, was %d"),
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str, regno);
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if (*args == 'N')
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ip->insn_opcode |= regno << OP_SH_BCC;
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else
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@ -1,3 +1,17 @@
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2003-09-30 Chris Demetriou <cgd@broadcom.com>
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* lib/gas-defs.exp (run_dump_test): If stderr file is specified
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and there was no stderr output, compare anyway (i.e., cause a
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test failure).
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* gas/mips/mips64-mips3d.s: Add some new instructions to test warnings.
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* gas/mips/mips64-mips3d.l: New file.
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* gas/mips/mips64-mips3d.d: Use mips64-mips3d.l, and update for
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changes to mips64-mips3d.s.
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* gas/mips/mips64-mips3d-incl.d: Likewise.
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* gas/mips/set-arch.l: New file.
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* gas/mips/set-arch.d: Specify set-arch.l as stderr output to check.
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* gas/mips/mips5.l: Make error messages match source.
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2003-09-30 Chris Demetriou <cgd@broadcom.com>
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* gas/mips/cp0-names-mips64r2.d: New file.
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@ -1,3 +1,3 @@
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.*: Assembler messages:
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.*:61: Warning: Condition flag should be even for c.eq.ps, was 3
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.*:62: Warning: Condition flag should be even for movf.ps, was 3
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.*:61: Warning: Condition code register should be even for c.eq.ps, was 3
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.*:62: Warning: Condition code register should be even for movf.ps, was 3
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@ -1,6 +1,7 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS MIPS64 MIPS-3D ASE instructions
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#source: mips64-mips3d.s
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#stderr: mips64-mips3d.l
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# Check MIPS64 MIPS-3D ASE instruction assembly and disassembly
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# Same as mips64-mips3d.d, but does not need -mips3d assembler
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@ -137,4 +138,12 @@ Disassembly of section .text:
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0+01f4 <[^>]*> 4633411f rsqrt2\.d \$f4,\$f8,\$f19
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0+01f8 <[^>]*> 4613411f rsqrt2\.s \$f4,\$f8,\$f19
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0+01fc <[^>]*> 46d3411f rsqrt2\.ps \$f4,\$f8,\$f19
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0+0200 <[^>]*> 4524ff7f bc1any2f \$fcc1,0+0000 <text_label>
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0+0204 <[^>]*> 00000000 nop
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0+0208 <[^>]*> 452dff7d bc1any2t \$fcc3,0+0000 <text_label>
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0+020c <[^>]*> 00000000 nop
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0+0210 <[^>]*> 4544ff7b bc1any4f \$fcc1,0+0000 <text_label>
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0+0214 <[^>]*> 00000000 nop
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0+0218 <[^>]*> 4549ff79 bc1any4t \$fcc2,0+0000 <text_label>
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0+021c <[^>]*> 00000000 nop
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\.\.\.
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@ -1,6 +1,7 @@
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#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa64
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#name: MIPS MIPS64 MIPS-3D ASE instructions (-mips3d flag)
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#as: -mips64 -mips3d
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#stderr: mips64-mips3d.l
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# Check MIPS64 MIPS-3D ASE instruction assembly and disassembly
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@ -135,4 +136,12 @@ Disassembly of section .text:
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0+01f4 <[^>]*> 4633411f rsqrt2\.d \$f4,\$f8,\$f19
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0+01f8 <[^>]*> 4613411f rsqrt2\.s \$f4,\$f8,\$f19
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0+01fc <[^>]*> 46d3411f rsqrt2\.ps \$f4,\$f8,\$f19
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0+0200 <[^>]*> 4524ff7f bc1any2f \$fcc1,0+0000 <text_label>
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0+0204 <[^>]*> 00000000 nop
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0+0208 <[^>]*> 452dff7d bc1any2t \$fcc3,0+0000 <text_label>
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0+020c <[^>]*> 00000000 nop
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0+0210 <[^>]*> 4544ff7b bc1any4f \$fcc1,0+0000 <text_label>
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0+0214 <[^>]*> 00000000 nop
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0+0218 <[^>]*> 4549ff79 bc1any4t \$fcc2,0+0000 <text_label>
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0+021c <[^>]*> 00000000 nop
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\.\.\.
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5
gas/testsuite/gas/mips/mips64-mips3d.l
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5
gas/testsuite/gas/mips/mips64-mips3d.l
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@ -0,0 +1,5 @@
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.*: Assembler messages:
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.*:150: Warning: Condition code register should be even for bc1any2f, was 1
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.*:152: Warning: Condition code register should be even for bc1any2t, was 3
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.*:154: Warning: Condition code register should be 0 or 4 for bc1any4f, was 1
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.*:156: Warning: Condition code register should be 0 or 4 for bc1any4t, was 2
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@ -147,5 +147,14 @@ text_label:
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rsqrt2.s $f4, $f8, $f19
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rsqrt2.ps $f4, $f8, $f19
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bc1any2f $fcc1, text_label # warns
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nop
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bc1any2t $fcc3, text_label # warns
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nop
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bc1any4f $fcc1, text_label # warns
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nop
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bc1any4t $fcc2, text_label # warns
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nop
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# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
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.space 8
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@ -1,5 +1,6 @@
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#objdump: -dr --prefix-addresses --show-raw-insn -mmips:sb1 -M gpr-names=32
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#name: .set arch=FOO
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#stderr: set-arch.l
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dump\.o: file format .*mips
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3
gas/testsuite/gas/mips/set-arch.l
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3
gas/testsuite/gas/mips/set-arch.l
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@ -0,0 +1,3 @@
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.*: Assembler messages:
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.*:146: Warning: Condition code register should be even for c.eq.ps, was 3
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.*:147: Warning: Condition code register should be even for movf.ps, was 3
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@ -411,7 +411,7 @@ proc run_dump_test { name {extra_options {}} } {
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catch "exec $srcdir/lib/run $AS $ASFLAGS $opts(as) -o dump.o $sourcefile" comp_output
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set comp_output [prune_warnings $comp_output]
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if ![string match "" $comp_output] then {
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if { ![string match "" $comp_output] || $opts(stderr) != "" } then {
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if { $opts(stderr) == "" } then {
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send_log "$comp_output\n"
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verbose "$comp_output" 3
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