* config/tc-openrisc.c (openrisc_relax_frag): Delete unused function.

* config/tc-sparc.c (sparc_ip): Make op_exp static to silence warnings.
	* config/tc-tic80.c (build_insn): Init insn[1] to silence warning.
This commit is contained in:
Alan Modra 2005-02-18 00:49:03 +00:00
parent 3d228ef83a
commit 30eb9c17b2
4 changed files with 9 additions and 45 deletions

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@ -1,3 +1,9 @@
2005-02-18 Alan Modra <amodra@bigpond.net.au>
* config/tc-openrisc.c (openrisc_relax_frag): Delete unused function.
* config/tc-sparc.c (sparc_ip): Make op_exp static to silence warnings.
* config/tc-tic80.c (build_insn): Init insn[1] to silence warning.
2005-02-17 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention "-mhint.b=[ok|warning|error]".

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@ -1,5 +1,5 @@
/* tc-openrisc.c -- Assembler for the OpenRISC family.
Copyright 2001, 2002, 2003 Free Software Foundation.
Copyright 2001, 2002, 2003, 2005 Free Software Foundation.
Contributed by Johan Rydberg, jrydberg@opencores.org
This file is part of GAS, the GNU Assembler.
@ -211,49 +211,6 @@ const relax_typeS md_relax_table[] =
{0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
};
long
openrisc_relax_frag (segment, fragP, stretch)
segT segment;
fragS * fragP;
long stretch;
{
/* Address of branch insn. */
long address = fragP->fr_address + fragP->fr_fix - 2;
long growth = 0;
/* Keep 32 bit insns aligned on 32 bit boundaries. */
if (fragP->fr_subtype == 2)
{
if ((address & 3) != 0)
{
fragP->fr_subtype = 3;
growth = 2;
}
}
else if (fragP->fr_subtype == 3)
{
if ((address & 3) == 0)
{
fragP->fr_subtype = 2;
growth = -2;
}
}
else
{
growth = relax_frag (segment, fragP, stretch);
/* Long jump on odd halfword boundary? */
if (fragP->fr_subtype == 2 && (address & 3) != 0)
{
fragP->fr_subtype = 3;
growth += 2;
}
}
return growth;
}
/* Return an initial guess of the length by which a fragment must grow to
hold a branch to reach its destination.
Also updates fr_type/fr_subtype as necessary.

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@ -2231,7 +2231,7 @@ sparc_ip (str, pinsn)
{
char *s1;
char *op_arg = NULL;
expressionS op_exp;
static expressionS op_exp;
bfd_reloc_code_real_type old_reloc = the_insn.reloc;
/* Check for %hi, etc. */

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@ -490,6 +490,7 @@ build_insn (opcode, opers)
/* Start with the raw opcode bits from the opcode table. */
insn[0] = opcode->opcode;
insn[1] = 0;
/* We are going to insert at least one 32 bit opcode so get the
frag now. */