Update description of AArch64 assembler directives.
gas * doc/c-aarch64.texi (AArch64 Directives): Add descriptions of .cpu, .dword, .even, .inst. .tlsdescadd, .tlsdesccall, .tlsdescldr and .xword directives.
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@ -1,5 +1,9 @@
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2016-03-18 Nick Clifton <nickc@redhat.com>
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2016-03-18 Nick Clifton <nickc@redhat.com>
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* doc/c-aarch64.texi (AArch64 Directives): Add descriptions of
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.cpu, .dword, .even, .inst. .tlsdescadd, .tlsdesccall,
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.tlsdescldr and .xword directives.
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PR target/19721
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PR target/19721
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* testsuite/gas/aarch64/pr19721.s: New test source file.
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* testsuite/gas/aarch64/pr19721.s: New test source file.
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* testsuite/gas/aarch64/pr19721.d: New test driver file.
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* testsuite/gas/aarch64/pr19721.d: New test driver file.
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@ -273,12 +273,35 @@ incrementally to the architecture being compiled for.
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This directive switches to the @code{.bss} section.
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This directive switches to the @code{.bss} section.
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@c CCCCCCCCCCCCCCCCCCCCCCCCCC
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@c CCCCCCCCCCCCCCCCCCCCCCCCCC
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@cindex @code{.cpu} directive, AArch64
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@item .cpu @var{name}
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Set the target processor. Valid values for @var{name} are the same as
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those accepted by the @option{-mcpu=} command line option.
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@c DDDDDDDDDDDDDDDDDDDDDDDDDD
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@c DDDDDDDDDDDDDDDDDDDDDDDDDD
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@cindex @code{.dword} directive, AArch64
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@item .dword @var{expressions}
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The @code{.dword} directive produces 64 bit values.
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@c EEEEEEEEEEEEEEEEEEEEEEEEEE
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@c EEEEEEEEEEEEEEEEEEEEEEEEEE
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@cindex @code{.even} directive, AArch64
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@item .even
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The @code{.even} directive aligns the output on the next even byte
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boundary.
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@c FFFFFFFFFFFFFFFFFFFFFFFFFF
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@c FFFFFFFFFFFFFFFFFFFFFFFFFF
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@c GGGGGGGGGGGGGGGGGGGGGGGGGG
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@c GGGGGGGGGGGGGGGGGGGGGGGGGG
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@c HHHHHHHHHHHHHHHHHHHHHHHHHH
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@c HHHHHHHHHHHHHHHHHHHHHHHHHH
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@c IIIIIIIIIIIIIIIIIIIIIIIIII
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@c IIIIIIIIIIIIIIIIIIIIIIIIII
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@cindex @code{.inst} directive, AArch64
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@item .inst @var{expressions}
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Inserts the expressions into the output as if they were instructions,
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rather than data.
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@c JJJJJJJJJJJJJJJJJJJJJJJJJJ
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@c JJJJJJJJJJJJJJJJJJJJJJJJJJ
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@c KKKKKKKKKKKKKKKKKKKKKKKKKK
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@c KKKKKKKKKKKKKKKKKKKKKKKKKK
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@c LLLLLLLLLLLLLLLLLLLLLLLLLL
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@c LLLLLLLLLLLLLLLLLLLLLLLLLL
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@ -324,6 +347,18 @@ example:
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@c TTTTTTTTTTTTTTTTTTTTTTTTTT
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@c TTTTTTTTTTTTTTTTTTTTTTTTTT
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@cindex @code{.tlsdescadd} directive, AArch64
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@item @code{.tlsdescadd}
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Emits a TLSDESC_ADD reloc on the next instruction.
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@cindex @code{.tlsdesccall} directive, AArch64
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@item @code{.tlsdesccall}
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Emits a TLSDESC_CALL reloc on the next instruction.
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@cindex @code{.tlsdescldr} directive, AArch64
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@item @code{.tlsdescldr}
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Emits a TLSDESC_LDR reloc on the next instruction.
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@c UUUUUUUUUUUUUUUUUUUUUUUUUU
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@c UUUUUUUUUUUUUUUUUUUUUUUUUU
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@cindex @code{.unreq} directive, AArch64
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@cindex @code{.unreq} directive, AArch64
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@ -344,12 +379,14 @@ should only be done if it is really necessary.
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@c WWWWWWWWWWWWWWWWWWWWWWWWWW
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@c WWWWWWWWWWWWWWWWWWWWWWWWWW
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@c XXXXXXXXXXXXXXXXXXXXXXXXXX
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@c XXXXXXXXXXXXXXXXXXXXXXXXXX
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@c YYYYYYYYYYYYYYYYYYYYYYYYYY
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@c ZZZZZZZZZZZZZZZZZZZZZZZZZZ
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@cindex @code{.xword} directive, AArch64
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@cindex @code{.xword} directive, AArch64
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@item .xword
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@item .xword @var{expressions}
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The @code{.xword} directive produces 64 bit values.
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The @code{.xword} directive produces 64 bit values. This is the same
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as the @code{.dword} directive.
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@c YYYYYYYYYYYYYYYYYYYYYYYYYY
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@c ZZZZZZZZZZZZZZZZZZZZZZZZZZ
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@end table
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@end table
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