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sim: microblaze: switch to common sim_resume/sim_stop_reason 

This allows us to use the common code for all exception handling.
This commit is contained in:
Mike Frysinger 2015-06-09 16:10:49 +08:00
parent 198c808c87
commit 31557eccb2
4 changed files with 27 additions and 28 deletions
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10
sim/microblaze/ChangeLog
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@ -1,3 +1,13 @@
2015-06-11 Mike Frysinger <vapier@gentoo.org>
* Makefile.in (SIM_OBJS): Add sim-resume.o.
* interp.c (sim_resume): rename to ...
(sim_engine_run): ... this. Change CPU.exception setting to
sim_engine_halt calls. Change do/while to while(1). Call
sim_events_process when sim_events_tick is true.
(sim_stop_reason): Delete.
* sim-main.h (microblaze_regset): Delete exception member.
2015-04-18 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (SIM_CPU): Delete.

1
sim/microblaze/Makefile.in
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@ -22,6 +22,7 @@ SIM_OBJS = \
$(SIM_NEW_COMMON_OBJS) \
sim-hload.o \
sim-reason.o \
sim-resume.o \
sim-stop.o
## COMMON_POST_CONFIG_FRAG

43
sim/microblaze/interp.c
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@ -110,7 +110,10 @@ set_initial_gprs (SIM_CPU *cpu)
static int tracing = 0;
void
sim_resume (SIM_DESC sd, int step, int siggnal)
sim_engine_run (SIM_DESC sd,
int next_cpu_nr, /* ignore */
int nr_cpus, /* ignore */
int siggnal) /* ignore */
{
SIM_CPU *cpu = STATE_CPU (sd, 0);
int needfetch;
@ -132,13 +135,11 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
short num_delay_slot; /* UNUSED except as reqd parameter */
enum microblaze_instr_type insn_type;
CPU.exception = step ? SIGTRAP : 0;
memops = 0;
bonus_cycles = 0;
insts = 0;
do
while (1)
{
/* Fetch the initial instructions that we'll decode. */
inst = MEM_RD_WORD (PC & 0xFFFFFFFC);
@ -161,12 +162,12 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
delay_slot_enable = 0;
branch_taken = 0;
if (op == microblaze_brk)
CPU.exception = SIGTRAP;
sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP);
else if (inst == MICROBLAZE_HALT_INST)
{
CPU.exception = SIGQUIT;
insts += 1;
bonus_cycles++;
sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_exited, RETREG);
}
else
{
@ -180,7 +181,8 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
#undef INSTRUCTION
default:
CPU.exception = SIGILL;
sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_signalled,
SIM_SIGILL);
fprintf (stderr, "ERROR: Unknown opcode\n");
}
/* Make R0 consistent */
@ -238,7 +240,8 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
if (STATE_VERBOSE_P (sd))
fprintf (stderr, "Cannot have branch or return instructions "
"in delay slot (at address 0x%x)\n", PC);
CPU.exception = SIGILL;
sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_signalled,
SIM_SIGILL);
}
else
{
@ -252,7 +255,8 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
#undef INSTRUCTION
default:
CPU.exception = SIGILL;
sim_engine_halt (sd, NULL, NULL, NULL_CIA,
sim_signalled, SIM_SIGILL);
fprintf (stderr, "ERROR: Unknown opcode at 0x%x\n", PC);
}
/* Update cycle counts */
@ -287,8 +291,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
if (tracing)
fprintf (stderr, "\n");
if (sim_events_tick (sd))
sim_events_process (sd);
}
while (!CPU.exception);
/* Hide away the things we've cached while executing. */
/* CPU.pc = pc; */
@ -348,23 +354,6 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
return 0;
}
void
sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
{
SIM_CPU *cpu = STATE_CPU (sd, 0);
if (CPU.exception == SIGQUIT)
{
*reason = sim_exited;
*sigrc = RETREG;
}
else
{
*reason = sim_stopped;
*sigrc = CPU.exception;
}
}
void
sim_info (SIM_DESC sd, int verbose)
{

1
sim/microblaze/sim-main.h
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@ -39,7 +39,6 @@
word spregs[2]; /* pc + msr */
int cycles;
int insts;
int exception;
ubyte imm_enable;
half imm_high;
};