PR ld/15787
* elf32-arm.c (elf32_arm_final_link_relocate): Base SB on the output section VMA. * ld-arm/group-relocs-alu-bad-2.d; New. * ld-arm/group-relocs-alu-bad-2.s: New. * ld-arm/group-relocs-ldc-bad-2.d: New. * ld-arm/group-relocs-ldc-bad-2.s: New. * ld-arm/group-relocs-ldr-bad-2.d: New. * ld-arm/group-relocs-ldr-bad-2.s: New. * ld-arm/group-relocs-ldrs-bad-2.d: New. * ld-arm/group-relocs-ldrs-bad-2: New. * ld-arm/arm-elf.exp: Add the new tests. * ld-arm/group-relocs-ldr-bad.d: Update expected output. * ld-arm/group-relocs-ldr-bad.s: Likewise. * ld-arm/group-relocs-ldrs-bad.d: Likewise. * ld-arm/group-relocs-ldrs-bad.s: Likewise. * ld-arm/group-relocs.d: Likewise. * ld-arm/group-relocs.s: Likewise.
This commit is contained in:
parent
16f92dd4d4
commit
31a91d61f9
@ -1,3 +1,9 @@
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2013-07-31 John Tytgat <john@bass-software.com>
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PR ld/15787
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* elf32-arm.c (elf32_arm_final_link_relocate): Base SB on the
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output section VMA.
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2013-07-28 Maciej W. Rozycki <macro@linux-mips.org>
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* elf64-hppa.c (elf64_hppa_finish_dynamic_sections)
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@ -9852,10 +9852,8 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
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bfd_vma pc = input_section->output_section->vma
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+ input_section->output_offset + rel->r_offset;
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/* sb should be the origin of the *segment* containing the symbol.
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It is not clear how to obtain this OS-dependent value, so we
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make an arbitrary choice of zero. */
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bfd_vma sb = 0;
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/* sb is the origin of the *segment* containing the symbol. */
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bfd_vma sb = sym_sec->output_section->vma;
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bfd_vma residual;
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bfd_vma g_n;
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bfd_signed_vma signed_value;
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@ -9988,7 +9986,8 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
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bfd_vma pc = input_section->output_section->vma
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+ input_section->output_offset + rel->r_offset;
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bfd_vma sb = 0; /* See note above. */
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/* sb is the origin of the *segment* containing the symbol. */
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bfd_vma sb = sym_sec->output_section->vma;
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bfd_vma residual;
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bfd_signed_vma signed_value;
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int group = 0;
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@ -10071,7 +10070,8 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
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bfd_vma pc = input_section->output_section->vma
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+ input_section->output_offset + rel->r_offset;
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bfd_vma sb = 0; /* See note above. */
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/* sb is the origin of the *segment* containing the symbol. */
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bfd_vma sb = sym_sec->output_section->vma;
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bfd_vma residual;
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bfd_signed_vma signed_value;
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int group = 0;
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@ -10154,7 +10154,8 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
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bfd_vma pc = input_section->output_section->vma
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+ input_section->output_offset + rel->r_offset;
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bfd_vma sb = 0; /* See note above. */
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/* sb is the origin of the *segment* containing the symbol. */
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bfd_vma sb = sym_sec->output_section->vma;
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bfd_vma residual;
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bfd_signed_vma signed_value;
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int group = 0;
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@ -1,3 +1,22 @@
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2013-07-31 John Tytgat <john@bass-software.com>
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PR ld/15787
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* ld-arm/group-relocs-alu-bad-2.d; New.
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* ld-arm/group-relocs-alu-bad-2.s: New.
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* ld-arm/group-relocs-ldc-bad-2.d: New.
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* ld-arm/group-relocs-ldc-bad-2.s: New.
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* ld-arm/group-relocs-ldr-bad-2.d: New.
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* ld-arm/group-relocs-ldr-bad-2.s: New.
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* ld-arm/group-relocs-ldrs-bad-2.d: New.
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* ld-arm/group-relocs-ldrs-bad-2: New.
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* ld-arm/arm-elf.exp: Add the new tests.
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* ld-arm/group-relocs-ldr-bad.d: Update expected output.
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* ld-arm/group-relocs-ldr-bad.s: Likewise.
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* ld-arm/group-relocs-ldrs-bad.d: Likewise.
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* ld-arm/group-relocs-ldrs-bad.s: Likewise.
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* ld-arm/group-relocs.d: Likewise.
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* ld-arm/group-relocs.s: Likewise.
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2013-07-27 Maciej W. Rozycki <macro@linux-mips.org>
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* ld-vax-elf/export-class-call.dd: New test.
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@ -67,7 +67,7 @@ if { ![is_elf_format] || ![istarget "arm*-*-*"] } {
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# readelf: Apply readelf options on result. Compare with regex (last arg).
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set armelftests_common {
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{"Group relocations" "-Ttext 0x8000 --section-start zero=0x0 --section-start alpha=0xeef0 --section-start beta=0xffeef0" "" "" {group-relocs.s}
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{"Group relocations" "-Ttext 0x8000 -Tdata 0x3000000 --section-start alpha=0xeef0 --section-start beta=0xffeef0" "" "" {group-relocs.s}
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{{objdump -dr group-relocs.d}}
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"group-relocs"}
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{"Indirect cross-library function reference (set-up)"
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@ -464,9 +464,13 @@ if { ![istarget "arm*-*-nacl*"] } {
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}
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run_dump_test "group-relocs-alu-bad"
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run_dump_test "group-relocs-alu-bad-2"
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run_dump_test "group-relocs-ldr-bad"
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run_dump_test "group-relocs-ldr-bad-2"
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run_dump_test "group-relocs-ldrs-bad"
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run_dump_test "group-relocs-ldrs-bad-2"
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run_dump_test "group-relocs-ldc-bad"
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run_dump_test "group-relocs-ldc-bad-2"
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run_dump_test "thumb2-bl-undefweak"
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run_dump_test "thumb2-bl-undefweak1"
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run_dump_test "emit-relocs1"
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4
ld/testsuite/ld-arm/group-relocs-alu-bad-2.d
Normal file
4
ld/testsuite/ld-arm/group-relocs-alu-bad-2.d
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@ -0,0 +1,4 @@
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#name: ALU group relocations failure test
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#source: group-relocs-alu-bad-2.s
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#ld: -Ttext 0x8000 --section-start foo=0x1208000
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#error: Overflow whilst splitting 0x1234 for group relocation
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ld/testsuite/ld-arm/group-relocs-alu-bad-2.s
Normal file
16
ld/testsuite/ld-arm/group-relocs-alu-bad-2.s
Normal file
@ -0,0 +1,16 @@
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@ Test intended to fail for ALU group relocations.
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@ We will place .text at 0x8000.
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.text
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.globl _start
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_start:
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add r0, r0, #:sb_g0:(bar)
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@ We will place the section foo at 0x1208000 but that should be irrelevant
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@ for sb_g* relocations.
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.section foo
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.set bar,foo + 0x1234
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4
ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d
Normal file
4
ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d
Normal file
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#name: LDC group relocations failure test
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#source: group-relocs-ldc-bad-2.s
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#ld: -Ttext 0x8000 --section-start foo=0x118400
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#error: Overflow whilst splitting 0x123456 for group relocation
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17
ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s
Normal file
17
ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s
Normal file
@ -0,0 +1,17 @@
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@ Test intended to fail for LDC group relocations.
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@ We will place .text at 0x8000.
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.text
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.globl _start
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_start:
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add r0, r0, #:sb_g0_nc:(bar)
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ldc 0, c0, [r0, #:sb_g1:(bar)]
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@ We will place the section foo at 0x118400 but that should be irrelevant
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@ for sb_g* relocations.
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.section foo
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.set bar,foo + 0x123456
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4
ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d
Normal file
4
ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d
Normal file
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#name: LDR group relocations failure test
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#source: group-relocs-ldr-bad-2.s
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#ld: -Ttext 0x8000 --section-start foo=0x8001000
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#error: .*Overflow whilst splitting 0x123456 for group relocation.*
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ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s
Normal file
17
ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s
Normal file
@ -0,0 +1,17 @@
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@ Test intended to fail for LDR group relocations.
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@ We will place .text at 0x8000.
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.text
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.globl _start
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_start:
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add r0, r0, #:sb_g0_nc:(bar)
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ldr r1, [r0, #:sb_g1:(bar)]
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@ We will place the section foo at 0x8001000 but that should be irrelevant
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@ for sb_g* relocations.
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.section foo
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.set bar,foo + 0x123456
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@ -1,4 +1,4 @@
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#name: LDR group relocations failure test
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#source: group-relocs-ldr-bad.s
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#ld: -Ttext 0x8000 --section-start foo=0x8001000
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#error: .*Overflow whilst splitting 0x8001000 for group relocation.*
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#error: .*Overflow whilst splitting 0x7ff9000 for group relocation.*
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@ -6,8 +6,8 @@
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.globl _start
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_start:
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add r0, r0, #:sb_g0_nc:(bar)
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ldr r1, [r0, #:sb_g1:(bar)]
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add r0, r0, #:pc_g0_nc:(bar)
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ldr r1, [r0, #:pc_g1:(bar + 4)]
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@ We will place the section foo at 0x8001000.
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4
ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d
Normal file
4
ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d
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#name: LDRS group relocations failure test
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#source: group-relocs-ldrs-bad-2.s
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#ld: -Ttext 0x8000 --section-start foo=0x8000100
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#error: Overflow whilst splitting 0x123456 for group relocation
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17
ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s
Normal file
17
ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s
Normal file
@ -0,0 +1,17 @@
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@ Test intended to fail for LDRS group relocations.
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@ We will place .text at 0x8000.
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.text
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.globl _start
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_start:
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add r0, r0, #:sb_g0_nc:(bar)
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ldrd r2, [r0, #:sb_g1:(bar)]
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@ We will place the section foo at 0x8000100 but that should be irrelevant
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@ for sb_g* relocations.
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.section foo
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.set bar,foo + 0x123456
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@ -1,4 +1,4 @@
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#name: LDRS group relocations failure test
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#source: group-relocs-ldrs-bad.s
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#ld: -Ttext 0x8000 --section-start foo=0x8000100
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#error: Overflow whilst splitting 0x8000100 for group relocation
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#error: Overflow whilst splitting 0x7ff8100 for group relocation
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@ -6,8 +6,8 @@
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.globl _start
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_start:
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add r0, r0, #:sb_g0_nc:(bar)
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ldrd r2, [r0, #:sb_g1:(bar)]
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add r0, r0, #:pc_g0_nc:(bar)
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ldrd r2, [r0, #:pc_g1:(bar + 4)]
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@ We will place the section foo at 0x8000100.
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@ -10,42 +10,42 @@ Disassembly of section .text:
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800c: e28f08ff add r0, pc, #16711680 ; 0xff0000
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8010: e2800c6e add r0, r0, #28160 ; 0x6e00
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8014: e28000e4 add r0, r0, #228 ; 0xe4
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8018: e2800000 add r0, r0, #0
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801c: e28f0cee add r0, pc, #60928 ; 0xee00
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8018: e280000c add r0, r0, #12
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801c: e2800cee add r0, r0, #60928 ; 0xee00
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8020: e28000f0 add r0, r0, #240 ; 0xf0
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8024: e28008ff add r0, r0, #16711680 ; 0xff0000
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8028: e2800cee add r0, r0, #60928 ; 0xee00
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802c: e28000f0 add r0, r0, #240 ; 0xf0
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8030: e2800c6e add r0, r0, #28160 ; 0x6e00
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8030: e28f0c6e add r0, pc, #28160 ; 0x6e00
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8034: e59010c0 ldr r1, \[r0, #192\].*
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8038: e28008ff add r0, r0, #16711680 ; 0xff0000
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8038: e28f08ff add r0, pc, #16711680 ; 0xff0000
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803c: e2800c6e add r0, r0, #28160 ; 0x6e00
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8040: e59010b8 ldr r1, \[r0, #184\].*
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8044: e5901000 ldr r1, \[r0\]
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8044: e590100c ldr r1, \[r0, #12\]
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8048: e2800cee add r0, r0, #60928 ; 0xee00
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804c: e59010f0 ldr r1, \[r0, #240\].*
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8050: e28008ff add r0, r0, #16711680 ; 0xff0000
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8054: e2800cee add r0, r0, #60928 ; 0xee00
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8058: e59010f0 ldr r1, \[r0, #240\].*
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805c: e1c026d0 ldrd r2, \[r0, #96\].*
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8060: e2800c6e add r0, r0, #28160 ; 0x6e00
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805c: e1cf26d0 ldrd r2, \[pc, #96\].*
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8060: e28f0c6e add r0, pc, #28160 ; 0x6e00
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8064: e1c029d0 ldrd r2, \[r0, #144\].*
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8068: e28008ff add r0, r0, #16711680 ; 0xff0000
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8068: e28f08ff add r0, pc, #16711680 ; 0xff0000
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806c: e2800c6e add r0, r0, #28160 ; 0x6e00
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8070: e1c028d8 ldrd r2, \[r0, #136\].*
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8074: e1c020d0 ldrd r2, \[r0\]
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8074: e1c020dc ldrd r2, \[r0, #12\]
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8078: e2800cee add r0, r0, #60928 ; 0xee00
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807c: e1c02fd0 ldrd r2, \[r0, #240\].*
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8080: e28008ff add r0, r0, #16711680 ; 0xff0000
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8084: e2800cee add r0, r0, #60928 ; 0xee00
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8088: e1c02fd0 ldrd r2, \[r0, #240\].*
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808c: ed90000c ldc 0, cr0, \[r0, #48\].*
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8090: e2800c6e add r0, r0, #28160 ; 0x6e00
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808c: ed9f000c ldc 0, cr0, \[pc, #48\].*
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8090: e28f0c6e add r0, pc, #28160 ; 0x6e00
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8094: ed900018 ldc 0, cr0, \[r0, #96\].*
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8098: e28008ff add r0, r0, #16711680 ; 0xff0000
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8098: e28f08ff add r0, pc, #16711680 ; 0xff0000
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809c: e2800c6e add r0, r0, #28160 ; 0x6e00
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80a0: ed900016 ldc 0, cr0, \[r0, #88\].*
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80a4: ed900000 ldc 0, cr0, \[r0\]
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80a4: ed900003 ldc 0, cr0, \[r0, #12\]
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80a8: e2800cee add r0, r0, #60928 ; 0xee00
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80ac: ed90003c ldc 0, cr0, \[r0, #240\].*
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80b0: e28008ff add r0, r0, #16711680 ; 0xff0000
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@ -54,14 +54,12 @@ Disassembly of section .text:
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000080bc <one_group_needed_alu_pc>:
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80bc: e3a00000 mov r0, #0
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Disassembly of section zero:
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00000000 <one_group_needed_alu_sb>:
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0: e3a00000 mov r0, #0
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Disassembly of section alpha:
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0000eef0 <two_groups_needed_alu_pc>:
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eef0: e3a00000 mov r0, #0
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Disassembly of section beta:
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00ffeef0 <three_groups_needed_alu_pc>:
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|
@ -28,11 +28,14 @@ _start:
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@ ALU, SB-relative
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@ Instructions start at .text + 0x18
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add r0, r0, #:sb_g0:(one_group_needed_alu_sb)
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add r0, r15, #:sb_g0_nc:(two_groups_needed_alu_sb)
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@ Instructions start at .text + 0x1c
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add r0, r0, #:sb_g0_nc:(two_groups_needed_alu_sb)
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add r0, r0, #:sb_g1:(two_groups_needed_alu_sb)
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@ Instructions start at .text + 0x24
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add r0, r0, #:sb_g0_nc:(three_groups_needed_alu_sb)
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add r0, r0, #:sb_g1_nc:(three_groups_needed_alu_sb)
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add r0, r0, #:sb_g2:(three_groups_needed_alu_sb)
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@ -40,21 +43,24 @@ _start:
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@ LDR, PC-relative
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||||
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@ Instructions start at .text + 0x30
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add r0, r0, #:pc_g0_nc:(two_groups_needed_ldr_pc)
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add r0, pc, #:pc_g0_nc:(two_groups_needed_ldr_pc)
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ldr r1, [r0, #:pc_g1:(two_groups_needed_ldr_pc + 4)]
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||||
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@ Instructions start at .text + 0x38
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add r0, r0, #:pc_g0_nc:(three_groups_needed_ldr_pc)
|
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add r0, pc, #:pc_g0_nc:(three_groups_needed_ldr_pc)
|
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add r0, r0, #:pc_g1_nc:(three_groups_needed_ldr_pc + 4)
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ldr r1, [r0, #:pc_g2:(three_groups_needed_ldr_pc + 8)]
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|
||||
@ LDR, SB-relative
|
||||
|
||||
@ Instructions start at .text + 0x44
|
||||
ldr r1, [r0, #:sb_g0:(one_group_needed_ldr_sb)]
|
||||
|
||||
@ Instructions start at .text + 0x48
|
||||
add r0, r0, #:sb_g0_nc:(two_groups_needed_ldr_sb)
|
||||
ldr r1, [r0, #:sb_g1:(two_groups_needed_ldr_sb)]
|
||||
|
||||
@ Instructions start at .text + 0x50
|
||||
add r0, r0, #:sb_g0_nc:(three_groups_needed_ldr_sb)
|
||||
add r0, r0, #:sb_g1_nc:(three_groups_needed_ldr_sb)
|
||||
ldr r1, [r0, #:sb_g2:(three_groups_needed_ldr_sb)]
|
||||
@ -62,24 +68,27 @@ _start:
|
||||
@ LDRS, PC-relative
|
||||
|
||||
@ Instructions start at .text + 0x5c
|
||||
ldrd r2, [r0, #:pc_g0:(one_group_needed_ldrs_pc)]
|
||||
ldrd r2, [pc, #:pc_g0:(one_group_needed_ldrs_pc)]
|
||||
|
||||
@ Instructions start at .text + 0x60
|
||||
add r0, r0, #:pc_g0_nc:(two_groups_needed_ldrs_pc)
|
||||
add r0, pc, #:pc_g0_nc:(two_groups_needed_ldrs_pc)
|
||||
ldrd r2, [r0, #:pc_g1:(two_groups_needed_ldrs_pc + 4)]
|
||||
|
||||
@ Instructions start at .text + 0x68
|
||||
add r0, r0, #:pc_g0_nc:(three_groups_needed_ldrs_pc)
|
||||
add r0, pc, #:pc_g0_nc:(three_groups_needed_ldrs_pc)
|
||||
add r0, r0, #:pc_g1_nc:(three_groups_needed_ldrs_pc + 4)
|
||||
ldrd r2, [r0, #:pc_g2:(three_groups_needed_ldrs_pc + 8)]
|
||||
|
||||
@ LDRS, SB-relative
|
||||
|
||||
@ Instructions start at .text + 0x74
|
||||
ldrd r2, [r0, #:sb_g0:(one_group_needed_ldrs_sb)]
|
||||
|
||||
@ Instructions start at .text + 0x78
|
||||
add r0, r0, #:sb_g0_nc:(two_groups_needed_ldrs_sb)
|
||||
ldrd r2, [r0, #:sb_g1:(two_groups_needed_ldrs_sb)]
|
||||
|
||||
@ Instructions start at .text + 0x80
|
||||
add r0, r0, #:sb_g0_nc:(three_groups_needed_ldrs_sb)
|
||||
add r0, r0, #:sb_g1_nc:(three_groups_needed_ldrs_sb)
|
||||
ldrd r2, [r0, #:sb_g2:(three_groups_needed_ldrs_sb)]
|
||||
@ -87,24 +96,27 @@ _start:
|
||||
@ LDC, PC-relative
|
||||
|
||||
@ Instructions start at .text + 0x8c
|
||||
ldc 0, c0, [r0, #:pc_g0:(one_group_needed_ldc_pc)]
|
||||
ldc 0, c0, [pc, #:pc_g0:(one_group_needed_ldc_pc)]
|
||||
|
||||
@ Instructions start at .text + 0x90
|
||||
add r0, r0, #:pc_g0_nc:(two_groups_needed_ldc_pc)
|
||||
add r0, pc, #:pc_g0_nc:(two_groups_needed_ldc_pc)
|
||||
ldc 0, c0, [r0, #:pc_g1:(two_groups_needed_ldc_pc + 4)]
|
||||
|
||||
@ Instructions start at .text + 0x98
|
||||
add r0, r0, #:pc_g0_nc:(three_groups_needed_ldc_pc)
|
||||
add r0, pc, #:pc_g0_nc:(three_groups_needed_ldc_pc)
|
||||
add r0, r0, #:pc_g1_nc:(three_groups_needed_ldc_pc + 4)
|
||||
ldc 0, c0, [r0, #:pc_g2:(three_groups_needed_ldc_pc + 8)]
|
||||
|
||||
@ LDC, SB-relative
|
||||
|
||||
@ Instructions start at .text + 0xa4
|
||||
ldc 0, c0, [r0, #:sb_g0:(one_group_needed_ldc_sb)]
|
||||
|
||||
@ Instructions start at .text + 0xa8
|
||||
add r0, r0, #:sb_g0_nc:(two_groups_needed_ldc_sb)
|
||||
ldc 0, c0, [r0, #:sb_g1:(two_groups_needed_ldc_sb)]
|
||||
|
||||
@ Instructions start at .text + 0xb0
|
||||
add r0, r0, #:sb_g0_nc:(three_groups_needed_ldc_sb)
|
||||
add r0, r0, #:sb_g1_nc:(three_groups_needed_ldc_sb)
|
||||
ldc 0, c0, [r0, #:sb_g2:(three_groups_needed_ldc_sb)]
|
||||
@ -116,24 +128,33 @@ one_group_needed_ldrs_pc:
|
||||
one_group_needed_ldc_pc:
|
||||
mov r0, #0
|
||||
|
||||
@ We will place the section zero at 0x0.
|
||||
@ We will place the section .data at 0x03000000
|
||||
|
||||
.section zero, "x"
|
||||
.data
|
||||
|
||||
.word 0, 0, 0
|
||||
one_group_needed_alu_sb:
|
||||
one_group_needed_ldr_sb:
|
||||
one_group_needed_ldrs_sb:
|
||||
one_group_needed_ldc_sb:
|
||||
mov r0, #0
|
||||
.word 1 @ Offset 0xc
|
||||
.fill 0xeef0 - 16, 1, 0
|
||||
two_groups_needed_alu_sb:
|
||||
two_groups_needed_ldr_sb:
|
||||
two_groups_needed_ldrs_sb:
|
||||
two_groups_needed_ldc_sb:
|
||||
.word 2 @ Offset 0xeef0
|
||||
.fill 0xffeef0 - 0xeef0 - 4, 1, 0
|
||||
three_groups_needed_alu_sb:
|
||||
three_groups_needed_ldr_sb:
|
||||
three_groups_needed_ldrs_sb:
|
||||
three_groups_needed_ldc_sb:
|
||||
.word 3 @ Offset 0xffeef0
|
||||
|
||||
@ We will place the section alpha at 0xeef0.
|
||||
|
||||
.section alpha, "x"
|
||||
|
||||
two_groups_needed_alu_sb:
|
||||
two_groups_needed_ldr_sb:
|
||||
two_groups_needed_ldrs_sb:
|
||||
two_groups_needed_ldc_sb:
|
||||
two_groups_needed_alu_pc:
|
||||
two_groups_needed_ldr_pc:
|
||||
two_groups_needed_ldrs_pc:
|
||||
@ -144,10 +165,6 @@ two_groups_needed_ldc_pc:
|
||||
|
||||
.section beta, "x"
|
||||
|
||||
three_groups_needed_alu_sb:
|
||||
three_groups_needed_ldr_sb:
|
||||
three_groups_needed_ldrs_sb:
|
||||
three_groups_needed_ldc_sb:
|
||||
three_groups_needed_alu_pc:
|
||||
three_groups_needed_ldr_pc:
|
||||
three_groups_needed_ldrs_pc:
|
||||
|
Loading…
Reference in New Issue
Block a user