PR binutils/12534
* arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn patterns. (print_insn_thumb32): Handle %L. * gas/arm/thumb32.s: Add PC relative LDRD and STRD insns. * gas/arm/thumb32.l: Update expected output. * gas/arm/thumb32.d: Update expected disassembly.
This commit is contained in:
parent
1bbabca54e
commit
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@ -1,5 +1,10 @@
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2011-04-12 Nick Clifton <nickc@redhat.com>
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PR binutils/12534
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* gas/arm/thumb32.s: Add PC relative LDRD and STRD insns.
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* gas/arm/thumb32.l: Update expected output.
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* gas/arm/thumb32.d: Update expected disassembly.
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PR gas/12532
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* gas/arm/plt-1.d: Update expected disassembly.
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* gas/arm/thumb2_bcond.d: Likewise.
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@ -531,12 +531,15 @@ Disassembly of section .text:
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0[0-9a-f]+ <[^>]+> f819 f00c pld \[r9, ip\]
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0[0-9a-f]+ <[^>]+> f89f f006 pld \[pc, #6\] ; 0+5ee <[^>]+>
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0[0-9a-f]+ <[^>]+> f81f f02a pld \[pc, #-42\] ; 0+5c2 <[^>]+>
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0[0-9a-f]+ <[^>]+> bf00 nop
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0[0-9a-f]+ <[^>]+> e9d5 2300 ldrd r2, r3, \[r5\]
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0[0-9a-f]+ <[^>]+> e9d5 230c ldrd r2, r3, \[r5, #48\].*
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0[0-9a-f]+ <[^>]+> e955 230c ldrd r2, r3, \[r5, #-48\].*
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0[0-9a-f]+ <[^>]+> e95f 4505 ldrd r4, r5, \[pc, #-16\] ; 0+5f0 <^>]+>
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0[0-9a-f]+ <[^>]+> e9c5 2300 strd r2, r3, \[r5\]
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0[0-9a-f]+ <[^>]+> e9c5 230c strd r2, r3, \[r5, #48\].*
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0[0-9a-f]+ <[^>]+> e945 230c strd r2, r3, \[r5, #-48\].*
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0[0-9a-f]+ <[^>]+> e94f 2308 strd r2, r3, \[pc, #-32\] ; 0+5f0 <^>]+>
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0[0-9a-f]+ <[^>]+> f815 1e00 ldrbt r1, \[r5\]
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0[0-9a-f]+ <[^>]+> f815 1e30 ldrbt r1, \[r5, #48\].*
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0[0-9a-f]+ <[^>]+> f915 1e00 ldrsbt r1, \[r5\]
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@ -945,26 +948,26 @@ Disassembly of section .text:
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0[0-9a-f]+ <[^>]+> fa52 f183 uxtab r1, r2, r3
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0[0-9a-f]+ <[^>]+> fa32 f183 uxtab16 r1, r2, r3
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0[0-9a-f]+ <[^>]+> fa12 f183 uxtah r1, r2, r3
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0[0-9a-f]+ <[^>]+> f89f 12aa ldrb\.w r1, \[pc, #682\] ; 0+e82 <[^>]+>
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0[0-9a-f]+ <[^>]+> f89f 1155 ldrb\.w r1, \[pc, #341\] ; 0+d31 <[^>]+>
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0[0-9a-f]+ <[^>]+> f81f 12aa ldrb\.w r1, \[pc, #-682\] ; 0+936 <[^>]+>
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0[0-9a-f]+ <[^>]+> f81f 1155 ldrb\.w r1, \[pc, #-341\] ; 0+a8f <[^>]+>
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0[0-9a-f]+ <[^>]+> f99f 12aa ldrsb\.w r1, \[pc, #682\] ; 0+e92 <[^>]+>
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0[0-9a-f]+ <[^>]+> f99f 1155 ldrsb\.w r1, \[pc, #341\] ; 0+d41 <[^>]+>
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0[0-9a-f]+ <[^>]+> f91f 12aa ldrsb\.w r1, \[pc, #-682\] ; 0+946 <[^>]+>
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0[0-9a-f]+ <[^>]+> f91f 1155 ldrsb\.w r1, \[pc, #-341\] ; 0+a9f <[^>]+>
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0[0-9a-f]+ <[^>]+> f8bf 12aa ldrh\.w r1, \[pc, #682\] ; 0+ea2 <[^>]+>
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0[0-9a-f]+ <[^>]+> f8bf 1155 ldrh\.w r1, \[pc, #341\] ; 0+d51 <[^>]+>
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0[0-9a-f]+ <[^>]+> f83f 12aa ldrh\.w r1, \[pc, #-682\] ; 0+956 <[^>]+>
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0[0-9a-f]+ <[^>]+> f83f 1155 ldrh\.w r1, \[pc, #-341\] ; 0+aaf <[^>]+>
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0[0-9a-f]+ <[^>]+> f9bf 12aa ldrsh\.w r1, \[pc, #682\] ; 0+eb2 <[^>]+>
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0[0-9a-f]+ <[^>]+> f9bf 1155 ldrsh\.w r1, \[pc, #341\] ; 0+d61 <[^>]+>
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0[0-9a-f]+ <[^>]+> f93f 12aa ldrsh\.w r1, \[pc, #-682\] ; 0+966 <[^>]+>
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0[0-9a-f]+ <[^>]+> f93f 1155 ldrsh\.w r1, \[pc, #-341\] ; 0+abf <[^>]+>
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0[0-9a-f]+ <[^>]+> f8df 12aa ldr\.w r1, \[pc, #682\] ; 0+ec2 <[^>]+>
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0[0-9a-f]+ <[^>]+> f8df 1155 ldr\.w r1, \[pc, #341\] ; 0+d71 <[^>]+>
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0[0-9a-f]+ <[^>]+> f85f 12aa ldr\.w r1, \[pc, #-682\] ; 0+976 <[^>]+>
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0[0-9a-f]+ <[^>]+> f85f 1155 ldr\.w r1, \[pc, #-341\] ; 0+acf <[^>]+>
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0[0-9a-f]+ <[^>]+> f89f 12aa ldrb\.w r1, \[pc, #682\] ; 0+e8a <[^>]+>
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0[0-9a-f]+ <[^>]+> f89f 1155 ldrb\.w r1, \[pc, #341\] ; 0+d39 <[^>]+>
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0[0-9a-f]+ <[^>]+> f81f 12aa ldrb\.w r1, \[pc, #-682\] ; 0+93e <[^>]+>
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0[0-9a-f]+ <[^>]+> f81f 1155 ldrb\.w r1, \[pc, #-341\] ; 0+a97 <[^>]+>
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0[0-9a-f]+ <[^>]+> f99f 12aa ldrsb\.w r1, \[pc, #682\] ; 0+e9a <[^>]+>
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0[0-9a-f]+ <[^>]+> f99f 1155 ldrsb\.w r1, \[pc, #341\] ; 0+d49 <[^>]+>
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0[0-9a-f]+ <[^>]+> f91f 12aa ldrsb\.w r1, \[pc, #-682\] ; 0+94e <[^>]+>
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0[0-9a-f]+ <[^>]+> f91f 1155 ldrsb\.w r1, \[pc, #-341\] ; 0+aa7 <[^>]+>
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0[0-9a-f]+ <[^>]+> f8bf 12aa ldrh\.w r1, \[pc, #682\] ; 0+eaa <[^>]+>
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0[0-9a-f]+ <[^>]+> f8bf 1155 ldrh\.w r1, \[pc, #341\] ; 0+d59 <[^>]+>
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0[0-9a-f]+ <[^>]+> f83f 12aa ldrh\.w r1, \[pc, #-682\] ; 0+95e <[^>]+>
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0[0-9a-f]+ <[^>]+> f83f 1155 ldrh\.w r1, \[pc, #-341\] ; 0+ab7 <[^>]+>
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0[0-9a-f]+ <[^>]+> f9bf 12aa ldrsh\.w r1, \[pc, #682\] ; 0+eba <[^>]+>
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0[0-9a-f]+ <[^>]+> f9bf 1155 ldrsh\.w r1, \[pc, #341\] ; 0+d69 <[^>]+>
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0[0-9a-f]+ <[^>]+> f93f 12aa ldrsh\.w r1, \[pc, #-682\] ; 0+96e <[^>]+>
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0[0-9a-f]+ <[^>]+> f93f 1155 ldrsh\.w r1, \[pc, #-341\] ; 0+ac7 <[^>]+>
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0[0-9a-f]+ <[^>]+> f8df 12aa ldr\.w r1, \[pc, #682\] ; 0+eca <[^>]+>
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0[0-9a-f]+ <[^>]+> f8df 1155 ldr\.w r1, \[pc, #341\] ; 0+d79 <[^>]+>
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0[0-9a-f]+ <[^>]+> f85f 12aa ldr\.w r1, \[pc, #-682\] ; 0+97e <[^>]+>
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0[0-9a-f]+ <[^>]+> f85f 1155 ldr\.w r1, \[pc, #-341\] ; 0+ad7 <[^>]+>
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0[0-9a-f]+ <[^>]+> f200 0900 addw r9, r0, #0
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0[0-9a-f]+ <[^>]+> f60f 76ff addw r6, pc, #4095 ; 0xfff
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0[0-9a-f]+ <[^>]+> f6a9 2685 subw r6, r9, #2693 ; 0xa85
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@ -1,17 +1,17 @@
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[^;]*: Assembler messages:
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[^;]*:448: Warning: s suffix on comparison instruction is deprecated
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[^;]*:448: Warning: s suffix on comparison instruction is deprecated
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[^;]*:448: Warning: s suffix on comparison instruction is deprecated
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[^;]*:448: Warning: s suffix on comparison instruction is deprecated
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[^;]*:449: Warning: s suffix on comparison instruction is deprecated
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[^;]*:449: Warning: s suffix on comparison instruction is deprecated
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[^;]*:449: Warning: s suffix on comparison instruction is deprecated
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[^;]*:449: Warning: s suffix on comparison instruction is deprecated
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[^;]*:450: Warning: s suffix on comparison instruction is deprecated
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[^;]*:450: Warning: s suffix on comparison instruction is deprecated
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[^;]*:450: Warning: s suffix on comparison instruction is deprecated
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[^;]*:450: Warning: s suffix on comparison instruction is deprecated
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[^;]*:451: Warning: s suffix on comparison instruction is deprecated
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[^;]*:451: Warning: s suffix on comparison instruction is deprecated
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[^;]*:451: Warning: s suffix on comparison instruction is deprecated
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[^;]*:451: Warning: s suffix on comparison instruction is deprecated
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[^;]*:452: Warning: s suffix on comparison instruction is deprecated
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[^;]*:452: Warning: s suffix on comparison instruction is deprecated
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[^;]*:452: Warning: s suffix on comparison instruction is deprecated
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[^;]*:452: Warning: s suffix on comparison instruction is deprecated
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[^;]*:453: Warning: s suffix on comparison instruction is deprecated
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[^;]*:453: Warning: s suffix on comparison instruction is deprecated
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[^;]*:453: Warning: s suffix on comparison instruction is deprecated
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[^;]*:453: Warning: s suffix on comparison instruction is deprecated
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[^;]*:454: Warning: s suffix on comparison instruction is deprecated
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[^;]*:454: Warning: s suffix on comparison instruction is deprecated
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[^;]*:454: Warning: s suffix on comparison instruction is deprecated
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[^;]*:454: Warning: s suffix on comparison instruction is deprecated
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@ -371,14 +371,17 @@ ldst:
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pld 1f
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pld 1b
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1:
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nop
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here:
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ldrd r2, r3, [r5]
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ldrd r2, [r5, #0x30]
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ldrd r2, [r5, #-0x30]
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ldrd r4, r5, here
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strd r2, r3, [r5]
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strd r2, [r5, #0x30]
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strd r2, [r5, #-0x30]
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strd r2, r3, here
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ldrbt r1, [r5]
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ldrbt r1, [r5, #0x30]
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ldrsbt r1, [r5]
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@ -1,3 +1,10 @@
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2011-04-12 Nick Clifton <nickc@redhat.com>
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PR binutils/12534
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* arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
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patterns.
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(print_insn_thumb32): Handle %L.
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2011-04-11 Julian Brown <julian@codesourcery.com>
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* arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
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@ -1336,6 +1336,7 @@ static const struct opcode16 thumb_opcodes[] =
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%H print a 16-bit immediate from hw2[3:0],hw1[11:0]
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%S print a possibly-shifted Rm
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%L print address for a ldrd/strd instruction
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%a print the address of a plain load/store
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%w print the width and signedness of a core load/store
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%m print register mask for ldm/stm
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@ -1564,10 +1565,10 @@ static const struct opcode32 thumb32_opcodes[] =
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{ARM_EXT_V6T2, 0xe9100000, 0xffd00000, "ldmdb%c\t%16-19r%21'!, %m"},
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{ARM_EXT_V6T2, 0xe9c00000, 0xffd000ff, "strd%c\t%12-15r, %8-11r, [%16-19r]"},
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{ARM_EXT_V6T2, 0xe9d00000, 0xffd000ff, "ldrd%c\t%12-15r, %8-11r, [%16-19r]"},
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{ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!"},
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{ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!"},
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{ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W"},
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{ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W"},
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{ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"},
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{ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"},
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{ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"},
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{ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"},
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{ARM_EXT_V6T2, 0xf8000000, 0xff100000, "str%w%c.w\t%12-15r, %a"},
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{ARM_EXT_V6T2, 0xf8100000, 0xfe100000, "ldr%w%c.w\t%12-15r, %a"},
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@ -4285,6 +4286,21 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
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}
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break;
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case 'L':
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/* PR binutils/12534
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If we have a PC relative offset in an LDRD or STRD
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instructions then display the decoded address. */
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if (((given >> 16) & 0xf) == 0xf)
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{
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bfd_vma offset = (given & 0xff) * 4;
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if ((given & (1 << 23)) == 0)
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offset = - offset;
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func (stream, "\t; ");
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info->print_address_func ((pc & ~3) + 4 + offset, info);
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}
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break;
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default:
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abort ();
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}
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