[ARC] Sync opcode data base.

New EM and HS variants are developed, sync the data base to match them.

opcodes/
2017-11-03  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-tbl.h (abss, abssh, adc, adcs, adds, aslacc, asls, aslsacc)
        (asrs, asrsr, cbflyhf0r, cbflyhf1r, cmacchfr, cmacchnfr, cmachfr)
        (cmachnfr, cmpychfr, cmpychnfr, cmpyhfmr, cmpyhfr, cmpyhnfr, divf)
        (dmachbl, dmachbm, dmachf, dmachfr, dmacwhf, dmpyhbl, dmpyhbm)
        (dmpyhf, dmpyhfr, dmpyhwf, dmpywhf, dsync, flagacc, getacc, macdf)
        (macf, macfr, macwhfl, macwhflr, macwhfm, macwhfmr, macwhkl)
        (macwhkul, macwhl, macwhul, mpydf, mpyf, mpyfr, mpywhfl, mpywhflr)
        (mpywhfm, mpywhfmr, mpywhkl, mpywhkul, mpywhl, mpywhul, msubdf)
        (msubf, msubfr, msubwhfl, msubwhflr, msubwhfm, msubwhfmr, mul64)
        (negs, negsh, normacc, qmachf, qmpyh, qmpyhf, rndh, satf, sath)
        (sbcs, setacc, sflag, sqrt, sqrtf, subs, swi_s, vabs2h, vabss2h)
        (vadd4b, vadds2, vadds2h, vadds4h, vaddsubs, vaddsubs2h)
        (vaddsubs4h, valgn2h, vasl2h, vasls2h, vasr2h, vasrs2h, vasrsr2h)
        (vext2bhl, vext2bhlf, vext2bhm, vext2bhmf, vlsr2h, vmac2hf)
        (vmac2hfr, vmac2hnfr, vmax2h, vmin2h, vmpy2h, vmpy2hf, vmpy2hfr)
        (vmpy2hwf, vmsub2hf, vmsub2hfr, vmsub2hnfr, vneg2h, vnegs2h)
        (vnorm2h, vpack2hbl, vpack2hblf, vpack2hbm, vpack2hbmf, vpack2hl)
        (vpack2hm, vperm, vrep2hl, vrep2hm, vsext2bhl, vsext2bhm, vsub4b)
        (vsubadds, vsubadds2h, vsubadds4h, vsubs2, vsubs2h, vsubs4h):
        Changed opcodes.
        (prealloc, prefetch*): Place them before ld instruction.
        * arc-opc.c (skip_this_opcode): Add ARITH class.

opcodes/ChangeLog

@@ -1,3 +1,28 @@
+2017-11-03  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-tbl.h (abss, abssh, adc, adcs, adds, aslacc, asls, aslsacc)
+	(asrs, asrsr, cbflyhf0r, cbflyhf1r, cmacchfr, cmacchnfr, cmachfr)
+	(cmachnfr, cmpychfr, cmpychnfr, cmpyhfmr, cmpyhfr, cmpyhnfr, divf)
+	(dmachbl, dmachbm, dmachf, dmachfr, dmacwhf, dmpyhbl, dmpyhbm)
+	(dmpyhf, dmpyhfr, dmpyhwf, dmpywhf, dsync, flagacc, getacc, macdf)
+	(macf, macfr, macwhfl, macwhflr, macwhfm, macwhfmr, macwhkl)
+	(macwhkul, macwhl, macwhul, mpydf, mpyf, mpyfr, mpywhfl, mpywhflr)
+	(mpywhfm, mpywhfmr, mpywhkl, mpywhkul, mpywhl, mpywhul, msubdf)
+	(msubf, msubfr, msubwhfl, msubwhflr, msubwhfm, msubwhfmr, mul64)
+	(negs, negsh, normacc, qmachf, qmpyh, qmpyhf, rndh, satf, sath)
+	(sbcs, setacc, sflag, sqrt, sqrtf, subs, swi_s, vabs2h, vabss2h)
+	(vadd4b, vadds2, vadds2h, vadds4h, vaddsubs, vaddsubs2h)
+	(vaddsubs4h, valgn2h, vasl2h, vasls2h, vasr2h, vasrs2h, vasrsr2h)
+	(vext2bhl, vext2bhlf, vext2bhm, vext2bhmf, vlsr2h, vmac2hf)
+	(vmac2hfr, vmac2hnfr, vmax2h, vmin2h, vmpy2h, vmpy2hf, vmpy2hfr)
+	(vmpy2hwf, vmsub2hf, vmsub2hfr, vmsub2hnfr, vneg2h, vnegs2h)
+	(vnorm2h, vpack2hbl, vpack2hblf, vpack2hbm, vpack2hbmf, vpack2hl)
+	(vpack2hm, vperm, vrep2hl, vrep2hm, vsext2bhl, vsext2bhm, vsub4b)
+	(vsubadds, vsubadds2h, vsubadds4h, vsubs2, vsubs2h, vsubs4h):
+	Changed opcodes.
+	(prealloc, prefetch*): Place them before ld instruction.
+	* arc-opc.c (skip_this_opcode): Add ARITH class.
+
 2017-10-25  Alan Modra  <amodra@gmail.com>
 
 	PR 22348

opcodes/arc-dis.c

@@ -186,6 +186,7 @@ skip_this_opcode (const struct arc_opcode *opcode)
     {
     case FLOAT:
     case DSP:
+    case ARITH:
       break;
     default:
       return FALSE;