No longer need to sanitize away h8/s stuff.
This commit is contained in:
Jeff Law
parent
910d7df246
commit
34255b708c
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@ -315,34 +315,6 @@ else
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done
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fi
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h8s_files="archures.c coff-h8300.c coffcode.h cpu-h8300.c ChangeLog bfd-in2.h"
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if ( echo $* | grep keep\-h8s > /dev/null ) ; then
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for i in $h8s_files ; do
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if test ! -d $i && (grep sanitize-h8s $i > /dev/null) ; then
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if [ -n "${verbose}" ] ; then
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echo Keeping h8s stuff in $i
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fi
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fi
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done
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else
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for i in $h8s_files ; do
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if test ! -d $i && (grep sanitize-h8s $i > /dev/null) ; then
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if [ -n "${verbose}" ] ; then
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echo Removing traces of \"h8s\" from $i...
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fi
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cp $i new
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sed '/start\-sanitize\-h8s/,/end-\sanitize\-h8s/d' < $i > new
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if [ -n "${safe}" -a ! -f .Recover/$i ] ; then
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if [ -n "${verbose}" ] ; then
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echo Caching $i in .Recover...
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fi
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mv $i .Recover
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fi
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mv new $i
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fi
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done
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fi
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for i in * ; do
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if test ! -d $i && (grep sanitize $i > /dev/null) ; then
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echo '***' Some mentions of Sanitize are still left in $i! 1>&2
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@ -207,7 +207,6 @@ Tue Jun 18 15:17:36 1996 Jeffrey A. Law <law@rtl.cygnus.com>
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* coff-h8300.c: Remove #if 0 code.
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(compatable): Don't allow mixing/matching of different architectures.
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start-sanitize-h8s
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* archures.c (bfd_mach_h8300s): Add.
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* bfd-in2.h: Rebuilt.
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* coff-h8300.c (funcvec_hash_newfunc): Handle H8/S too.
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@ -220,7 +219,6 @@ start-sanitize-h8s
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* cpu-h8300.c (h8300_scan): Likewise.
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Add H8/S to bfd_h8300_arch list.
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end-sanitize-h8s
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Tue Jun 18 14:42:58 1996 Klaus Kaempf <kkaempf@progis.de>
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Added support for Alpha OpenVMS:
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@ -1,5 +1,5 @@
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/* BFD library support routines for architectures.
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Copyright (C) 1990, 91-95, 1996 Free Software Foundation, Inc.
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Copyright (C) 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
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Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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@ -86,21 +86,22 @@ DESCRIPTION
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.#define bfd_mach_i960_mc 4
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.#define bfd_mach_i960_xa 5
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.#define bfd_mach_i960_ca 6
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. {* start-sanitize-i960xl *}
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.#define bfd_mach_i960_xl 7
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. {* end-sanitize-i960xl *}
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.#define bfd_mach_i960_jx 7
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.#define bfd_mach_i960_hx 8
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.
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. bfd_arch_a29k, {* AMD 29000 *}
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. bfd_arch_sparc, {* SPARC *}
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.#define bfd_mach_sparc 1
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.{* The difference between v8plus and v9 is that v9 is a true 64 bit env. *}
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.#define bfd_mach_sparc_v8plus 2
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.#define bfd_mach_sparc_v8plusa 3 {* with ultrasparc add'ns *}
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.#define bfd_mach_sparc_v9 4
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.#define bfd_mach_sparc_v9a 5 {* with ultrasparc add'ns *}
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.#define bfd_mach_sparc_sparclet 2
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.#define bfd_mach_sparc_sparclite 3
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.#define bfd_mach_sparc_v8plus 4
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.#define bfd_mach_sparc_v8plusa 5 {* with ultrasparc add'ns *}
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.#define bfd_mach_sparc_v9 6
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.#define bfd_mach_sparc_v9a 7 {* with ultrasparc add'ns *}
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.{* Nonzero if MACH has the v9 instruction set. *}
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.#define bfd_mach_sparc_v9_p(mach) ((mach) != bfd_mach_sparc)
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.#define bfd_mach_sparc_v9_p(mach) \
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. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a)
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. bfd_arch_mips, {* MIPS Rxxxx *}
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. bfd_arch_i386, {* Intel 386 *}
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. bfd_arch_we32k, {* AT&T WE32xxx *}
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@ -114,6 +115,7 @@ DESCRIPTION
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. bfd_arch_h8300, {* Hitachi H8/300 *}
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.#define bfd_mach_h8300 1
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.#define bfd_mach_h8300h 2
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.#define bfd_mach_h8300s 3
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. bfd_arch_powerpc, {* PowerPC *}
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. bfd_arch_rs6000, {* IBM RS/6000 *}
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. bfd_arch_hppa, {* HP PA RISC *}
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@ -126,9 +128,6 @@ DESCRIPTION
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. bfd_arch_arm, {* Advanced Risc Machines ARM *}
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. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
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. bfd_arch_w65, {* WDC 65816 *}
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. {* start-sanitize-rce *}
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. bfd_arch_rce, {* Motorola RCE *}
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. {* end-sanitize-rce *}
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. {* start-sanitize-arc *}
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. bfd_arch_arc, {* Argonaut RISC Core *}
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.#define bfd_mach_arc_base 0
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@ -192,9 +191,6 @@ extern const bfd_arch_info_type bfd_mips_arch;
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extern const bfd_arch_info_type bfd_powerpc_arch;
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extern const bfd_arch_info_type bfd_rs6000_arch;
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extern const bfd_arch_info_type bfd_sh_arch;
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/* start-sanitize-rce */
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extern const bfd_arch_info_type bfd_rce_arch;
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/* end-sanitize-rce */
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extern const bfd_arch_info_type bfd_sparc_arch;
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extern const bfd_arch_info_type bfd_vax_arch;
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extern const bfd_arch_info_type bfd_we32k_arch;
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@ -225,9 +221,6 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
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&bfd_powerpc_arch,
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&bfd_rs6000_arch,
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&bfd_sh_arch,
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/* start-sanitize-rce */
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&bfd_rce_arch,
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/* end-sanitize-rce */
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&bfd_sparc_arch,
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&bfd_vax_arch,
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&bfd_we32k_arch,
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@ -1192,6 +1192,7 @@ enum bfd_architecture
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bfd_arch_h8300, /* Hitachi H8/300 */
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#define bfd_mach_h8300 1
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#define bfd_mach_h8300h 2
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#define bfd_mach_h8300s 3
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bfd_arch_powerpc, /* PowerPC */
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bfd_arch_rs6000, /* IBM RS/6000 */
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bfd_arch_hppa, /* HP PA RISC */
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@ -1592,8 +1593,8 @@ relocation types already defined. */
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BFD_RELOC_SPARC_6,
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BFD_RELOC_SPARC_5,
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/* Alpha ECOFF relocations. Some of these treat the symbol or "addend"
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in some special way.
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/* Alpha ECOFF and ELF relocations. Some of these treat the symbol or
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"addend" in some special way.
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For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
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writing; when reading, it will be the absolute section symbol. The
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addend is the displacement in bytes of the "lda" instruction from
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@ -1606,6 +1607,11 @@ relocations out, and is filled in with the file's GP value on
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reading, for convenience. */
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BFD_RELOC_ALPHA_GPDISP_LO16,
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/* The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
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relocation except that there is no accompanying GPDISP_LO16
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relocation. */
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BFD_RELOC_ALPHA_GPDISP,
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/* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
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the assembler turns it into a LDQ instruction to load the address of
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the symbol, and then fills in a register in the real instruction.
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@ -138,7 +138,8 @@ funcvec_hash_newfunc (entry, gen_table, string)
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but it's not easily available here. */
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if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
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table->offset += 2;
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else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h)
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else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
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|| bfd_get_mach (table->abfd) == bfd_mach_h8300s)
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table->offset += 4;
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else
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return NULL;
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@ -258,7 +259,7 @@ static reloc_howto_type howto_table[] =
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#define SELECT_RELOC(x,howto) \
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{ x.r_type = select_reloc(howto); }
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#define BADMAG(x) (H8300BADMAG(x)&& H8300HBADMAG(x))
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#define BADMAG(x) (H8300BADMAG(x) && H8300HBADMAG(x) && H8300SBADMAG(x))
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#define H8300 1 /* Customize coffcode.h */
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#define __A_MAGIC_SET__
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@ -565,7 +566,8 @@ h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info)
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if ((bfd_get_mach (abfd) == bfd_mach_h8300
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&& value >= 0xff00
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&& value <= 0xffff)
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|| (bfd_get_mach (abfd) == bfd_mach_h8300h
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|| ((bfd_get_mach (abfd) == bfd_mach_h8300h
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|| bfd_get_mach (abfd) == bfd_mach_h8300s)
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&& value >= 0xffff00
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&& value <= 0xffffff))
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{
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@ -587,7 +589,8 @@ h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info)
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/* The address is in 0xffff00..0xffffff inclusive on the h8300h,
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then we can relax this mov.b */
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if (bfd_get_mach (abfd) == bfd_mach_h8300h
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if ((bfd_get_mach (abfd) == bfd_mach_h8300h
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|| bfd_get_mach (abfd) == bfd_mach_h8300s)
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&& value >= 0xffff00
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&& value <= 0xffffff)
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{
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@ -1125,7 +1128,8 @@ h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
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link_info,
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input_section),
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vectors_sec->contents + h->offset);
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else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h)
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else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
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|| bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
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bfd_put_32 (abfd,
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bfd_coff_reloc16_get_value (reloc,
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link_info,
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@ -1294,7 +1298,8 @@ h8300_bfd_link_add_symbols(abfd, info)
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takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
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if (bfd_get_mach (abfd) == bfd_mach_h8300)
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h8300_coff_hash_table (info)->vectors_sec->_raw_size += 2;
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else if (bfd_get_mach (abfd) == bfd_mach_h8300h)
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else if (bfd_get_mach (abfd) == bfd_mach_h8300h
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|| bfd_get_mach (abfd) == bfd_mach_h8300s)
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h8300_coff_hash_table (info)->vectors_sec->_raw_size += 4;
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}
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}
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@ -1111,7 +1111,7 @@ coff_set_alignment_hook (abfd, section, scnhdr)
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}
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#endif
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#ifdef COFF_WITH_PE
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#ifdef COFF_IMAGE_WITH_PE
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/* In a PE image file, the s_paddr field holds the virtual size of a
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section, while the s_size field holds the raw size. */
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if (hdr->s_paddr != 0)
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@ -1499,7 +1499,6 @@ coff_set_arch_mach_hook (abfd, filehdr)
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break;
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#endif
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/* start-sanitize-h8s */
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#ifdef H8300SMAGIC
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case H8300SMAGIC:
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arch = bfd_arch_h8300;
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@ -1509,7 +1508,6 @@ coff_set_arch_mach_hook (abfd, filehdr)
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break;
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#endif
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/* end-sanitize-h8s */
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#ifdef SH_ARCH_MAGIC_BIG
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case SH_ARCH_MAGIC_BIG:
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case SH_ARCH_MAGIC_LITTLE:
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@ -1960,11 +1958,9 @@ coff_set_flags (abfd, magicp, flagsp)
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case bfd_mach_h8300h:
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*magicp = H8300HMAGIC;
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return true;
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/* start-sanitize-h8s */
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case bfd_mach_h8300s:
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*magicp = H8300SMAGIC;
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return true;
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/* end-sanitize-h8s */
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}
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break;
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#endif
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@ -2186,7 +2182,7 @@ coff_compute_section_file_positions (abfd)
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#endif
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current->filepos = sofar;
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#ifdef COFF_WITH_PE
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#ifdef COFF_IMAGE_WITH_PE
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/* With PE we have to pad each section to be a multiple of its
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page size too, and remember both sizes. */
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@ -2464,6 +2460,9 @@ coff_write_object_contents (abfd)
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section.s_size = current->_raw_size;
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#ifdef COFF_WITH_PE
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section.s_paddr = 0;
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#endif
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#ifdef COFF_IMAGE_WITH_PE
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/* Reminder: s_paddr holds the virtual size of the section. */
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if (coff_section_data (abfd, current) != NULL
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&& pei_section_data (abfd, current) != NULL)
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