2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (intel_e09): Also special-case 'bound'.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
	* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
	gas/i386/opcode-intel.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.
This commit is contained in:
Jan Beulich 2008-02-13 13:29:31 +00:00
parent a60de03c61
commit 34b772a651
13 changed files with 81 additions and 42 deletions

View File

@ -1,3 +1,7 @@
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e09): Also special-case 'bound'.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.

View File

@ -8357,9 +8357,10 @@ intel_e09 (void)
else if (prev_token.code == T_WORD)
{
if (current_templates->start->name[0] == 'l'
&& current_templates->start->name[2] == 's'
&& current_templates->start->name[3] == 0)
if ((current_templates->start->name[0] == 'l'
&& current_templates->start->name[2] == 's'
&& current_templates->start->name[3] == 0)
|| current_templates->start->base_opcode == 0x62 /* bound */)
suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
else if (intel_parser.got_a_float == 2) /* "fi..." */
suffix = SHORT_MNEM_SUFFIX;
@ -8370,9 +8371,10 @@ intel_e09 (void)
else if (prev_token.code == T_DWORD)
{
if (current_templates->start->name[0] == 'l'
&& current_templates->start->name[2] == 's'
&& current_templates->start->name[3] == 0)
if ((current_templates->start->name[0] == 'l'
&& current_templates->start->name[2] == 's'
&& current_templates->start->name[3] == 0)
|| current_templates->start->base_opcode == 0x62 /* bound */)
suffix = WORD_MNEM_SUFFIX;
else if (flag_code == CODE_16BIT
&& (current_templates->start->opcode_modifier.jump
@ -8404,10 +8406,11 @@ intel_e09 (void)
else if (prev_token.code == T_QWORD)
{
if (intel_parser.got_a_float == 1) /* "f..." */
if (current_templates->start->base_opcode == 0x62 /* bound */
|| intel_parser.got_a_float == 1) /* "f..." */
suffix = LONG_MNEM_SUFFIX;
else
suffix = QWORD_MNEM_SUFFIX;
suffix = QWORD_MNEM_SUFFIX;
i.types[this_operand].bitfield.qword = 1;
}

View File

@ -1,3 +1,9 @@
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
gas/i386/opcode-intel.d: Adjust.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.

View File

@ -15,7 +15,7 @@
.*:17: Error: .*
.*:18: Error: .*
.*:19: Error: .*
.*:20: Error: .*
.*:20: (Warning|Error): .*
.*:21: Error: .*
.*:22: Error: .*
.*:23: Error: .*
@ -51,9 +51,9 @@
.*:53: Error: .*
.*:54: Error: .*
.*:55: Error: .*
.*:56: (Warning|Error): .*
.*:56: Error: .*
.*:57: Error: .*
.*:58: Error: .*
.*:58: (Warning|Error): .*
.*:59: Error: .*
.*:60: Error: .*
.*:61: Error: .*
@ -71,13 +71,13 @@
.*:73: Error: .*
.*:74: Error: .*
.*:75: Error: .*
.*:76: Error: .*
.*:77: Error: .*
.*:78: Error: .*
.*:89: Error: .*
.*:90: Error: .*
.*:79: Error: .*
.*:80: Error: .*
.*:91: Error: .*
.*:94: Error: .*
.*:95: Error: .*
.*:92: Error: .*
.*:93: Error: .*
.*:96: Error: .*
.*:97: Error: .*
.*:98: Error: .*
@ -98,49 +98,51 @@
.*:113: Error: .*
.*:114: Error: .*
.*:115: Error: .*
.*:116: Error: .*
.*:117: Error: .*
.*:118: Error: .*
.*:119: Error: .*
.*:120: Error: .*
.*:121: Error: .*
.*:122: Error: .*
.*:123: Error: .*
.*:124: Error: .*
.*:125: Error: .*
.*:126: Error: .*
.*:127: Error: .*
.*:128: Error: .*
.*:129: Error: .*
.*:130: Error: .*
.*:131: Error: .*
.*:132: Error: .*
.*:133: Error: .*
.*:134: Error: .*
.*:135: Error: .*
.*:136: Error: .*
.*:137: Error: .*
.*:138: Error: .*
.*:139: Error: .*
.*:140: Error: .*
.*:141: Error: .*
.*:142: Error: .*
.*:143: Error: .*
.*:144: Error: .*
.*:145: Error: .*
.*:146: Error: .*
.*:147: Error: .*
.*:148: Error: .*
.*:149: Error: .*
.*:150: Error: .*
.*:151: Error: .*
#...
.*:152: Error: .*
#...
.*:153: Error: .*
#...
.*:154: Error: .*
#...
.*:155: Error: .*
.*:156: Error: .*
.*:157: Error: .*
.*:158: Error: .*
.*:159: Error: .*
.*:160: Error: .*
.*:161: Warning: .*
.*:162: Warning: .*
.*:164: Error: .*
.*:165: Warning: .*
.*:165: Error: .*
.*:161: Error: .*
.*:162: Error: .*
.*:163: Warning: .*
.*:164: Warning: .*
.*:166: Error: .*
.*:167: Warning: .*
.*:167: Error: .*

View File

@ -17,6 +17,8 @@ start:
addss xmm0, qword ptr [eax]
addss xmm0, tbyte ptr [eax]
addss xmm0, xmmword ptr [eax]
bound eax, dword ptr [ebx]
bound ax, word ptr [ebx]
call byte ptr [eax]
call qword ptr [eax]
call tbyte ptr [eax]

View File

@ -25,6 +25,8 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: f2 0f 58 00[ ]+addsd[ ]+xmm0,QWORD PTR \[eax\]
[ ]*[0-9a-f]+: f3 0f 58 00[ ]+addss[ ]+xmm0,DWORD PTR \[eax\]
[ ]*[0-9a-f]+: f3 0f 58 00[ ]+addss[ ]+xmm0,DWORD PTR \[eax\]
[ ]*[0-9a-f]+: 66 62 01[ ]+bound[ ]+ax,(DWORD PTR )?\[ecx\]
[ ]*[0-9a-f]+: 62 01[ ]+bound[ ]+eax,(QWORD PTR )?\[ecx\]
[ ]*[0-9a-f]+: 66 ff 10[ ]+call[ ]+WORD PTR \[eax\]
[ ]*[0-9a-f]+: ff 10[ ]+call[ ]+DWORD PTR \[eax\]
[ ]*[0-9a-f]+: ff 18[ ]+call[ ]+FWORD PTR \[eax\]

View File

@ -1,8 +1,8 @@
.*: Assembler messages:
.*:173: Warning: .* taken to mean just .*
.*:180: Warning: Treating .* as memory reference
.*:181: Warning: .* taken to mean just .*
.*:181: Warning: Treating .* as memory reference
.*:184: Warning: Treating .* as memory reference
.*:185: Warning: Treating .* as memory reference
.*:188: Warning: Treating .* as memory reference
.*:175: Warning: .* taken to mean just .*
.*:182: Warning: Treating .* as memory reference
.*:183: Warning: .* taken to mean just .*
.*:183: Warning: Treating .* as memory reference
.*:186: Warning: Treating .* as memory reference
.*:187: Warning: Treating .* as memory reference
.*:190: Warning: Treating .* as memory reference

View File

@ -29,6 +29,8 @@ start:
addsd xmm0, qword ptr [eax]
addss xmm0, [eax]
addss xmm0, dword ptr [eax]
bound ax, dword ptr [ecx]
bound eax, qword ptr [ecx]
call word ptr [eax]
call dword ptr [eax]
call fword ptr [eax]

View File

@ -101,7 +101,7 @@ Disassembly of section .text:
*[0-9a-f]+: 5f[ ]+pop[ ]+edi
*[0-9a-f]+: 60[ ]+pusha[ ]*
*[0-9a-f]+: 61[ ]+popa[ ]*
*[0-9a-f]+: 62 90 90 90 90 90[ ]+bound[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 62 90 90 90 90 90[ ]+bound[ ]+edx,(QWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 63 90 90 90 90 90[ ]+arpl[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
*[0-9a-f]+: 68 90 90 90 90[ ]+push[ ]+0x90909090
*[0-9a-f]+: 69 90 90 90 90 90 90 90 90 90[ ]+imul[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\],0x90909090
@ -477,7 +477,7 @@ Disassembly of section .text:
*[0-9a-f]+: 60[ ]+pusha[ ]*
*[0-9a-f]+: 66[ ]+data16
*[0-9a-f]+: 61[ ]+popa[ ]*
*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+bound[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+bound[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 66 68 90 90[ ]+push[ ]+0x9090
*[0-9a-f]+: 66 69 90 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0x9090
*[0-9a-f]+: 66[ ]+data16

View File

@ -1,3 +1,12 @@
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (a_mode): New.
(cond_jump_mode): Adjust.
(Ma): Change to a_mode.
(intel_operand_size): Handle a_mode.
* i386-opc.tbl: Allow Dword and Qword for bound.
* i386-tbl.h: Re-generate.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.

View File

@ -231,7 +231,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define Em { OP_E, m_mode }
#define Ew { OP_E, w_mode }
#define M { OP_M, 0 } /* lea, lgdt, etc. */
#define Ma { OP_M, v_mode }
#define Ma { OP_M, a_mode }
#define Mb { OP_M, b_mode }
#define Md { OP_M, d_mode }
#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
@ -378,7 +378,9 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define x_mode (t_mode + 1)
/* d_mode in 32bit, q_mode in 64bit mode. */
#define m_mode (x_mode + 1)
#define cond_jump_mode (m_mode + 1)
/* pair of v_mode operands */
#define a_mode (m_mode + 1)
#define cond_jump_mode (a_mode + 1)
#define loop_jcxz_mode (cond_jump_mode + 1)
/* operand size depends on REX prefixes. */
#define dq_mode (loop_jcxz_mode + 1)
@ -6544,6 +6546,13 @@ intel_operand_size (int bytemode, int sizeflag)
if (!(rex & REX_W))
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case a_mode:
if (sizeflag & DFLAG)
oappend ("QWORD PTR ");
else
oappend ("DWORD PTR ");
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case d_mode:
case dqd_mode:
oappend ("DWORD PTR ");

View File

@ -488,7 +488,7 @@ iret, 0, 0xcf, None, 1, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, { 0 }
// i386sl, i486sl, later 486, and Pentium.
rsm, 0, 0xfaa, None, 2, Cpu386, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
bound, 2, 0x62, None, 1, Cpu186|CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32, Unspecified|BaseIndex|Disp8|Disp16|Disp32 }
bound, 2, 0x62, None, 1, Cpu186|CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32, Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32 }
hlt, 0, 0xf4, None, 1, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }

View File

@ -3713,7 +3713,7 @@ const template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0,
1, 0, 0 } } } },
{ "hlt", 0, 0xf4, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,