Add x86-64 ILP32 support.

bfd/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_mach_x64_32): New.
	(bfd_mach_x64_32_intel_syntax): Likewise.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf32_x86_64_vec for
	i[3-7]86-*-linux-*.
	(targ_selvecs): Add bfd_elf32_x86_64_vec for x86_64-*-linux-*.

	* configure.in: Support bfd_elf32_x86_64_vec.
	* configure: Regenerated.

	* cpu-i386.c (bfd_x64_32_arch_intel_syntax): New.
	(bfd_x64_32_arch): Likewise.

	* elf-bfd.h (elf_append_rela): New prototype.
	(elf_append_rel): Likewise.
	(elf64_r_info): Likewise.
	(elf32_r_info): Likewise.
	(elf64_r_sym): Likewise.
	(elf32_r_sym): Likewise.

	* elf64-x86-64.c (ABI_64_P): New.
	(elf_x86_64_info_to_howto): Replace ELF64_R_TYPE with
	ELF32_R_TYPE.  Replace ELF64_ST_TYPE with ELF_ST_TYPE.
	(elf_x86_64_check_tls_transition):Likewise.
	(elf_x86_64_check_relocs): Likewise.
	(elf_x86_64_gc_mark_hook):Likewise.
	(elf_x86_64_gc_sweep_hook): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_reloc_type_class): Likewise.
	(ELF_DYNAMIC_INTERPRETER): Renamed to ...
	(ELF64_DYNAMIC_INTERPRETER): This.
	(ELF32_DYNAMIC_INTERPRETER): New.
	(elf_x86_64_link_hash_table): Add r_info, r_sym, swap_reloca_out,
	dynamic_interpreter and dynamic_interpreter_size.
	(elf_x86_64_get_local_sym_hash): Replace ELF64_R_SYM with
	htab->r_sym.  Replace ELF64_R_INFO with htab->r_info.
	(elf_x86_64_get_local_sym_hash): Likewise.
	(elf_x86_64_check_tls_transition):Likewise.
	(elf_x86_64_check_relocs): Likewise.
	(elf_x86_64_gc_mark_hook):Likewise.
	(elf_x86_64_gc_sweep_hook): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_finish_dynamic_symbol): Likewise.
	(elf_x86_64_finish_local_dynamic_symbol): Likewise.
	(elf_x86_64_link_hash_table_create): Initialize r_info, r_sym,
	swap_reloca_out, dynamic_interpreter and dynamic_interpreter_size.
	(elf_x86_64_check_relocs): Check ABI_64_P when requesting for
	PIC.
	(elf_x86_64_relocate_section): Likewise.
	(elf64_x86_64_adjust_dynamic_symbol): Replace sizeof
	(Elf64_External_Rela) with bed->s->sizeof_rela.
	(elf64_x86_64_allocate_dynrelocs): Likewise.
	(elf64_x86_64_size_dynamic_sections): Likewise.
	(elf64_x86_64_finish_dynamic_symbol): Likewise.
	(elf64_x86_64_append_rela): Removed.
	(elf32_x86_64_elf_object_p): New.
	Add bfd_elf32_x86_64_vec.

	* elf64-x86-64.c (elf64_x86_64_xxx): Renamed to ...
	(elf_x86_64_xxx): This.

	* elflink.c (bfd_elf_final_link): Check ELF file class on error.
	(elf_append_rela): New.
	(elf_append_rel): Likewise.
	(elf64_r_info): Likewise.
	(elf32_r_info): Likewise.
	(elf64_r_sym): Likewise.
	(elf32_r_sym): Likewise.

	* targets.c (bfd_elf32_x86_64_vec): New.
	(_bfd_target_vector): Add bfd_elf32_x86_64_vec.

gas/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (x86_elf_abi): New.
	(i386_mach): Return bfd_mach_x64_32 for ILP32.
	(OPTION_N32): Likewise.
	(md_longopts): Add "n32" for ELF.
	(md_parse_option): Handle OPTION_N32.
	(md_show_usage): Add --n32.
	(i386_target_format): Update and check x86_elf_abi.

	* config/tc-i386.h (ELF_TARGET_FORMAT32): New.

	* doc/as.texinfo: Document --n32.
	* doc/c-i386.texi: Likewise.

gas/testsuite/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/lns/ilp32.exp: New.
	* gas/i386/ilp32/lns/lns-common-1.d: Likewise.
	* gas/i386/ilp32/lns/lns-duplicate.d: Likewise.

	* gas/i386/ilp32/cfi/cfi-common-1.d: New.
	* gas/i386/ilp32/cfi/cfi-common-2.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-3.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-4.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-5.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-6.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-7.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/ilp32/cfi/ilp32.exp: Likewise.
	* gas/i386/ilp32/elf/ehopt0.d: Likewise.
	* gas/i386/ilp32/elf/equ-reloc.d: Likewise.
	* gas/i386/ilp32/elf/file.d: Likewise.
	* gas/i386/ilp32/elf/group0a.d: Likewise.
	* gas/i386/ilp32/elf/group0b.d: Likewise.
	* gas/i386/ilp32/elf/group1a.d: Likewise.
	* gas/i386/ilp32/elf/group1b.d: Likewise.
	* gas/i386/ilp32/elf/ifunc-1.d: Likewise.
	* gas/i386/ilp32/elf/ilp32.exp: Likewise.
	* gas/i386/ilp32/elf/redef.d: Likewise.
	* gas/i386/ilp32/elf/section0.d: Likewise.
	* gas/i386/ilp32/elf/section1.d: Likewise.
	* gas/i386/ilp32/elf/section3.d: Likewise.
	* gas/i386/ilp32/elf/section4.d: Likewise.
	* gas/i386/ilp32/elf/section6.d: Likewise.
	* gas/i386/ilp32/elf/section7.d: Likewise.
	* gas/i386/ilp32/elf/struct.d: Likewise.
	* gas/i386/ilp32/elf/symtab.d: Likewise.
	* gas/i386/ilp32/elf/symver.d: Likewise.

	* gas/i386/ilp32/ilp32.exp: New.
	* gas/i386/ilp32/immed64.d: Likewise.
	* gas/i386/ilp32/mixed-mode-reloc64.d: Likewise.
	* gas/i386/ilp32/reloc64.d: Likewise.
	* gas/i386/ilp32/rex.d: Likewise.
	* gas/i386/ilp32/rexw.d: Likewise.
	* gas/i386/ilp32/svme64.d: Likewise.
	* gas/i386/ilp32/x86-64-addr32.d: Likewise.
	* gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-aes.d: Likewise.
	* gas/i386/ilp32/x86-64-aes-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-amdfam10.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-1.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
	* gas/i386/ilp32/x86-64-avx.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-swap.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-swap-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-branch.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-clmul.d: Likewise.
	* gas/i386/ilp32/x86-64-clmul-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-crc32.d: Likewise.
	* gas/i386/ilp32/x86-64-crc32-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-crx.d: Likewise.
	* gas/i386/ilp32/x86-64-crx-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64.d: Likewise.
	* gas/i386/ilp32/x86-64-disp.d: Likewise.
	* gas/i386/ilp32/x86-64-disp-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-drx.d: Likewise.
	* gas/i386/ilp32/x86-64-drx-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-ept.d: Likewise.
	* gas/i386/ilp32/x86-64-ept-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-fma4.d: Likewise.
	* gas/i386/ilp32/x86-64-fma.d: Likewise.
	* gas/i386/ilp32/x86-64-fma-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-gidt.d: Likewise.
	* gas/i386/ilp32/x86-64-ifunc.d: Likewise.
	* gas/i386/ilp32/x86-64-intel64.d: Likewise.
	* gas/i386/ilp32/x86-64-io.d: Likewise.
	* gas/i386/ilp32/x86-64-io-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-io-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-localpic.d: Likewise.
	* gas/i386/ilp32/x86-64-mem.d: Likewise.
	* gas/i386/ilp32/x86-64-mem-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-movbe.d: Likewise.
	* gas/i386/ilp32/x86-64-movbe-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-opts.d: Likewise.
	* gas/i386/ilp32/x86-64-opts-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
	* gas/i386/ilp32/x86-64-reg.d: Likewise.
	* gas/i386/ilp32/x86-64-reg-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-rep.d: Likewise.
	* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-rip.d: Likewise.
	* gas/i386/ilp32/x86-64-rip-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sib.d: Likewise.
	* gas/i386/ilp32/x86-64-sib-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-simd.d: Likewise.
	* gas/i386/ilp32/x86-64-simd-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-simd-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx-opts.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx-opts-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse3.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_1.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_1-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check-none.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check-warn.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-noavx.d: Likewise.
	* gas/i386/ilp32/x86-64-ssse3.d: Likewise.
	* gas/i386/ilp32/x86-64-stack.d: Likewise.
	* gas/i386/ilp32/x86-64-stack-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-stack-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-unwind.d: Likewise.
	* gas/i386/ilp32/x86-64-vmx.d: Likewise.
	* gas/i386/ilp32/x86-64-xsave.d: Likewise.
	* gas/i386/ilp32/x86-64-xsave-intel.d: Likewise.

ld/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* emulparams/elf32_x86_64.sh: New.

	* configure.tgt (targ64_extra_emuls): Add elf32_x86_64 for
	i[3-7]86-*-linux-*.
	(targ_extra_libpath): Likewise.
	(targ_extra_emuls): Add elf32_x86_64 for x86_64-*-linux-*.
	(targ_extra_libpath): Likewise.

	* Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf32_x86_64.c.
	(eelf32_x86_64.c): New.
	* Makefile.in: Regenerated.

opcodes/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Support bfd_mach_x64_32 and
	bfd_mach_x64_32_intel_syntax.

bfd/ChangeLog

@@ -1,3 +1,78 @@
+2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* archures.c (bfd_mach_x64_32): New.
+	(bfd_mach_x64_32_intel_syntax): Likewise.
+	* bfd-in2.h: Regenerated.
+
+	* config.bfd (targ64_selvecs): Add bfd_elf32_x86_64_vec for
+	i[3-7]86-*-linux-*.
+	(targ_selvecs): Add bfd_elf32_x86_64_vec for x86_64-*-linux-*.
+
+	* configure.in: Support bfd_elf32_x86_64_vec.
+	* configure: Regenerated.
+
+	* cpu-i386.c (bfd_x64_32_arch_intel_syntax): New.
+	(bfd_x64_32_arch): Likewise.
+
+	* elf-bfd.h (elf_append_rela): New prototype.
+	(elf_append_rel): Likewise.
+	(elf64_r_info): Likewise.
+	(elf32_r_info): Likewise.
+	(elf64_r_sym): Likewise.
+	(elf32_r_sym): Likewise.
+
+	* elf64-x86-64.c (ABI_64_P): New.
+	(elf_x86_64_info_to_howto): Replace ELF64_R_TYPE with
+	ELF32_R_TYPE.  Replace ELF64_ST_TYPE with ELF_ST_TYPE.
+	(elf_x86_64_check_tls_transition):Likewise.
+	(elf_x86_64_check_relocs): Likewise.
+	(elf_x86_64_gc_mark_hook):Likewise.
+	(elf_x86_64_gc_sweep_hook): Likewise.
+	(elf_x86_64_relocate_section): Likewise.
+	(elf_x86_64_reloc_type_class): Likewise.
+	(ELF_DYNAMIC_INTERPRETER): Renamed to ...
+	(ELF64_DYNAMIC_INTERPRETER): This.
+	(ELF32_DYNAMIC_INTERPRETER): New.
+	(elf_x86_64_link_hash_table): Add r_info, r_sym, swap_reloca_out,
+	dynamic_interpreter and dynamic_interpreter_size.
+	(elf_x86_64_get_local_sym_hash): Replace ELF64_R_SYM with
+	htab->r_sym.  Replace ELF64_R_INFO with htab->r_info.
+	(elf_x86_64_get_local_sym_hash): Likewise.
+	(elf_x86_64_check_tls_transition):Likewise.
+	(elf_x86_64_check_relocs): Likewise.
+	(elf_x86_64_gc_mark_hook):Likewise.
+	(elf_x86_64_gc_sweep_hook): Likewise.
+	(elf_x86_64_relocate_section): Likewise.
+	(elf_x86_64_finish_dynamic_symbol): Likewise.
+	(elf_x86_64_finish_local_dynamic_symbol): Likewise.
+	(elf_x86_64_link_hash_table_create): Initialize r_info, r_sym,
+	swap_reloca_out, dynamic_interpreter and dynamic_interpreter_size.
+	(elf_x86_64_check_relocs): Check ABI_64_P when requesting for
+	PIC.
+	(elf_x86_64_relocate_section): Likewise.
+	(elf64_x86_64_adjust_dynamic_symbol): Replace sizeof
+	(Elf64_External_Rela) with bed->s->sizeof_rela.
+	(elf64_x86_64_allocate_dynrelocs): Likewise.
+	(elf64_x86_64_size_dynamic_sections): Likewise.
+	(elf64_x86_64_finish_dynamic_symbol): Likewise.
+	(elf64_x86_64_append_rela): Removed.
+	(elf32_x86_64_elf_object_p): New.
+	Add bfd_elf32_x86_64_vec.
+
+	* elf64-x86-64.c (elf64_x86_64_xxx): Renamed to ...
+	(elf_x86_64_xxx): This.
+
+	* elflink.c (bfd_elf_final_link): Check ELF file class on error.
+	(elf_append_rela): New.
+	(elf_append_rel): Likewise.
+	(elf64_r_info): Likewise.
+	(elf32_r_info): Likewise.
+	(elf64_r_sym): Likewise.
+	(elf32_r_sym): Likewise.
+
+	* targets.c (bfd_elf32_x86_64_vec): New.
+	(_bfd_target_vector): Add bfd_elf32_x86_64_vec.
+
 2010-12-24  Alan Modra  <amodra@gmail.com>
 
 	* compress.c (decompress_contents): Style.

bfd/archures.c

@@ -185,6 +185,8 @@ DESCRIPTION
 .#define bfd_mach_i386_i386 1
 .#define bfd_mach_i386_i8086 2
 .#define bfd_mach_i386_i386_intel_syntax 3
+.#define bfd_mach_x64_32 32
+.#define bfd_mach_x64_32_intel_syntax 33
 .#define bfd_mach_x86_64 64
 .#define bfd_mach_x86_64_intel_syntax 65
 .  bfd_arch_l1om,   {* Intel L1OM *}

bfd/bfd-in2.h

@@ -1872,6 +1872,8 @@ enum bfd_architecture
 #define bfd_mach_i386_i386 1
 #define bfd_mach_i386_i8086 2
 #define bfd_mach_i386_i386_intel_syntax 3
+#define bfd_mach_x64_32 32
+#define bfd_mach_x64_32_intel_syntax 33
 #define bfd_mach_x86_64 64
 #define bfd_mach_x86_64_intel_syntax 65
   bfd_arch_l1om,   /* Intel L1OM */

bfd/config.bfd

@@ -598,7 +598,7 @@ case "${targ}" in
   i[3-7]86-*-linux-*)
     targ_defvec=bfd_elf32_i386_vec
     targ_selvecs="i386linux_vec i386pei_vec"
-    targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec"
+    targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf32_x86_64_vec bfd_elf64_l1om_vec"
     ;;
 #ifdef BFD64
   x86_64-*-darwin*)
@@ -629,7 +629,7 @@ case "${targ}" in
     ;;
   x86_64-*-linux-*)
     targ_defvec=bfd_elf64_x86_64_vec
-    targ_selvecs="bfd_elf32_i386_vec i386linux_vec i386pei_vec x86_64pei_vec bfd_elf64_l1om_vec"
+    targ_selvecs="bfd_elf32_i386_vec bfd_elf32_x86_64_vec i386linux_vec i386pei_vec x86_64pei_vec bfd_elf64_l1om_vec"
     want64=true
     ;;
   x86_64-*-mingw*)

bfd/configure

@@ -15192,6 +15192,7 @@ do
     bfd_elf64_x86_64_freebsd_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
     bfd_elf64_x86_64_sol2_vec)  tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
     bfd_elf64_x86_64_vec)	tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
+    bfd_elf32_x86_64_vec)	tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo elf32.lo $elf"; target_size=64 ;;
     bfd_elf64_l1om_vec)		tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
     bfd_elf64_l1om_freebsd_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
     bfd_mmo_vec)		tb="$tb mmo.lo" target_size=64 ;;

bfd/configure.in

@@ -827,6 +827,7 @@ do
     bfd_elf64_x86_64_freebsd_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
     bfd_elf64_x86_64_sol2_vec)  tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
     bfd_elf64_x86_64_vec)	tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
+    bfd_elf32_x86_64_vec)	tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo elf32.lo $elf"; target_size=64 ;;
     bfd_elf64_l1om_vec)		tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
     bfd_elf64_l1om_freebsd_vec) tb="$tb elf64-x86-64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
     bfd_mmo_vec)		tb="$tb mmo.lo" target_size=64 ;;

bfd/cpu-i386.c

@@ -24,6 +24,22 @@
 #include "bfd.h"
 #include "libbfd.h"
 
+static const bfd_arch_info_type bfd_x64_32_arch_intel_syntax =
+{
+  64, /* 64 bits in a word */
+  32, /* 32 bits in an address */
+  8,  /* 8 bits in a byte */
+  bfd_arch_i386,
+  bfd_mach_x64_32_intel_syntax,
+  "i386:intel",
+  "i386:x64-32:intel",
+  3,
+  FALSE,
+  bfd_default_compatible,
+  bfd_default_scan,
+  0
+};
+
 static const bfd_arch_info_type bfd_x86_64_arch_intel_syntax =
 {
   64, /* 64 bits in a word */
@@ -37,7 +53,7 @@ static const bfd_arch_info_type bfd_x86_64_arch_intel_syntax =
   FALSE,
   bfd_default_compatible,
   bfd_default_scan,
-  0
+  &bfd_x64_32_arch_intel_syntax,
 };
 
 static const bfd_arch_info_type bfd_i386_arch_intel_syntax =
@@ -72,6 +88,22 @@ static const bfd_arch_info_type i8086_arch =
   &bfd_i386_arch_intel_syntax
 };
 
+static const bfd_arch_info_type bfd_x64_32_arch =
+{
+  64, /* 64 bits in a word */
+  32, /* 32 bits in an address */
+  8,  /* 8 bits in a byte */
+  bfd_arch_i386,
+  bfd_mach_x64_32,
+  "i386",
+  "i386:x64-32",
+  3,
+  FALSE,
+  bfd_default_compatible,
+  bfd_default_scan,
+  &i8086_arch
+};
+
 static const bfd_arch_info_type bfd_x86_64_arch =
 {
   64, /* 64 bits in a word */
@@ -85,7 +117,7 @@ static const bfd_arch_info_type bfd_x86_64_arch =
   FALSE,
   bfd_default_compatible,
   bfd_default_scan,
-  &i8086_arch
+  &bfd_x64_32_arch
 };
 
 const bfd_arch_info_type bfd_i386_arch =

bfd/elf-bfd.h

@@ -2272,6 +2272,14 @@ extern bfd_boolean _bfd_elf_allocate_ifunc_dyn_relocs
   (struct bfd_link_info *, struct elf_link_hash_entry *,
    struct elf_dyn_relocs **, unsigned int, unsigned int);
 
+extern void elf_append_rela (bfd *, asection *, Elf_Internal_Rela *);
+extern void elf_append_rel (bfd *, asection *, Elf_Internal_Rela *);
+
+extern bfd_vma elf64_r_info (bfd_vma, bfd_vma);
+extern bfd_vma elf64_r_sym (bfd_vma);
+extern bfd_vma elf32_r_info (bfd_vma, bfd_vma);
+extern bfd_vma elf32_r_sym (bfd_vma);
+
 /* Large common section.  */
 extern asection _bfd_elf_large_com_section;
 

bfd/elflink.c

@@ -10690,7 +10690,34 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info)
 	  else
 	    {
 	      if (! _bfd_default_link_order (abfd, info, o, p))
-		goto error_return;
+		{
+		  if (p->type == bfd_indirect_link_order
+		      && (bfd_get_flavour (sub)
+			  == bfd_target_elf_flavour)
+		      && (elf_elfheader (sub)->e_ident[EI_CLASS]
+			  != bed->s->elfclass))
+		    {
+		      const char *iclass, *oclass;
+
+		      if (bed->s->elfclass == ELFCLASS64)
+			{
+			  iclass = "ELFCLASS32";
+			  oclass = "ELFCLASS64";
+			}
+		      else
+			{
+			  iclass = "ELFCLASS64";
+			  oclass = "ELFCLASS32";
+			}
+
+		      bfd_set_error (bfd_error_wrong_format);
+		      (*_bfd_error_handler)
+			(_("%B: file class %s incompatible with %s"),
+			 sub, iclass, oclass);
+		    }
+
+		  goto error_return;
+		}
 	    }
 	}
     }
@@ -12702,3 +12729,57 @@ _bfd_elf_copy_link_hash_symbol_type (bfd *abfd ATTRIBUTE_UNUSED,
 
   ehdest->type = ehsrc->type;
 }
+
+/* Append a RELA relocation REL to section S in BFD.  */
+
+void
+elf_append_rela (bfd *abfd, asection *s, Elf_Internal_Rela *rel)
+{
+  const struct elf_backend_data *bed = get_elf_backend_data (abfd);
+  bfd_byte *loc = s->contents + (s->reloc_count++ * bed->s->sizeof_rela);
+  BFD_ASSERT (loc + bed->s->sizeof_rela <= s->contents + s->size);
+  bed->s->swap_reloca_out (abfd, rel, loc);
+}
+
+/* Append a REL relocation REL to section S in BFD.  */
+
+void
+elf_append_rel (bfd *abfd, asection *s, Elf_Internal_Rela *rel)
+{
+  const struct elf_backend_data *bed = get_elf_backend_data (abfd);
+  bfd_byte *loc = s->contents + (s->reloc_count++ * bed->s->sizeof_rel);
+  BFD_ASSERT (loc + bed->s->sizeof_rel <= s->contents + s->size);
+  bed->s->swap_reloca_out (abfd, rel, loc);
+}
+
+/* Function for ELF64_R_INFO.  */
+
+bfd_vma
+elf64_r_info (bfd_vma sym, bfd_vma type)
+{
+  return ELF64_R_INFO (sym, type);
+}
+
+/* Function for ELF32_R_INFO.  */
+
+bfd_vma
+elf32_r_info (bfd_vma sym, bfd_vma type)
+{
+  return ELF32_R_INFO (sym, type);
+}
+
+/* Function for ELF64_R_SYM .  */
+
+bfd_vma
+elf64_r_sym (bfd_vma r_info)
+{
+  return ELF64_R_SYM (r_info);
+}
+
+/* Function for ELF32_R_SYM .  */
+
+bfd_vma
+elf32_r_sym (bfd_vma r_info)
+{
+  return ELF32_R_SYM (r_info);
+}

bfd/targets.c

@@ -720,6 +720,7 @@ extern const bfd_target bfd_elf64_tradlittlemips_vec;
 extern const bfd_target bfd_elf64_x86_64_freebsd_vec;
 extern const bfd_target bfd_elf64_x86_64_sol2_vec;
 extern const bfd_target bfd_elf64_x86_64_vec;
+extern const bfd_target bfd_elf32_x86_64_vec;
 extern const bfd_target bfd_elf64_l1om_freebsd_vec;
 extern const bfd_target bfd_elf64_l1om_vec;
 extern const bfd_target bfd_mmo_vec;
@@ -1072,6 +1073,7 @@ static const bfd_target * const _bfd_target_vector[] =
 	&bfd_elf64_x86_64_freebsd_vec,
 	&bfd_elf64_x86_64_sol2_vec,
 	&bfd_elf64_x86_64_vec,
+	&bfd_elf32_x86_64_vec,
 	&bfd_elf64_l1om_freebsd_vec,
 	&bfd_elf64_l1om_vec,
 	&bfd_mmo_vec,

gas/ChangeLog

@@ -1,3 +1,18 @@
+2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (x86_elf_abi): New.
+	(i386_mach): Return bfd_mach_x64_32 for ILP32.
+	(OPTION_N32): Likewise.
+	(md_longopts): Add "n32" for ELF.
+	(md_parse_option): Handle OPTION_N32.
+	(md_show_usage): Add --n32.
+	(i386_target_format): Update and check x86_elf_abi.
+
+	* config/tc-i386.h (ELF_TARGET_FORMAT32): New.
+
+	* doc/as.texinfo: Document --n32.
+	* doc/c-i386.texi: Likewise.
+
 2010-12-26  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 
 	PR gas/11395

gas/config/tc-i386.c

@@ -391,6 +391,16 @@ static enum flag_code flag_code;
 static unsigned int object_64bit;
 static int use_rela_relocations = 0;
 
+/* The ELF ABI to use.  */
+enum x86_elf_abi
+{
+  I386_ABI,
+  X86_64_LP64_ABI,
+  X86_64_ILP32_ABI
+};
+
+static enum x86_elf_abi x86_elf_abi = I386_ABI;
+
 /* The names used to print error messages.  */
 static const char *flag_code_names[] =
   {
@@ -2207,16 +2217,19 @@ i386_arch (void)
 unsigned long
 i386_mach ()
 {
-  if (!strcmp (default_arch, "x86_64"))
+  if (!strncmp (default_arch, "x86_64", 6))
     {
       if (cpu_arch_isa == PROCESSOR_L1OM)
 	{
-	  if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
+	  if (OUTPUT_FLAVOR != bfd_target_elf_flavour
+	      || default_arch[6] != '\0')
 	    as_fatal (_("Intel L1OM is 64bit ELF only"));
 	  return bfd_mach_l1om;
 	}
-      else
+      else if (default_arch[6] == '\0')
 	return bfd_mach_x86_64;
+      else
+	return bfd_mach_x64_32;
     }
   else if (!strcmp (default_arch, "i386"))
     return bfd_mach_i386_i386;
@@ -8093,6 +8106,7 @@ const char *md_shortopts = "qn";
 #define OPTION_MSSE2AVX (OPTION_MD_BASE + 10)
 #define OPTION_MSSE_CHECK (OPTION_MD_BASE + 11)
 #define OPTION_MAVXSCALAR (OPTION_MD_BASE + 12)
+#define OPTION_N32 (OPTION_MD_BASE + 13)
 
 struct option md_longopts[] =
 {
@@ -8100,6 +8114,9 @@ struct option md_longopts[] =
 #if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
      || defined (TE_PE) || defined (TE_PEP))
   {"64", no_argument, NULL, OPTION_64},
+#endif
+#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+  {"n32", no_argument, NULL, OPTION_N32},
 #endif
   {"divide", no_argument, NULL, OPTION_DIVIDE},
   {"march", required_argument, NULL, OPTION_MARCH},
@@ -8175,6 +8192,28 @@ md_parse_option (int c, char *arg)
       break;
 #endif
 
+#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+    case OPTION_N32:
+      if (IS_ELF)
+	{
+	  const char **list, **l;
+
+	  list = bfd_target_list ();
+	  for (l = list; *l != NULL; l++)
+	    if (CONST_STRNEQ (*l, "elf32-x86-64"))
+	      {
+		default_arch = "x86_64:32";
+		break;
+	      }
+	  if (*l == NULL)
+	    as_fatal (_("No compiled in support for 32bit x86_64"));
+	  free (list);
+	}
+      else
+	as_fatal (_("32bit x86_64 is only supported for ELF"));
+      break;
+#endif
+
     case OPTION_32:
       default_arch = "i386";
       break;
@@ -8438,7 +8477,7 @@ md_show_usage (FILE *stream)
 #if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
      || defined (TE_PE) || defined (TE_PEP))
   fprintf (stream, _("\
-  --32/--64               generate 32bit/64bit code\n"));
+  --32/--64/--n32         generate 32bit/64bit/n32bit code\n"));
 #endif
 #ifdef SVR4_COMMENT_CHARS
   fprintf (stream, _("\
@@ -8486,8 +8525,14 @@ md_show_usage (FILE *stream)
 const char *
 i386_target_format (void)
 {
-  if (!strcmp (default_arch, "x86_64"))
-    update_code_flag (CODE_64BIT, 1);
+  if (!strncmp (default_arch, "x86_64", 6))
+    {
+      update_code_flag (CODE_64BIT, 1);
+      if (default_arch[6] == '\0')
+	x86_elf_abi = X86_64_LP64_ABI;
+      else
+	x86_elf_abi = X86_64_ILP32_ABI;
+    }
   else if (!strcmp (default_arch, "i386"))
     update_code_flag (CODE_32BIT, 1);
   else
@@ -8519,20 +8564,32 @@ i386_target_format (void)
 #if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
     case bfd_target_elf_flavour:
       {
-	if (flag_code == CODE_64BIT)
+	const char *format;
+
+	switch (x86_elf_abi)
 	  {
-	    object_64bit = 1;
+	  default:
+	    format = ELF_TARGET_FORMAT;
+	    break;
+	  case X86_64_LP64_ABI:
 	    use_rela_relocations = 1;
+	    object_64bit = 1;
+	    format = ELF_TARGET_FORMAT64;
+	    break;
+	  case X86_64_ILP32_ABI:
+	    use_rela_relocations = 1;
+	    object_64bit = 1;
+	    format = ELF_TARGET_FORMAT32;
+	    break;
 	  }
 	if (cpu_arch_isa == PROCESSOR_L1OM)
 	  {
-	    if (flag_code != CODE_64BIT)
+	    if (x86_elf_abi != X86_64_LP64_ABI)
 	      as_fatal (_("Intel L1OM is 64bit only"));
 	    return ELF_TARGET_L1OM_FORMAT;
 	  }
 	else
-	  return (flag_code == CODE_64BIT
-		  ? ELF_TARGET_FORMAT64 : ELF_TARGET_FORMAT);
+	  return format;
       }
 #endif
 #if defined (OBJ_MACH_O)

gas/config/tc-i386.h

@@ -76,6 +76,10 @@ extern unsigned long i386_mach (void);
 #define ELF_TARGET_FORMAT64	"elf64-x86-64"
 #endif
 
+#ifndef ELF_TARGET_FORMAT32
+#define ELF_TARGET_FORMAT32	"elf32-x86-64"
+#endif
+
 #ifndef ELF_TARGET_L1OM_FORMAT
 #define ELF_TARGET_L1OM_FORMAT	"elf64-l1om"
 #endif

gas/doc/as.texinfo

@@ -315,7 +315,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
 @ifset I80386
 
 @emph{Target i386 options:}
-   [@b{--32}|@b{--64}] [@b{-n}]
+   [@b{--32}|@b{--n32}|@b{--64}] [@b{-n}]
    [@b{-march}=@var{CPU}[+@var{EXTENSION}@dots{}]] [@b{-mtune}=@var{CPU}]
 @end ifset
 @ifset I960

gas/doc/c-i386.texi

@@ -56,11 +56,14 @@ dependent options:
 @table @gcctabopt
 @cindex @samp{--32} option, i386
 @cindex @samp{--32} option, x86-64
+@cindex @samp{--n32} option, i386
+@cindex @samp{--n32} option, x86-64
 @cindex @samp{--64} option, i386
 @cindex @samp{--64} option, x86-64
-@item --32 | --64
+@item --32 | --n32 | --64
 Select the word size, either 32 bits or 64 bits. Selecting 32-bit
 implies Intel i386 architecture, while 64-bit implies AMD x86-64
+architecture.  @samp{--n32} selects 32bit word size with AMD x86-64
 architecture.
 
 These options are only available with the ELF object file format, and

gas/testsuite/ChangeLog

@@ -1,3 +1,137 @@
+2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/ilp32/lns/ilp32.exp: New.
+	* gas/i386/ilp32/lns/lns-common-1.d: Likewise.
+	* gas/i386/ilp32/lns/lns-duplicate.d: Likewise.
+
+	* gas/i386/ilp32/cfi/cfi-common-1.d: New.
+	* gas/i386/ilp32/cfi/cfi-common-2.d: Likewise.
+	* gas/i386/ilp32/cfi/cfi-common-3.d: Likewise.
+	* gas/i386/ilp32/cfi/cfi-common-4.d: Likewise.
+	* gas/i386/ilp32/cfi/cfi-common-5.d: Likewise.
+	* gas/i386/ilp32/cfi/cfi-common-6.d: Likewise.
+	* gas/i386/ilp32/cfi/cfi-common-7.d: Likewise.
+	* gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise.
+	* gas/i386/ilp32/cfi/ilp32.exp: Likewise.
+	* gas/i386/ilp32/elf/ehopt0.d: Likewise.
+	* gas/i386/ilp32/elf/equ-reloc.d: Likewise.
+	* gas/i386/ilp32/elf/file.d: Likewise.
+	* gas/i386/ilp32/elf/group0a.d: Likewise.
+	* gas/i386/ilp32/elf/group0b.d: Likewise.
+	* gas/i386/ilp32/elf/group1a.d: Likewise.
+	* gas/i386/ilp32/elf/group1b.d: Likewise.
+	* gas/i386/ilp32/elf/ifunc-1.d: Likewise.
+	* gas/i386/ilp32/elf/ilp32.exp: Likewise.
+	* gas/i386/ilp32/elf/redef.d: Likewise.
+	* gas/i386/ilp32/elf/section0.d: Likewise.
+	* gas/i386/ilp32/elf/section1.d: Likewise.
+	* gas/i386/ilp32/elf/section3.d: Likewise.
+	* gas/i386/ilp32/elf/section4.d: Likewise.
+	* gas/i386/ilp32/elf/section6.d: Likewise.
+	* gas/i386/ilp32/elf/section7.d: Likewise.
+	* gas/i386/ilp32/elf/struct.d: Likewise.
+	* gas/i386/ilp32/elf/symtab.d: Likewise.
+	* gas/i386/ilp32/elf/symver.d: Likewise.
+
+	* gas/i386/ilp32/ilp32.exp: New.
+	* gas/i386/ilp32/immed64.d: Likewise.
+	* gas/i386/ilp32/mixed-mode-reloc64.d: Likewise.
+	* gas/i386/ilp32/reloc64.d: Likewise.
+	* gas/i386/ilp32/rex.d: Likewise.
+	* gas/i386/ilp32/rexw.d: Likewise.
+	* gas/i386/ilp32/svme64.d: Likewise.
+	* gas/i386/ilp32/x86-64-addr32.d: Likewise.
+	* gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-aes.d: Likewise.
+	* gas/i386/ilp32/x86-64-aes-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-amdfam10.d: Likewise.
+	* gas/i386/ilp32/x86-64-arch-1.d: Likewise.
+	* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
+	* gas/i386/ilp32/x86-64-avx.d: Likewise.
+	* gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-avx-swap.d: Likewise.
+	* gas/i386/ilp32/x86-64-avx-swap-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-branch.d: Likewise.
+	* gas/i386/ilp32/x86-64-cbw.d: Likewise.
+	* gas/i386/ilp32/x86-64-cbw-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-clmul.d: Likewise.
+	* gas/i386/ilp32/x86-64-clmul-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-crc32.d: Likewise.
+	* gas/i386/ilp32/x86-64-crc32-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-crx.d: Likewise.
+	* gas/i386/ilp32/x86-64-crx-suffix.d: Likewise.
+	* gas/i386/ilp32/x86-64.d: Likewise.
+	* gas/i386/ilp32/x86-64-disp.d: Likewise.
+	* gas/i386/ilp32/x86-64-disp-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-drx.d: Likewise.
+	* gas/i386/ilp32/x86-64-drx-suffix.d: Likewise.
+	* gas/i386/ilp32/x86-64-ept.d: Likewise.
+	* gas/i386/ilp32/x86-64-ept-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-fma4.d: Likewise.
+	* gas/i386/ilp32/x86-64-fma.d: Likewise.
+	* gas/i386/ilp32/x86-64-fma-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-gidt.d: Likewise.
+	* gas/i386/ilp32/x86-64-ifunc.d: Likewise.
+	* gas/i386/ilp32/x86-64-intel64.d: Likewise.
+	* gas/i386/ilp32/x86-64-io.d: Likewise.
+	* gas/i386/ilp32/x86-64-io-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-io-suffix.d: Likewise.
+	* gas/i386/ilp32/x86-64-localpic.d: Likewise.
+	* gas/i386/ilp32/x86-64-mem.d: Likewise.
+	* gas/i386/ilp32/x86-64-mem-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-movbe.d: Likewise.
+	* gas/i386/ilp32/x86-64-movbe-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-5.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
+	* gas/i386/ilp32/x86-64-nops.d: Likewise.
+	* gas/i386/ilp32/x86-64-opcode.d: Likewise.
+	* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
+	* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-opts.d: Likewise.
+	* gas/i386/ilp32/x86-64-opts-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
+	* gas/i386/ilp32/x86-64-reg.d: Likewise.
+	* gas/i386/ilp32/x86-64-reg-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-rep.d: Likewise.
+	* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
+	* gas/i386/ilp32/x86-64-rip.d: Likewise.
+	* gas/i386/ilp32/x86-64-rip-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-sib.d: Likewise.
+	* gas/i386/ilp32/x86-64-sib-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-simd.d: Likewise.
+	* gas/i386/ilp32/x86-64-simd-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-simd-suffix.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse2avx-opts.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse2avx-opts-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse3.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse4_1.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse4_1-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse-check.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse-check-none.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse-check-warn.d: Likewise.
+	* gas/i386/ilp32/x86-64-sse-noavx.d: Likewise.
+	* gas/i386/ilp32/x86-64-ssse3.d: Likewise.
+	* gas/i386/ilp32/x86-64-stack.d: Likewise.
+	* gas/i386/ilp32/x86-64-stack-intel.d: Likewise.
+	* gas/i386/ilp32/x86-64-stack-suffix.d: Likewise.
+	* gas/i386/ilp32/x86-64-unwind.d: Likewise.
+	* gas/i386/ilp32/x86-64-vmx.d: Likewise.
+	* gas/i386/ilp32/x86-64-xsave.d: Likewise.
+	* gas/i386/ilp32/x86-64-xsave-intel.d: Likewise.
+
 2010-12-26  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 
 	PR gas/11395

gas/testsuite/gas/i386/ilp32/cfi/cfi-common-1.d

@@ -0,0 +1,25 @@
+#source: ../../../cfi/cfi-common-1.s
+#readelf: -wf
+#name: CFI common 1
+Contents of the .eh_frame section:
+
+00000000 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     [01]b
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000014 000000(18|1c|20) 00000018 FDE cie=00000000 pc=.*
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
+  DW_CFA_offset(_extended_sf|): r1( \((rdx|ecx)\)|) at cfa-8
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_def_cfa_offset: 32
+  DW_CFA_offset(_extended_sf|): r2( \((rcx|edx)\)|) at cfa-24
+#...

gas/testsuite/gas/i386/ilp32/cfi/cfi-common-2.d

@@ -0,0 +1,25 @@
+#source: ../../../cfi/cfi-common-2.s
+#readelf: -wf
+#name: CFI common 2
+Contents of the .eh_frame section:
+
+00000000 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     [01]b
+#...
+00000014 000000[12][c0] 00000018 FDE cie=00000000 pc=.*
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_remember_state
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_def_cfa_offset: 0
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_restore_state
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_def_cfa_offset: 0
+#pass

gas/testsuite/gas/i386/ilp32/cfi/cfi-common-3.d

@@ -0,0 +1,18 @@
+#source: ../../../cfi/cfi-common-3.s
+#readelf: -wf
+#name: CFI common 3
+Contents of the .eh_frame section:
+
+00000000 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     [01]b
+#...
+00000014 00000010 00000018 FDE cie=00000000 pc=.*
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_remember_state
+  DW_CFA_restore_state
+#pass

gas/testsuite/gas/i386/ilp32/cfi/cfi-common-4.d

@@ -0,0 +1,21 @@
+#source: ../../../cfi/cfi-common-4.s
+#readelf: -wf
+#name: CFI common 4
+Contents of the .eh_frame section:
+
+00000000 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     [01]b
+#...
+00000014 00000010 00000018 FDE cie=00000000 pc=.*
+  DW_CFA_remember_state
+  DW_CFA_restore_state
+#...
+00000028 0000001[04] 0000002c FDE cie=00000000 pc=.*
+  DW_CFA_remember_state
+  DW_CFA_restore_state
+#pass

gas/testsuite/gas/i386/ilp32/cfi/cfi-common-5.d

@@ -0,0 +1,25 @@
+#source: ../../../cfi/cfi-common-5.s
+#readelf: -wf
+#name: CFI common 5
+Contents of the .eh_frame section:
+
+00000000 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     [01]b
+#...
+00000014 00000014 00000018 FDE cie=00000000 pc=.*
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_remember_state
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_restore_state
+#...
+0000002c 0000001[48] 00000030 FDE cie=00000000 pc=.*
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
+  DW_CFA_advance_loc: 4 to .*
+  DW_CFA_def_cfa_offset: 0
+#pass

gas/testsuite/gas/i386/ilp32/cfi/cfi-common-6.d

@@ -0,0 +1,74 @@
+#source: ../../../cfi/cfi-common-6.s
+#readelf: -wf
+#name: CFI common 6
+Contents of the .eh_frame section:
+
+00000000 00000018 00000000 CIE
+  Version:               1
+  Augmentation:          "zPLR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     03 .. .. .. .. 0c 1b
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+0000001c 00000018 00000020 FDE cie=00000000 pc=000000(00|24)..000000(04|28)
+  Augmentation data:     (00 00 00 00 de ad be ef|ef be ad de 00 00 00 00)
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000038 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zLR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     0c 1b
+
+  DW_CFA_nop
+
+0000004c 00000018 00000018 FDE cie=00000038 pc=000000(04|58)..000000(08|5c)
+  Augmentation data:     (00 00 00 00 de ad be ef|ef be ad de 00 00 00 00)
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000068 00000018 0000006c FDE cie=00000000 pc=000000(08|78)..000000(0c|7c)
+  Augmentation data:     (00 00 00 00 be ef de ad|ad de ef be 00 00 00 00)
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000084 00000018 00000000 CIE
+  Version:               1
+  Augmentation:          "zPLR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     1b .. .. .. .. 1b 1b
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+000000a0 00000014 00000020 FDE cie=00000084 pc=000000(0c|b4)..000000(10|b8)
+  Augmentation data:     .. .. .. ..
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+000000b8 00000014 00000038 FDE cie=00000084 pc=000000(10|d0)..000000(14|d4)
+  Augmentation data:     .. .. .. ..
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+

gas/testsuite/gas/i386/ilp32/cfi/cfi-common-7.d

@@ -0,0 +1,23 @@
+#source: ../../../cfi/cfi-common-7.s
+#readelf: -wf
+#name: CFI common 7
+Contents of the .eh_frame section:
+
+00000000 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: .*
+  Data alignment factor: .*
+  Return address column: .*
+  Augmentation data:     [01]b
+
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000014 000000(18|1c|20) 00000018 FDE cie=00000000 pc=.*
+  DW_CFA_advance_loc: 16 to .*
+  DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
+  DW_CFA_advance_loc[24]: 75040 to .*
+  DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 64
+#...

gas/testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d

@@ -0,0 +1,224 @@
+#source: ../../../cfi/cfi-x86_64.s
+#readelf: -wf
+#name: CFI on x86-64
+Contents of the .eh_frame section:
+
+00000000 00000014 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 1
+  Data alignment factor: -8
+  Return address column: 16
+  Augmentation data:     1b
+
+  DW_CFA_def_cfa: r7 \(rsp\) ofs 8
+  DW_CFA_offset: r16 \(rip\) at cfa-8
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000018 00000014 0000001c FDE cie=00000000 pc=00000000..00000014
+  DW_CFA_advance_loc: 7 to 00000007
+  DW_CFA_def_cfa_offset: 4668
+  DW_CFA_advance_loc: 12 to 00000013
+  DW_CFA_def_cfa_offset: 8
+
+00000030 0000001c 00000034 FDE cie=00000000 pc=00000014..00000022
+  DW_CFA_advance_loc: 1 to 00000015
+  DW_CFA_def_cfa_offset: 16
+  DW_CFA_offset: r6 \(rbp\) at cfa-16
+  DW_CFA_advance_loc: 3 to 00000018
+  DW_CFA_def_cfa_register: r6 \(rbp\)
+  DW_CFA_advance_loc: 9 to 00000021
+  DW_CFA_def_cfa: r7 \(rsp\) ofs 8
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000050 00000014 00000054 FDE cie=00000000 pc=00000022..00000035
+  DW_CFA_advance_loc: 3 to 00000025
+  DW_CFA_def_cfa_register: r8 \(r8\)
+  DW_CFA_advance_loc: 15 to 00000034
+  DW_CFA_def_cfa_register: r7 \(rsp\)
+  DW_CFA_nop
+
+00000068 00000010 0000006c FDE cie=00000000 pc=00000035..0000003b
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+0000007c 00000010 00000080 FDE cie=00000000 pc=0000003b..0000004d
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop
+
+00000090 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 1
+  Data alignment factor: -8
+  Return address column: 16
+  Augmentation data:     1b
+
+  DW_CFA_def_cfa: r7 \(rsp\) ofs 8
+
+000000a4 0000002c 00000018 FDE cie=00000090 pc=0000004d..00000058
+  DW_CFA_advance_loc: 1 to 0000004e
+  DW_CFA_def_cfa_offset: 16
+  DW_CFA_advance_loc: 1 to 0000004f
+  DW_CFA_def_cfa_register: r8 \(r8\)
+  DW_CFA_advance_loc: 1 to 00000050
+  DW_CFA_def_cfa_offset: 4676
+  DW_CFA_advance_loc: 1 to 00000051
+  DW_CFA_offset_extended_sf: r4 \(rsi\) at cfa\+16
+  DW_CFA_advance_loc: 1 to 00000052
+  DW_CFA_register: r8 \(r8\) in r9 \(r9\)
+  DW_CFA_advance_loc: 1 to 00000053
+  DW_CFA_remember_state
+  DW_CFA_advance_loc: 1 to 00000054
+  DW_CFA_restore: r6 \(rbp\)
+  DW_CFA_advance_loc: 1 to 00000055
+  DW_CFA_undefined: r16 \(rip\)
+  DW_CFA_advance_loc: 1 to 00000056
+  DW_CFA_same_value: r3 \(rbx\)
+  DW_CFA_advance_loc: 1 to 00000057
+  DW_CFA_restore_state
+  DW_CFA_nop
+
+000000d4 00000010 00000000 CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 1
+  Data alignment factor: -8
+  Return address column: 16
+  Augmentation data:     1b
+
+  DW_CFA_undefined: r16 \(rip\)
+  DW_CFA_nop
+
+000000e8 000000c8 00000018 FDE cie=000000d4 pc=00000058..00000097
+  DW_CFA_advance_loc: 1 to 00000059
+  DW_CFA_undefined: r0 \(rax\)
+  DW_CFA_advance_loc: 1 to 0000005a
+  DW_CFA_undefined: r2 \(rcx\)
+  DW_CFA_advance_loc: 1 to 0000005b
+  DW_CFA_undefined: r1 \(rdx\)
+  DW_CFA_advance_loc: 1 to 0000005c
+  DW_CFA_undefined: r3 \(rbx\)
+  DW_CFA_advance_loc: 1 to 0000005d
+  DW_CFA_undefined: r7 \(rsp\)
+  DW_CFA_advance_loc: 1 to 0000005e
+  DW_CFA_undefined: r6 \(rbp\)
+  DW_CFA_advance_loc: 1 to 0000005f
+  DW_CFA_undefined: r4 \(rsi\)
+  DW_CFA_advance_loc: 1 to 00000060
+  DW_CFA_undefined: r5 \(rdi\)
+  DW_CFA_advance_loc: 1 to 00000061
+  DW_CFA_undefined: r8 \(r8\)
+  DW_CFA_advance_loc: 1 to 00000062
+  DW_CFA_undefined: r9 \(r9\)
+  DW_CFA_advance_loc: 1 to 00000063
+  DW_CFA_undefined: r10 \(r10\)
+  DW_CFA_advance_loc: 1 to 00000064
+  DW_CFA_undefined: r11 \(r11\)
+  DW_CFA_advance_loc: 1 to 00000065
+  DW_CFA_undefined: r12 \(r12\)
+  DW_CFA_advance_loc: 1 to 00000066
+  DW_CFA_undefined: r13 \(r13\)
+  DW_CFA_advance_loc: 1 to 00000067
+  DW_CFA_undefined: r14 \(r14\)
+  DW_CFA_advance_loc: 1 to 00000068
+  DW_CFA_undefined: r15 \(r15\)
+  DW_CFA_advance_loc: 1 to 00000069
+  DW_CFA_undefined: r49 \([er]flags\)
+  DW_CFA_advance_loc: 1 to 0000006a
+  DW_CFA_undefined: r50 \(es\)
+  DW_CFA_advance_loc: 1 to 0000006b
+  DW_CFA_undefined: r51 \(cs\)
+  DW_CFA_advance_loc: 1 to 0000006c
+  DW_CFA_undefined: r53 \(ds\)
+  DW_CFA_advance_loc: 1 to 0000006d
+  DW_CFA_undefined: r52 \(ss\)
+  DW_CFA_advance_loc: 1 to 0000006e
+  DW_CFA_undefined: r54 \(fs\)
+  DW_CFA_advance_loc: 1 to 0000006f
+  DW_CFA_undefined: r55 \(gs\)
+  DW_CFA_advance_loc: 1 to 00000070
+  DW_CFA_undefined: r62 \(tr\)
+  DW_CFA_advance_loc: 1 to 00000071
+  DW_CFA_undefined: r63 \(ldtr\)
+  DW_CFA_advance_loc: 1 to 00000072
+  DW_CFA_undefined: r58 \(fs\.base\)
+  DW_CFA_advance_loc: 1 to 00000073
+  DW_CFA_undefined: r59 \(gs\.base\)
+  DW_CFA_advance_loc: 1 to 00000074
+  DW_CFA_undefined: r64 \(mxcsr\)
+  DW_CFA_advance_loc: 1 to 00000075
+  DW_CFA_undefined: r17 \(xmm0\)
+  DW_CFA_advance_loc: 1 to 00000076
+  DW_CFA_undefined: r18 \(xmm1\)
+  DW_CFA_advance_loc: 1 to 00000077
+  DW_CFA_undefined: r19 \(xmm2\)
+  DW_CFA_advance_loc: 1 to 00000078
+  DW_CFA_undefined: r20 \(xmm3\)
+  DW_CFA_advance_loc: 1 to 00000079
+  DW_CFA_undefined: r21 \(xmm4\)
+  DW_CFA_advance_loc: 1 to 0000007a
+  DW_CFA_undefined: r22 \(xmm5\)
+  DW_CFA_advance_loc: 1 to 0000007b
+  DW_CFA_undefined: r23 \(xmm6\)
+  DW_CFA_advance_loc: 1 to 0000007c
+  DW_CFA_undefined: r24 \(xmm7\)
+  DW_CFA_advance_loc: 1 to 0000007d
+  DW_CFA_undefined: r25 \(xmm8\)
+  DW_CFA_advance_loc: 1 to 0000007e
+  DW_CFA_undefined: r26 \(xmm9\)
+  DW_CFA_advance_loc: 1 to 0000007f
+  DW_CFA_undefined: r27 \(xmm10\)
+  DW_CFA_advance_loc: 1 to 00000080
+  DW_CFA_undefined: r28 \(xmm11\)
+  DW_CFA_advance_loc: 1 to 00000081
+  DW_CFA_undefined: r29 \(xmm12\)
+  DW_CFA_advance_loc: 1 to 00000082
+  DW_CFA_undefined: r30 \(xmm13\)
+  DW_CFA_advance_loc: 1 to 00000083
+  DW_CFA_undefined: r31 \(xmm14\)
+  DW_CFA_advance_loc: 1 to 00000084
+  DW_CFA_undefined: r32 \(xmm15\)
+  DW_CFA_advance_loc: 1 to 00000085
+  DW_CFA_undefined: r65 \(fcw\)
+  DW_CFA_advance_loc: 1 to 00000086
+  DW_CFA_undefined: r66 \(fsw\)
+  DW_CFA_advance_loc: 1 to 00000087
+  DW_CFA_undefined: r33 \(st\(?0?\)?\)
+  DW_CFA_advance_loc: 1 to 00000088
+  DW_CFA_undefined: r34 \(st\(?1\)?\)
+  DW_CFA_advance_loc: 1 to 00000089
+  DW_CFA_undefined: r35 \(st\(?2\)?\)
+  DW_CFA_advance_loc: 1 to 0000008a
+  DW_CFA_undefined: r36 \(st\(?3\)?\)
+  DW_CFA_advance_loc: 1 to 0000008b
+  DW_CFA_undefined: r37 \(st\(?4\)?\)
+  DW_CFA_advance_loc: 1 to 0000008c
+  DW_CFA_undefined: r38 \(st\(?5\)?\)
+  DW_CFA_advance_loc: 1 to 0000008d
+  DW_CFA_undefined: r39 \(st\(?6\)?\)
+  DW_CFA_advance_loc: 1 to 0000008e
+  DW_CFA_undefined: r40 \(st\(?7\)?\)
+  DW_CFA_advance_loc: 1 to 0000008f
+  DW_CFA_undefined: r41 \(mm0\)
+  DW_CFA_advance_loc: 1 to 00000090
+  DW_CFA_undefined: r42 \(mm1\)
+  DW_CFA_advance_loc: 1 to 00000091
+  DW_CFA_undefined: r43 \(mm2\)
+  DW_CFA_advance_loc: 1 to 00000092
+  DW_CFA_undefined: r44 \(mm3\)
+  DW_CFA_advance_loc: 1 to 00000093
+  DW_CFA_undefined: r45 \(mm4\)
+  DW_CFA_advance_loc: 1 to 00000094
+  DW_CFA_undefined: r46 \(mm5\)
+  DW_CFA_advance_loc: 1 to 00000095
+  DW_CFA_undefined: r47 \(mm6\)
+  DW_CFA_advance_loc: 1 to 00000096
+  DW_CFA_undefined: r48 \(mm7\)
+  DW_CFA_nop
+

gas/testsuite/gas/i386/ilp32/cfi/ilp32.exp

@@ -0,0 +1,25 @@
+#
+# x86-64 ILP32 tests
+#
+proc gas_64_check { } {
+    global NM
+    global NMFLAGS
+
+    set status [gas_host_run "$NM $NMFLAGS --help" ""]
+    return [regexp "targets:.*x86-64" [lindex $status 1]];
+}
+
+if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check] && [is_elf_format]] then {
+
+    global ASFLAGS
+    set old_ASFLAGS "$ASFLAGS"
+    set ASFLAGS "$ASFLAGS --n32"
+
+    foreach test [lsort [glob -nocomplain $srcdir/$subdir/*.d]] {
+	if { [runtest_file_p $runtests $test] } {
+	    run_dump_test [file rootname $test]
+	}
+    }
+
+    set ASFLAGS "$old_ASFLAGS"
+}

gas/testsuite/gas/i386/ilp32/elf/ehopt0.d

@@ -0,0 +1,10 @@
+#source: ../../../elf/ehopt0.s
+#objdump: -s -j .eh_frame
+#name: elf ehopt0 
+
+.*: +file format .*
+
+Contents of section .eh_frame:
+ 0+000 (10|00)0000(00|10) 00000000 017a0001 781a0004 .*
+ 0+010 (01|00)0000(00|01) (12|00)0000(00|12) (18|00)0000(00|18) 00000000 .*
+ 0+020 (08|00)0000(00|08) 04(08|00)0000 (00|08)44 .*

gas/testsuite/gas/i386/ilp32/elf/equ-reloc.d

@@ -0,0 +1,14 @@
+#source: ../../../elf/equ-reloc.s
+#objdump: -rsj .data
+#name: elf equate relocs
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[.*\]:
+OFFSET *TYPE *VALUE 
+0*0 [^ ]+ +(\.bss(\+0x0*4)?|y1)
+0*4 [^ ]+ +(\.bss(\+0x0*8)?|y2)
+#...
+Contents of section .data:
+ 0000 0[04]00000[04] 0[08]00000[08].*
+#pass

gas/testsuite/gas/i386/ilp32/elf/file.d

@@ -0,0 +1,19 @@
+#source: ../../../elf/file.s
+#objdump: -t
+#name: .file file names
+
+.*: .*
+
+SYMBOL TABLE:
+#...
+0+ l[ ]*df \*ABS\*[ 	]+0+ file\.s
+0+ l[ ]*df \*ABS\*[ 	]+0+ slash/data
+0+ l[ ]*df \*ABS\*[ 	]+0+ \{braces\}
+0+ l[ ]*df \*ABS\*[ 	]+0+ \[brackets\]
+0+ l[ ]*df \*ABS\*[ 	]+0+ /dir/file\.s
+0+ l[ ]*df \*ABS\*[ 	]+0+ :colon
+0+ l[ ]*df \*ABS\*[ 	]+0+ UPPER
+0+ l[ ]*df \*ABS\*[ 	]+0+ lower
+0+ l[ ]*df \*ABS\*[ 	]+0+ hash\#
+0+ l[ ]*df \*ABS\*[ 	]+0+ ~tilde
+#pass

gas/testsuite/gas/i386/ilp32/elf/group0a.d

@@ -0,0 +1,10 @@
+#source: ../../../elf/group0.s
+#readelf: -SW
+#name: group section
+
+#...
+[ 	]*\[.*\][ 	]+\.group[ 	]+GROUP.*
+#...
+[ 	]*\[.*\][ 	]+\.foo[ 	]+PROGBITS.*[ 	]+AXG[ 	]+.*
+[ 	]*\[.*\][ 	]+\.bar[ 	]+PROGBITS.*[ 	]+AG[ 	]+.*
+#pass

gas/testsuite/gas/i386/ilp32/elf/group0b.d

@@ -0,0 +1,10 @@
+#source: ../../../elf/group0.s
+#readelf: -g
+#name: group section
+
+#...
+COMDAT group section \[    1\] `\.group' \[\.foo_group\] contains 2 sections:
+[ 	]+\[Index\][ 	]+Name
+[ 	]+\[.*\][ 	]+.foo
+[ 	]+\[.*\][ 	]+.bar
+#pass

gas/testsuite/gas/i386/ilp32/elf/group1a.d

@@ -0,0 +1,11 @@
+#source: ../../../elf/group1.s
+#readelf: -SW
+#name: group section with multiple sections of same name
+
+#...
+[ 	]*\[.*\][ 	]+\.group[ 	]+GROUP.*
+#...
+[ 	]*\[.*\][ 	]+\.text[ 	]+PROGBITS.*[ 	]+AX[ 	]+.*
+#...
+[ 	]*\[.*\][ 	]+\.text[ 	]+PROGBITS.*[ 	]+AXG[ 	]+.*
+#pass

gas/testsuite/gas/i386/ilp32/elf/group1b.d

@@ -0,0 +1,9 @@
+#source: ../../../elf/group1.s
+#readelf: -g
+#name: group section with multiple sections of same name
+
+#...
+COMDAT group section \[    1\] `\.group' \[\.foo_group\] contains 1 sections:
+[ 	]+\[Index\][ 	]+Name
+[ 	]+\[.*\][ 	]+.text
+#pass

gas/testsuite/gas/i386/ilp32/elf/ifunc-1.d

@@ -0,0 +1,8 @@
+#source: ../../../elf/ifunc-1.s
+#readelf: -s
+#name: .set with IFUNC
+
+#...
+[ 	]+[0-9]+:[ 	]+[0-9a-f]+[ 	]+[0-9]+[ 	]+IFUNC[ 	]+GLOBAL[ 	]+DEFAULT[ 	]+[1-9] __GI_foo
+[ 	]+[0-9]+:[ 	]+[0-9a-f]+[ 	]+[0-9]+[ 	]+IFUNC[ 	]+GLOBAL[ 	]+DEFAULT[ 	]+[1-9] foo
+#pass

gas/testsuite/gas/i386/ilp32/elf/ilp32.exp

@@ -0,0 +1,25 @@
+#
+# x86-64 ILP32 tests
+#
+proc gas_64_check { } {
+    global NM
+    global NMFLAGS
+
+    set status [gas_host_run "$NM $NMFLAGS --help" ""]
+    return [regexp "targets:.*x86-64" [lindex $status 1]];
+}
+
+if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check] && [is_elf_format]] then {
+
+    global ASFLAGS
+    set old_ASFLAGS "$ASFLAGS"
+    set ASFLAGS "$ASFLAGS --n32"
+
+    foreach test [lsort [glob -nocomplain $srcdir/$subdir/*.d]] {
+	if { [runtest_file_p $runtests $test] } {
+	    run_dump_test [file rootname $test]
+	}
+    }
+
+    set ASFLAGS "$old_ASFLAGS"
+}

gas/testsuite/gas/i386/ilp32/elf/redef.d

@@ -0,0 +1,14 @@
+#source: ../../../elf/redef.s
+#objdump: -t
+#name: .equ redefinitions (ELF)
+
+.*: .*
+
+SYMBOL TABLE:
+#...
+0+[ 	]+l[ 	].*[ 	]here
+#...
+0*2+[ 	]+l[ 	]+\*ABS\*[ 	].*[ 	]sym
+#...
+0+[ 	]+\*UND\*[ 	].*[ 	]xtrn
+#...

gas/testsuite/gas/i386/ilp32/elf/section0.d

@@ -0,0 +1,18 @@
+#source: ../../../elf/section0.s
+#objdump: -s
+#name: elf section0
+
+.*: +file format .*
+
+Contents of section .data:
+ 0+000 00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00.*
+# The MIPS includes a 'section .reginfo' and such here.
+#...
+Contents of section A:
+ 0+000 01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01.*
+Contents of section B:
+ 0+000 02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02.*
+Contents of section C:
+ 0+000 03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03.*
+# Arm includes a .ARM.attributes section here
+#...

gas/testsuite/gas/i386/ilp32/elf/section1.d

@@ -0,0 +1,18 @@
+#source: ../../../elf/section1.s
+#objdump: -s
+#name: elf section1
+
+.*: +file format .*
+
+Contents of section .data:
+ 0+000 00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00 ?00.*
+# The MIPS includes a 'section .reginfo' and such here.
+#...
+Contents of section A:
+ 0+000 01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01 ?01.*
+Contents of section B:
+ 0+000 02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02 ?02.*
+Contents of section C:
+ 0+000 03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03 ?03.*
+# Arm includes a .ARM.attributes section here
+#...

gas/testsuite/gas/i386/ilp32/elf/section3.d

@@ -0,0 +1,7 @@
+#source: ../../../elf/section3.s
+#readelf: -S
+#name: note section
+
+#...
+[ 	]*\[.*\][ 	]+\.foo[ 	]+NOTE.*
+#pass

gas/testsuite/gas/i386/ilp32/elf/section4.d

@@ -0,0 +1,13 @@
+#source: ../../../elf/section4.s
+#readelf: --sections
+#name: label arithmetic with multiple same-name sections
+
+#...
+[ 	]*\[.*\][ 	]+.group[ 	]+GROUP.*
+#...
+[ 	]*\[.*\][ 	]+\.text[ 	]+PROGBITS.*
+#...
+[ 	]*\[.*\][ 	]+\.data[ 	]+PROGBITS.*
+#...
+[ 	]*\[.*\][ 	]+\.text[ 	]+PROGBITS.*
+#pass

gas/testsuite/gas/i386/ilp32/elf/section6.d

@@ -0,0 +1,14 @@
+#source: ../../../elf/section6.s
+#objdump: -s
+#name: elf section6
+
+.*: +file format .*
+
+# The MIPS includes a 'section .reginfo' and such here.
+#...
+Contents of section sec1:
+ 0+000 01 ?02 ?05.*
+Contents of section sec2:
+ 0+000 04 ?03.*
+# Arm includes a .ARM.attributes section here
+#...

gas/testsuite/gas/i386/ilp32/elf/section7.d

@@ -0,0 +1,22 @@
+#source: ../../../elf/section7.s
+#objdump: -s
+#name: elf section7
+
+.*: +file format .*
+
+# The MIPS includes a 'section .reginfo' and such here.
+#...
+Contents of section .bar:
+ 0000 00000000 00000000 0000 .*
+Contents of section .bar1:
+ 0000 0102 .*
+Contents of section .bar2:
+ 0000 0102 .*
+Contents of section .bar3:
+ 0000 0103 .*
+Contents of section .bar4:
+ 0000 04 .*
+Contents of section .text:
+ 0000 feff .*
+# Arm includes a .ARM.attributes section here
+#...

gas/testsuite/gas/i386/ilp32/elf/struct.d

@@ -0,0 +1,11 @@
+#source: ../../../elf/struct.s
+#nm: --extern-only
+#name: ELF struct
+
+# Test the .struct pseudo-op.
+
+0+0 D l1
+0+4 D l2
+0+2 A w1
+0+4 A w2
+0+6 A w3

gas/testsuite/gas/i386/ilp32/elf/symtab.d

@@ -0,0 +1,7 @@
+#source: ../../../elf/symtab.s
+#readelf: -s
+#name: .set with expression
+
+#...
+.*ABS.*shift.*
+#pass

gas/testsuite/gas/i386/ilp32/elf/symver.d

@@ -0,0 +1,20 @@
+#source: ../../../elf/symver.s
+#objdump: --syms
+#name: ELF symbol versioning
+#
+# The #... and #pass are there to match extra symbols inserted by
+# some toolchains, eg the mips-elf port will add .reginfo and .ptrd
+# and the arm-elf toolchain will add $d.
+
+dump.o:     file format .*
+
+SYMBOL TABLE:
+
+0+000 l.*d.*\.text.*0+000.*
+0+000 l.*d.*\.data.*0+000.*
+0+000 l.*d.*\.bss.*0+000.*
+#...
+0+000 l.*O.*\.data.*0+004 x
+#...
+0+000 l.*O.*\.data.*0+004 x@VERS\.0
+#pass

gas/testsuite/gas/i386/ilp32/ilp32.exp

@@ -0,0 +1,25 @@
+#
+# x86-64 ILP32 tests
+#
+proc gas_64_check { } {
+    global NM
+    global NMFLAGS
+
+    set status [gas_host_run "$NM $NMFLAGS --help" ""]
+    return [regexp "targets:.*x86-64" [lindex $status 1]];
+}
+
+if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check] && [is_elf_format]] then {
+
+    global ASFLAGS
+    set old_ASFLAGS "$ASFLAGS"
+    set ASFLAGS "$ASFLAGS --n32"
+
+    foreach test [lsort [glob -nocomplain $srcdir/$subdir/*.d]] {
+	if { [runtest_file_p $runtests $test] } {
+	    run_dump_test [file rootname $test]
+	}
+    }
+
+    set ASFLAGS "$old_ASFLAGS"
+}

gas/testsuite/gas/i386/ilp32/immed64.d

@@ -0,0 +1,63 @@
+#source: ../immed64.s
+#objdump: -dw
+#name: x86-64 (ILP32) immed
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+000 <_start>:
+[ 	]*[0-9a-fA-F]+:[ 	]+ff 50 04[ 	]+callq? +\*0x4\(%rax\)
+[ 	]*[0-9a-fA-F]+:[ 	]+ff 90 08 00 00 00[ 	]+callq? +\*0x8\(%rax\)
+[ 	]*[0-9a-fA-F]+:[ 	]+ff 90 00 00 00 00[ 	]+callq? +\*0x0\(%rax\)
+[ 	]*[0-9a-fA-F]+:[ 	]+67 ff 50 04[ 	]+(addr32 )?callq? +\*0x4\(%eax\)
+[ 	]*[0-9a-fA-F]+:[ 	]+67 ff 90 08 00 00 00[ 	]+(addr32 )?callq? +\*0x8\(%eax\)
+[ 	]*[0-9a-fA-F]+:[ 	]+67 ff 90 00 00 00 00[ 	]+(addr32 )?callq? +\*0x0\(%eax\)
+[ 	]*[0-9a-fA-F]+:[ 	]+b0 04[ 	]+movb? +\$0x4,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+b0 08[ 	]+movb? +\$0x8,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+b0 00[ 	]+movb? +\$0x0,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+66 b8 04 00[ 	]+movw? +\$0x4,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+66 b8 08 00[ 	]+movw? +\$0x8,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+66 b8 00 00[ 	]+movw? +\$0x0,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+b8 04 00 00 00[ 	]+movl? +\$0x4,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+b8 08 00 00 00[ 	]+movl? +\$0x8,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+b8 00 00 00 00[ 	]+movl? +\$0x0,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 b8 04 00 00 00 00 00 00 00[ 	]+movabsq? +\$0x4,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 b8 08 00 00 00 00 00 00 00[ 	]+movabsq? +\$0x8,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 b8 00 00 00 00 00 00 00 00[ 	]+movabsq? +\$0x0,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+04 04[ 	]+addb? +\$0x4,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+04 08[ 	]+addb? +\$0x8,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+04 00[ 	]+addb? +\$0x0,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+66 83 c0 04[ 	]+addw? +\$0x4,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+66 05 08 00[ 	]+addw? +\$0x8,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+66 05 00 00[ 	]+addw? +\$0x0,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+83 c0 04[ 	]+addl? +\$0x4,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+05 08 00 00 00[ 	]+addl? +\$0x8,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+05 00 00 00 00[ 	]+addl? +\$0x0,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 83 c0 04[ 	]+addq? +\$0x4,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 05 08 00 00 00[ 	]+addq? +\$0x8,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 05 00 00 00 00[ 	]+addq? +\$0x0,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+c0 e0 04[ 	]+shlb? +\$0x4,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+c0 e0 08[ 	]+shlb? +\$0x8,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+c0 e0 00[ 	]+shlb? +\$0x0,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+66 c1 e0 04[ 	]+shlw? +\$0x4,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+66 c1 e0 08[ 	]+shlw? +\$0x8,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+66 c1 e0 00[ 	]+shlw? +\$0x0,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+c1 e0 04[ 	]+shll? +\$0x4,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+c1 e0 08[ 	]+shll? +\$0x8,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+c1 e0 00[ 	]+shll? +\$0x0,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 c1 e0 04[ 	]+shlq? +\$0x4,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 c1 e0 08[ 	]+shlq? +\$0x8,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+48 c1 e0 00[ 	]+shlq? +\$0x0,%rax
+[ 	]*[0-9a-fA-F]+:[ 	]+e4 04[ 	]+inb? +\$0x4,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+e4 08[ 	]+inb? +\$0x8,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+e4 00[ 	]+inb? +\$0x0,%al
+[ 	]*[0-9a-fA-F]+:[ 	]+66 e5 04[ 	]+inw? +\$0x4,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+66 e5 08[ 	]+inw? +\$0x8,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+66 e5 00[ 	]+inw? +\$0x0,%ax
+[ 	]*[0-9a-fA-F]+:[ 	]+e5 04[ 	]+inl? +\$0x4,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+e5 08[ 	]+inl? +\$0x8,%eax
+[ 	]*[0-9a-fA-F]+:[ 	]+e5 00[ 	]+inl? +\$0x0,%eax
+[ 	]*[a-f0-9]+:	48 b8 01 00 00 80 00 00 00 00 	movabs \$0x80000001,%rax
+[ 	]*[a-f0-9]+:	48 b8 01 00 00 80 00 00 00 00 	movabs \$0x80000001,%rax
+#pass

gas/testsuite/gas/i386/ilp32/lns/ilp32.exp

@@ -0,0 +1,25 @@
+#
+# x86-64 ILP32 tests
+#
+proc gas_64_check { } {
+    global NM
+    global NMFLAGS
+
+    set status [gas_host_run "$NM $NMFLAGS --help" ""]
+    return [regexp "targets:.*x86-64" [lindex $status 1]];
+}
+
+if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check] && [is_elf_format]] then {
+
+    global ASFLAGS
+    set old_ASFLAGS "$ASFLAGS"
+    set ASFLAGS "$ASFLAGS --n32"
+
+    foreach test [lsort [glob -nocomplain $srcdir/$subdir/*.d]] {
+	if { [runtest_file_p $runtests $test] } {
+	    run_dump_test [file rootname $test]
+	}
+    }
+
+    set ASFLAGS "$old_ASFLAGS"
+}

gas/testsuite/gas/i386/ilp32/lns/lns-common-1.d

@@ -0,0 +1,29 @@
+#source: ../../../lns/lns-common-1.s
+#readelf: -wl
+#name: lns-common-1
+Raw dump of debug contents of section \.debug_line:
+#...
+  Initial value of 'is_stmt':  1
+#...
+ Line Number Statements:
+  Extended opcode 2: set Address to .*
+  Copy
+  Set column to 3
+  Special opcode .*: advance Address by .* to .* and Line by 1 to 2
+  Set prologue_end to true
+  Special opcode .*: advance Address by .* to .* and Line by 1 to 3
+  Set column to 0
+  Set epilogue_begin to true
+  Special opcode .*: advance Address by .* to .* and Line by 1 to 4
+  Set ISA to 1
+  Set basic block
+  Special opcode .*: advance Address by .* to .* and Line by 1 to 5
+  Set is_stmt to 0
+  Special opcode .*: advance Address by .* to .* and Line by 1 to 6
+  Set is_stmt to 1
+  Special opcode .*: advance Address by .* to .* and Line by 1 to 7
+  Extended opcode 4: set Discriminator to 1
+  Special opcode .*: advance Address by .* to .* and Line by 0 to 7
+  Advance PC by .* to .*
+  Extended opcode 1: End of Sequence
+#...

gas/testsuite/gas/i386/ilp32/lns/lns-duplicate.d

@@ -0,0 +1,11 @@
+#source: ../../../lns/lns-duplicate.s
+#readelf: -wl
+#name: lns-duplicate
+Raw dump of debug contents of section \.debug_line:
+#...
+ Line Number Statements:
+  Extended opcode 2: set Address to .*
+  Copy
+  Set basic block
+  .* by 1 to 2
+#pass

gas/testsuite/gas/i386/ilp32/mixed-mode-reloc64.d

@@ -0,0 +1,14 @@
+#source: ../mixed-mode-reloc.s
+#objdump: -r
+#name: x86-64 (ILP32) mixed mode relocs
+
+.*: +file format .*x86-64.*
+
+RELOCATION RECORDS FOR \[.text\]:
+OFFSET[ 	]+TYPE[ 	]+VALUE[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_GOT32[ 	]+xtrn[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn\+0xf+c[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_GOT32[ 	]+xtrn[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn\+0xf+c[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_GOT32[ 	]+xtrn[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn\+0xf+c[ 	]*

gas/testsuite/gas/i386/ilp32/reloc64.d

@@ -0,0 +1,90 @@
+#source: ../reloc64.s
+#objdump: -Drw
+#name: x86-64 (ILP32) relocs
+
+.*: +file format .*x86-64.*
+
+Disassembly of section \.text:
+#...
+.*[ 	]+R_X86_64_64[ 	]+xtrn
+.*[ 	]+R_X86_64_32S[ 	]+xtrn
+.*[ 	]+R_X86_64_32[ 	]+xtrn
+.*[ 	]+R_X86_64_16[ 	]+xtrn
+.*[ 	]+R_X86_64_8[ 	]+xtrn
+.*[ 	]+R_X86_64_32S[ 	]+xtrn
+.*[ 	]+R_X86_64_32[ 	]+xtrn
+.*[ 	]+R_X86_64_PC64[ 	]+xtrn\+0x0*2
+.*[ 	]+R_X86_64_PC32[ 	]+xtrn\+0x0*2
+.*[ 	]+R_X86_64_PC16[ 	]+xtrn\+0x0*2
+.*[ 	]+R_X86_64_PC8[ 	]+xtrn\+0x0*1
+.*[ 	]+R_X86_64_PC32[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_PC32[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_PC32[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_PC8[ 	]+xtrn\+0xf+f
+.*[ 	]+R_X86_64_GOT64[ 	]+xtrn
+.*[ 	]+R_X86_64_GOT32[ 	]+xtrn
+.*[ 	]+R_X86_64_GOT32[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTOFF64[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_\+0x0*2
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_\+0xf+c
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_\+0xf+c
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_\+0x0*2
+.*[ 	]+R_X86_64_PLT32[ 	]+xtrn
+.*[ 	]+R_X86_64_PLT32[ 	]+xtrn
+.*[ 	]+R_X86_64_PLT32[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_TLSGD[ 	]+xtrn
+.*[ 	]+R_X86_64_TLSGD[ 	]+xtrn
+.*[ 	]+R_X86_64_TLSGD[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_TLSLD[ 	]+xtrn
+.*[ 	]+R_X86_64_TLSLD[ 	]+xtrn
+.*[ 	]+R_X86_64_TLSLD[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_DTPOFF64[ 	]+xtrn
+.*[ 	]+R_X86_64_DTPOFF32[ 	]+xtrn
+.*[ 	]+R_X86_64_DTPOFF32[ 	]+xtrn
+.*[ 	]+R_X86_64_TPOFF64[ 	]+xtrn
+.*[ 	]+R_X86_64_TPOFF32[ 	]+xtrn
+.*[ 	]+R_X86_64_TPOFF32[ 	]+xtrn
+.*[ 	]+R_X86_64_TPOFF32[ 	]+xtrn
+Disassembly of section \.data:
+#...
+.*[ 	]+R_X86_64_64[ 	]+xtrn
+.*[ 	]+R_X86_64_PC64[ 	]+xtrn
+.*[ 	]+R_X86_64_GOT64[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTOFF64[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTPCREL64[ 	]+xtrn
+.*[ 	]+R_X86_64_DTPOFF64[ 	]+xtrn
+.*[ 	]+R_X86_64_TPOFF64[ 	]+xtrn
+.*[ 	]+R_X86_64_32[ 	]+xtrn
+.*[ 	]+R_X86_64_PC32[ 	]+xtrn
+.*[ 	]+R_X86_64_GOT32[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_
+.*[ 	]+R_X86_64_PLT32[ 	]+xtrn
+.*[ 	]+R_X86_64_TLSGD[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn
+.*[ 	]+R_X86_64_TLSLD[ 	]+xtrn
+.*[ 	]+R_X86_64_DTPOFF32[ 	]+xtrn
+.*[ 	]+R_X86_64_TPOFF32[ 	]+xtrn
+.*[ 	]+R_X86_64_32S[ 	]+xtrn
+.*[ 	]+R_X86_64_PC32[ 	]+xtrn
+.*[ 	]+R_X86_64_GOT32[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_
+.*[ 	]+R_X86_64_PLT32[ 	]+xtrn
+.*[ 	]+R_X86_64_TLSGD[ 	]+xtrn
+.*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn
+.*[ 	]+R_X86_64_TLSLD[ 	]+xtrn
+.*[ 	]+R_X86_64_DTPOFF32[ 	]+xtrn
+.*[ 	]+R_X86_64_TPOFF32[ 	]+xtrn
+.*[ 	]+R_X86_64_16[ 	]+xtrn
+.*[ 	]+R_X86_64_PC16[ 	]+xtrn
+.*[ 	]+R_X86_64_8[ 	]+xtrn
+.*[ 	]+R_X86_64_PC8[ 	]+xtrn

gas/testsuite/gas/i386/ilp32/rex.d

@@ -0,0 +1,35 @@
+#source: ../rex.s
+#objdump: -dw
+#name: x86-64 (ILP32) manual rex prefix use
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[	 ]*[0-9a-f]+:[	 ]+40 0f ae 00[	 ]+rex fxsave[	 ]+\(%rax\)
+[	 ]*[0-9a-f]+:[	 ]+48 0f ae 00[	 ]+fxsave64[	 ]+\(%rax\)
+[	 ]*[0-9a-f]+:[	 ]+41 0f ae 00[	 ]+fxsave[	 ]+\(%r8\)
+[	 ]*[0-9a-f]+:[	 ]+49 0f ae 00[	 ]+fxsave64[	 ]+\(%r8\)
+[	 ]*[0-9a-f]+:[	 ]+42 0f ae 04 05 00 00 00 00[	 ]+fxsave[	 ]+(0x0)?\(,%r8(,1)?\)
+[	 ]*[0-9a-f]+:[	 ]+4a 0f ae 04 05 00 00 00 00[	 ]+fxsave64[	 ]+(0x0)?\(,%r8(,1)?\)
+[	 ]*[0-9a-f]+:[	 ]+43 0f ae 04 00[	 ]+fxsave[	 ]+\(%r8,%r8(,1)?\)
+[	 ]*[0-9a-f]+:[	 ]+4b 0f ae 04 00[	 ]+fxsave64[	 ]+\(%r8,%r8(,1)?\)
+[	 ]*[0-9a-f]+:[	 ]+40 c5 f9 28 00[	 ]+rex vmovapd \(%rax\),%xmm0
+[	 ]*[0-9a-f]+:[	 ]+40[	 ]+rex
+[	 ]*[0-9a-f]+:[	 ]+41[	 ]+rex.B
+[	 ]*[0-9a-f]+:[	 ]+42[	 ]+rex.X
+[	 ]*[0-9a-f]+:[	 ]+43[	 ]+rex.XB
+[	 ]*[0-9a-f]+:[	 ]+44[	 ]+rex.R
+[	 ]*[0-9a-f]+:[	 ]+45[	 ]+rex.RB
+[	 ]*[0-9a-f]+:[	 ]+46[	 ]+rex.RX
+[	 ]*[0-9a-f]+:[	 ]+47[	 ]+rex.RXB
+[	 ]*[0-9a-f]+:[	 ]+48[	 ]+rex.W
+[	 ]*[0-9a-f]+:[	 ]+49[	 ]+rex.WB
+[	 ]*[0-9a-f]+:[	 ]+4a[	 ]+rex.WX
+[	 ]*[0-9a-f]+:[	 ]+4b[	 ]+rex.WXB
+[	 ]*[0-9a-f]+:[	 ]+4c[	 ]+rex.WR
+[	 ]*[0-9a-f]+:[	 ]+4d[	 ]+rex.WRB
+[	 ]*[0-9a-f]+:[	 ]+4e[	 ]+rex.WRX
+[	 ]*[0-9a-f]+:[	 ]+4f[	 ]+rex.WRXB
+#pass

gas/testsuite/gas/i386/ilp32/rexw.d

@@ -0,0 +1,48 @@
+#source: ../rexw.s
+#objdump: -dw
+#name: x86-64 (ILP32) REX.W optimization
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	66 0f 3a 17 c1 00    	extractps \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	66 0f 50 ca          	movmskpd %xmm2,%ecx
+[ 	]*[a-f0-9]+:	0f 50 ca             	movmskps %xmm2,%ecx
+[ 	]*[a-f0-9]+:	66 0f 3a 14 c1 00    	pextrb \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	0f c5 c8 00          	pextrw \$0x0,%mm0,%ecx
+[ 	]*[a-f0-9]+:	66 0f c5 c8 00       	pextrw \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	66 0f 3a 20 c1 00    	pinsrb \$0x0,%ecx,%xmm0
+[ 	]*[a-f0-9]+:	66 0f c4 c1 00       	pinsrw \$0x0,%ecx,%xmm0
+[ 	]*[a-f0-9]+:	0f c4 c1 00          	pinsrw \$0x0,%ecx,%mm0
+[ 	]*[a-f0-9]+:	0f d7 c5             	pmovmskb %mm5,%eax
+[ 	]*[a-f0-9]+:	66 0f d7 c5          	pmovmskb %xmm5,%eax
+[ 	]*[a-f0-9]+:	c4 e3 79 17 c1 00    	vextractps \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	c5 f9 50 ca          	vmovmskpd %xmm2,%ecx
+[ 	]*[a-f0-9]+:	c5 f8 50 ca          	vmovmskps %xmm2,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 c1 00    	vpextrb \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	c5 f9 c5 c8 00       	vpextrw \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 20 c1 00    	vpinsrb \$0x0,%ecx,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	c5 f9 c4 c1 00       	vpinsrw \$0x0,%ecx,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	c5 f9 d7 c5          	vpmovmskb %xmm5,%eax
+[ 	]*[a-f0-9]+:	66 0f 3a 17 c1 00    	extractps \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	66 0f 50 ca          	movmskpd %xmm2,%ecx
+[ 	]*[a-f0-9]+:	0f 50 ca             	movmskps %xmm2,%ecx
+[ 	]*[a-f0-9]+:	66 0f 3a 14 c1 00    	pextrb \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	0f c5 c8 00          	pextrw \$0x0,%mm0,%ecx
+[ 	]*[a-f0-9]+:	66 0f c5 c8 00       	pextrw \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	66 0f 3a 20 c1 00    	pinsrb \$0x0,%ecx,%xmm0
+[ 	]*[a-f0-9]+:	0f c4 c1 00          	pinsrw \$0x0,%ecx,%mm0
+[ 	]*[a-f0-9]+:	66 0f c4 c1 00       	pinsrw \$0x0,%ecx,%xmm0
+[ 	]*[a-f0-9]+:	0f d7 cd             	pmovmskb %mm5,%ecx
+[ 	]*[a-f0-9]+:	66 0f d7 cd          	pmovmskb %xmm5,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 17 c1 00    	vextractps \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	c5 f9 50 ca          	vmovmskpd %xmm2,%ecx
+[ 	]*[a-f0-9]+:	c5 f8 50 ca          	vmovmskps %xmm2,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 c1 00    	vpextrb \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	c5 f9 c5 c8 00       	vpextrw \$0x0,%xmm0,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 20 c1 00    	vpinsrb \$0x0,%ecx,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	c5 f9 c4 c1 00       	vpinsrw \$0x0,%ecx,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	c5 f9 d7 cd          	vpmovmskb %xmm5,%ecx
+#pass

gas/testsuite/gas/i386/ilp32/svme64.d

@@ -0,0 +1,41 @@
+#source: ../svme.s
+#as: --defsym __amd64__=1
+#objdump: -dw
+#name: x86-64 (ILP32) SVME
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <common>:
+[	 ]*[0-9a-f]+:[	 ]+0f 01 dd[	 ]+clgi[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 df[	 ]+invlpga[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 de[	 ]+skinit[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 dc[	 ]+stgi[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 da[	 ]+vmload[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 d9[	 ]+vmmcall[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 d8[	 ]+vmrun[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 db[	 ]+vmsave[	 ]*
+[0-9a-f]+ <att64>:
+[	 ]*[0-9a-f]+:[	 ]+0f 01 df[	 ]+invlpga[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 da[	 ]+vmload[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 d8[	 ]+vmrun[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 db[	 ]+vmsave[	 ]*
+[0-9a-f]+ <att32>:
+[	 ]*[0-9a-f]+:[	 ]+0f 01 de[	 ]+skinit[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 df[	 ]+addr32 invlpga[	 ]
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 da[	 ]+addr32 vmload[	 ]
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 d8[	 ]+addr32 vmrun[	 ]
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 db[	 ]+addr32 vmsave[	 ]
+[0-9a-f]+ <intel64>:
+[	 ]*[0-9a-f]+:[	 ]+0f 01 df[	 ]+invlpga[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 da[	 ]+vmload[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 d8[	 ]+vmrun[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+0f 01 db[	 ]+vmsave[	 ]*
+[0-9a-f]+ <intel32>:
+[	 ]*[0-9a-f]+:[	 ]+0f 01 de[	 ]+skinit[	 ]*
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 df[	 ]+addr32 invlpga[	 ]
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 da[	 ]+addr32 vmload[	 ]
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 d8[	 ]+addr32 vmrun[	 ]
+[	 ]*[0-9a-f]+:[	 ]+67 0f 01 db[	 ]+addr32 vmsave[	 ]
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-addr32-intel.d

@@ -0,0 +1,27 @@
+#as: -J
+#objdump: -drwMintel
+#source: ../x86-64-addr32.s
+#name: x86-64 (ILP32) 32-bit addressing (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 	]*[a-f0-9]+:	67 48 8d 80 00 00 00 00[ 	]+lea[ 	]+rax,\[eax\+0x0\].*
+[ 	]*[a-f0-9]+:	67 49 8d 80 00 00 00 00[ 	]+lea[ 	]+rax,\[r8d\+0x0\].*
+[ 	]*[a-f0-9]+:	67 48 8d 05 00 00 00 00[ 	]+lea[ 	]+rax,\[eip\+0x0\].*
+[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00 	addr32 lea rax,ds:0x0.*
+[ 	]*[a-f0-9]+:	67 a0 98 08 60 00    	addr32 mov al,ds:0x600898
+[ 	]*[a-f0-9]+:	67 66 a1 98 08 60 00 	addr32 mov ax,ds:0x600898
+[ 	]*[a-f0-9]+:	67 a1 98 08 60 00    	addr32 mov eax,ds:0x600898
+[ 	]*[a-f0-9]+:	67 48 a1 98 08 60 00 	addr32 mov rax,ds:0x600898
+[ 	]*[a-f0-9]+:	67 48 a1 98 08 80 00 	addr32 mov rax,ds:0x800898
+[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	addr32 mov rbx,QWORD PTR ds:0x800898
+[ 	]*[a-f0-9]+:	67 a2 98 08 60 00    	addr32 mov ds:0x600898,al
+[ 	]*[a-f0-9]+:	67 66 a3 98 08 60 00 	addr32 mov ds:0x600898,ax
+[ 	]*[a-f0-9]+:	67 a3 98 08 60 00    	addr32 mov ds:0x600898,eax
+[ 	]*[a-f0-9]+:	67 48 a3 98 08 60 00 	addr32 mov ds:0x600898,rax
+[ 	]*[a-f0-9]+:	67 48 a3 98 08 80 00 	addr32 mov ds:0x800898,rax
+[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	addr32 mov QWORD PTR ds:0x800898,rbx
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-addr32.d

@@ -0,0 +1,27 @@
+#source: ../x86-64-addr32.s
+#as: -J
+#objdump: -drw
+#name: x86-64 (ILP32) 32-bit addressing
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 	]*[a-f0-9]+:	67 48 8d 80 00 00 00 00[ 	]+lea[ 	]+0x0\(%eax\),%rax.*
+[ 	]*[a-f0-9]+:	67 49 8d 80 00 00 00 00[ 	]+lea[ 	]+0x0\(%r8d\),%rax.*
+[ 	]*[a-f0-9]+:	67 48 8d 05 00 00 00 00[ 	]+lea[ 	]+0x0\(%eip\),%rax.*
+[ 	]*[a-f0-9]+:	67 48 8d 04 25 00 00 00 00[ 	]+addr32 lea[ 	]+0x0,%rax.*
+[ 	]*[a-f0-9]+:	67 a0 98 08 60 00    	addr32 mov 0x600898,%al
+[ 	]*[a-f0-9]+:	67 66 a1 98 08 60 00 	addr32 mov 0x600898,%ax
+[ 	]*[a-f0-9]+:	67 a1 98 08 60 00    	addr32 mov 0x600898,%eax
+[ 	]*[a-f0-9]+:	67 48 a1 98 08 60 00 	addr32 mov 0x600898,%rax
+[ 	]*[a-f0-9]+:	67 48 a1 98 08 80 00 	addr32 mov 0x800898,%rax
+[ 	]*[a-f0-9]+:	67 48 8b 1c 25 98 08 80 00 	addr32 mov 0x800898,%rbx
+[ 	]*[a-f0-9]+:	67 a2 98 08 60 00    	addr32 mov %al,0x600898
+[ 	]*[a-f0-9]+:	67 66 a3 98 08 60 00 	addr32 mov %ax,0x600898
+[ 	]*[a-f0-9]+:	67 a3 98 08 60 00    	addr32 mov %eax,0x600898
+[ 	]*[a-f0-9]+:	67 48 a3 98 08 60 00 	addr32 mov %rax,0x600898
+[ 	]*[a-f0-9]+:	67 48 a3 98 08 80 00 	addr32 mov %rax,0x800898
+[ 	]*[a-f0-9]+:	67 48 89 1c 25 98 08 80 00 	addr32 mov %rbx,0x800898
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-aes-intel.d

@@ -0,0 +1,35 @@
+#source: ../x86-64-aes.s
+#as: -J
+#objdump: -dw -Mintel
+#name: x86-64 (ILP32) AES (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	66 0f 38 dc 01       	aesenc xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 dc c1       	aesenc xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 38 dd 01       	aesenclast xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 dd c1       	aesenclast xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 38 de 01       	aesdec xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 de c1       	aesdec xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 38 df 01       	aesdeclast xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 df c1       	aesdeclast xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 38 db 01       	aesimc xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 db c1       	aesimc xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a df 01 08    	aeskeygenassist xmm0,XMMWORD PTR \[rcx\],0x8
+[ 	]*[a-f0-9]+:	66 0f 3a df c1 08    	aeskeygenassist xmm0,xmm1,0x8
+[ 	]*[a-f0-9]+:	66 0f 38 dc 01       	aesenc xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 dc c1       	aesenc xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 38 dd 01       	aesenclast xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 dd c1       	aesenclast xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 38 de 01       	aesdec xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 de c1       	aesdec xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 38 df 01       	aesdeclast xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 df c1       	aesdeclast xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 38 db 01       	aesimc xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 db c1       	aesimc xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a df 01 08    	aeskeygenassist xmm0,XMMWORD PTR \[rcx\],0x8
+[ 	]*[a-f0-9]+:	66 0f 3a df c1 08    	aeskeygenassist xmm0,xmm1,0x8
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-aes.d

@@ -0,0 +1,35 @@
+#source: ../x86-64-aes.s
+#as: -J
+#objdump: -dw
+#name: x86-64 (ILP32) AES
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	66 0f 38 dc 01       	aesenc \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 dc c1       	aesenc %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 dd 01       	aesenclast \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 dd c1       	aesenclast %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 de 01       	aesdec \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 de c1       	aesdec %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 df 01       	aesdeclast \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 df c1       	aesdeclast %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 db 01       	aesimc \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 db c1       	aesimc %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a df 01 08    	aeskeygenassist \$0x8,\(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a df c1 08    	aeskeygenassist \$0x8,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 dc 01       	aesenc \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 dc c1       	aesenc %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 dd 01       	aesenclast \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 dd c1       	aesenclast %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 de 01       	aesdec \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 de c1       	aesdec %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 df 01       	aesdeclast \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 df c1       	aesdeclast %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 db 01       	aesimc \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 db c1       	aesimc %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a df 01 08    	aeskeygenassist \$0x8,\(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a df c1 08    	aeskeygenassist \$0x8,%xmm1,%xmm0
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-amdfam10.d

@@ -0,0 +1,46 @@
+#source: ../x86-64-amdfam10.s
+#objdump: -dw
+#name: x86-64 (ILP32) amdfam10
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <foo>:
+   0:	f3 48 0f bd 19[ 	]+lzcnt  \(%rcx\),%rbx
+   5:	f3 0f bd 19[ 	]+lzcnt  \(%rcx\),%ebx
+   9:	66 f3 0f bd 19[ 	]+lzcnt  \(%rcx\),%bx
+   e:	f3 48 0f bd d9[ 	]+lzcnt  %rcx,%rbx
+  13:	f3 0f bd d9[ 	]+lzcnt  %ecx,%ebx
+  17:	66 f3 0f bd d9[ 	]+lzcnt  %cx,%bx
+  1c:	f3 48 0f b8 19[ 	]+popcnt \(%rcx\),%rbx
+  21:	f3 0f b8 19[ 	]+popcnt \(%rcx\),%ebx
+  25:	66 f3 0f b8 19[ 	]+popcnt \(%rcx\),%bx
+  2a:	f3 48 0f b8 d9[ 	]+popcnt %rcx,%rbx
+  2f:	f3 0f b8 d9[ 	]+popcnt %ecx,%ebx
+  33:	66 f3 0f b8 d9[ 	]+popcnt %cx,%bx
+  38:	66 0f 79 ca[ 	]+extrq  %xmm2,%xmm1
+  3c:	66 0f 78 c1 02 04[ 	]+extrq  \$0x4,\$0x2,%xmm1
+  42:	f2 0f 79 ca[ 	]+insertq %xmm2,%xmm1
+  46:	f2 0f 78 ca 02 04[ 	]+insertq \$0x4,\$0x2,%xmm2,%xmm1
+  4c:	f2 0f 2b 09[ 	]+movntsd %xmm1,\(%rcx\)
+  50:	f3 0f 2b 09[ 	]+movntss %xmm1,\(%rcx\)
+[ 	]*[a-f0-9]+:	f3 48 0f bd 19[ 	]+lzcnt  \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	f3 0f bd 19[ 	]+lzcnt  \(%rcx\),%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f bd 19[ 	 ]+lzcnt  \(%rcx\),%bx
+[ 	]*[a-f0-9]+:	f3 48 0f bd d9[ 	 ]+lzcnt  %rcx,%rbx
+[ 	]*[a-f0-9]+:	f3 0f bd d9[ 	 ]+lzcnt  %ecx,%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f bd d9[ 	 ]+lzcnt  %cx,%bx
+[ 	]*[a-f0-9]+:	f3 48 0f b8 19[ 	]+popcnt \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	f3 0f b8 19[ 	]+popcnt \(%rcx\),%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f b8 19[ 	]+popcnt \(%rcx\),%bx
+[ 	]*[a-f0-9]+:	f3 48 0f b8 d9[ 	]+popcnt %rcx,%rbx
+[ 	]*[a-f0-9]+:	f3 0f b8 d9[ 	]+popcnt %ecx,%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f b8 d9[ 	]+popcnt %cx,%bx
+[ 	]*[a-f0-9]+:	66 0f 79 ca[ 	]+extrq  %xmm2,%xmm1
+[ 	]*[a-f0-9]+:	66 0f 78 c1 02 04[ 	]*extrq  \$0x4,\$0x2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 79 ca[ 	]+insertq %xmm2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 78 ca 02 04[ 	]*insertq \$0x4,\$0x2,%xmm2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 2b 09[ 	]+movntsd %xmm1,\(%rcx\)
+[ 	]*[a-f0-9]+:	f3 0f 2b 09[ 	]+movntss %xmm1,\(%rcx\)
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-arch-1.d

@@ -0,0 +1,16 @@
+#source: ../x86-64-arch-1.s
+#objdump: -dw
+#name: x86-64 (ILP32) arch 1
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 	]*[a-f0-9]+:	66 0f 38 17 c1       	ptest  %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 09 c1 00    	roundpd \$0x0,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 08 c1 00    	roundps \$0x0,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 0b c1 00    	roundsd \$0x0,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 0a c1 00    	roundss \$0x0,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 38 41 d9       	phminposuw %xmm1,%xmm3
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d

@@ -0,0 +1,40 @@
+#source: ../x86-64-arch-2.s
+#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock
+#objdump: -dw
+#name: x86-64 (ILP32) arch 2
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 	]*[a-f0-9]+:	0f 44 d8             	cmove  %eax,%ebx
+[ 	]*[a-f0-9]+:	0f ae 38             	clflush \(%rax\)
+[ 	]*[a-f0-9]+:	0f 05                	syscall 
+[ 	]*[a-f0-9]+:	0f fc dc             	paddb  %mm4,%mm3
+[ 	]*[a-f0-9]+:	f3 0f 58 dc          	addss  %xmm4,%xmm3
+[ 	]*[a-f0-9]+:	f2 0f 58 dc          	addsd  %xmm4,%xmm3
+[ 	]*[a-f0-9]+:	66 0f d0 dc          	addsubpd %xmm4,%xmm3
+[ 	]*[a-f0-9]+:	66 0f 38 01 dc       	phaddw %xmm4,%xmm3
+[ 	]*[a-f0-9]+:	66 0f 38 41 d9       	phminposuw %xmm1,%xmm3
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 d9       	crc32l %ecx,%ebx
+[ 	]*[a-f0-9]+:	c5 fc 77             	vzeroall 
+[ 	]*[a-f0-9]+:	0f 01 c4             	vmxoff 
+[ 	]*[a-f0-9]+:	0f 37                	getsec 
+[ 	]*[a-f0-9]+:	0f 01 d0             	xgetbv 
+[ 	]*[a-f0-9]+:	0f ae 31             	xsaveopt \(%rcx\)
+[ 	]*[a-f0-9]+:	66 0f 38 dc 01       	aesenc \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 08    	pclmulqdq \$0x8,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:	c4 e2 79 dc 11       	vaesenc \(%rcx\),%xmm0,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 44 d4 08    	vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 d4       	vfmadd132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	0f 38 f0 19          	movbe  \(%rcx\),%ebx
+[ 	]*[a-f0-9]+:	66 0f 38 80 19       	invept \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	0f 01 f9             	rdtscp 
+[ 	]*[a-f0-9]+:	0f 0f dc b7          	pmulhrw %mm4,%mm3
+[ 	]*[a-f0-9]+:	0f 0f dc bb          	pswapd %mm4,%mm3
+[ 	]*[a-f0-9]+:	f2 0f 79 ca          	insertq %xmm2,%xmm1
+[ 	]*[a-f0-9]+:	0f 01 da             	vmload 
+[ 	]*[a-f0-9]+:	f3 0f bd d9          	lzcnt  %ecx,%ebx
+[ 	]*[a-f0-9]+:	0f a7 c0             	xstore-rng 
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-avx-swap-intel.d

@@ -0,0 +1,60 @@
+#source: ../x86-64-avx-swap.s
+#as: -msse2avx
+#objdump: -drwMintel
+#name: x86-64 (ILP32) AVX swap (Intel mode)
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c5 7d 29 c6          	vmovapd ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7c 29 c6          	vmovaps ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7d 7f c6          	vmovdqa ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7e 7f c6          	vmovdqu ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7d 11 c6          	vmovupd ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7c 11 c6          	vmovups ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 79 29 c6          	vmovapd xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 78 29 c6          	vmovaps xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 7f c6          	vmovdqa xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 7a 7f c6          	vmovdqu xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 d6 c6          	vmovq  xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 4b 11 c6          	vmovsd xmm6,xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 4a 11 c6          	vmovss xmm6,xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 11 c6          	vmovupd xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 78 11 c6          	vmovups xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 29 c6          	vmovapd xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 78 29 c6          	vmovaps xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 7f c6          	vmovdqa xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 7a 7f c6          	vmovdqu xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 d6 c6          	vmovq  xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 11 c6          	vmovupd xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 78 11 c6          	vmovups xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 4b 11 c2          	vmovsd xmm2,xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 4a 11 c2          	vmovss xmm2,xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 7d 29 c6          	vmovapd ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7c 29 c6          	vmovaps ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7d 7f c6          	vmovdqa ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7e 7f c6          	vmovdqu ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7d 11 c6          	vmovupd ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 7c 11 c6          	vmovups ymm6,ymm8
+[ 	]*[a-f0-9]+:	c5 79 29 c6          	vmovapd xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 78 29 c6          	vmovaps xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 7f c6          	vmovdqa xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 7a 7f c6          	vmovdqu xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 d6 c6          	vmovq  xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 4b 11 c6          	vmovsd xmm6,xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 4a 11 c6          	vmovss xmm6,xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 11 c6          	vmovupd xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 78 11 c6          	vmovups xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 29 c6          	vmovapd xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 78 29 c6          	vmovaps xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 7f c6          	vmovdqa xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 7a 7f c6          	vmovdqu xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 d6 c6          	vmovq  xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 79 11 c6          	vmovupd xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 78 11 c6          	vmovups xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 4b 11 c2          	vmovsd xmm2,xmm6,xmm8
+[ 	]*[a-f0-9]+:	c5 4a 11 c2          	vmovss xmm2,xmm6,xmm8
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-avx-swap.d

@@ -0,0 +1,60 @@
+#source: ../x86-64-avx-swap.s
+#as: -msse2avx
+#objdump: -drw
+#name: x86-64 (ILP32) AVX swap
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c5 7d 29 c6          	vmovapd %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7c 29 c6          	vmovaps %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7d 7f c6          	vmovdqa %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7e 7f c6          	vmovdqu %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7d 11 c6          	vmovupd %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7c 11 c6          	vmovups %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 79 29 c6          	vmovapd %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 78 29 c6          	vmovaps %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 7f c6          	vmovdqa %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 7a 7f c6          	vmovdqu %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 d6 c6          	vmovq  %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 4b 11 c6          	vmovsd %xmm8,%xmm6,%xmm6
+[ 	]*[a-f0-9]+:	c5 4a 11 c6          	vmovss %xmm8,%xmm6,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 11 c6          	vmovupd %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 78 11 c6          	vmovups %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 29 c6          	vmovapd %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 78 29 c6          	vmovaps %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 7f c6          	vmovdqa %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 7a 7f c6          	vmovdqu %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 d6 c6          	vmovq  %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 11 c6          	vmovupd %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 78 11 c6          	vmovups %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 4b 11 c2          	vmovsd %xmm8,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 4a 11 c2          	vmovss %xmm8,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 7d 29 c6          	vmovapd %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7c 29 c6          	vmovaps %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7d 7f c6          	vmovdqa %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7e 7f c6          	vmovdqu %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7d 11 c6          	vmovupd %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 7c 11 c6          	vmovups %ymm8,%ymm6
+[ 	]*[a-f0-9]+:	c5 79 29 c6          	vmovapd %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 78 29 c6          	vmovaps %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 7f c6          	vmovdqa %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 7a 7f c6          	vmovdqu %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 d6 c6          	vmovq  %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 4b 11 c6          	vmovsd %xmm8,%xmm6,%xmm6
+[ 	]*[a-f0-9]+:	c5 4a 11 c6          	vmovss %xmm8,%xmm6,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 11 c6          	vmovupd %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 78 11 c6          	vmovups %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 29 c6          	vmovapd %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 78 29 c6          	vmovaps %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 7f c6          	vmovdqa %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 7a 7f c6          	vmovdqu %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 d6 c6          	vmovq  %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 79 11 c6          	vmovupd %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 78 11 c6          	vmovups %xmm8,%xmm6
+[ 	]*[a-f0-9]+:	c5 4b 11 c2          	vmovsd %xmm8,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 4a 11 c2          	vmovss %xmm8,%xmm6,%xmm2
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-branch.d

@@ -0,0 +1,31 @@
+#source: ../x86-64-branch.s
+#as: -J
+#objdump: -drw
+#name: x86-64 (ILP32) indirect branch
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 	]*[a-f0-9]+:	ff d0                	callq  \*%rax
+[ 	]*[a-f0-9]+:	ff d0                	callq  \*%rax
+[ 	]*[a-f0-9]+:	66 ff d0             	callw  \*%ax
+[ 	]*[a-f0-9]+:	66 ff d0             	callw  \*%ax
+[ 	]*[a-f0-9]+:	66 ff 10             	callw  \*\(%rax\)
+[ 	]*[a-f0-9]+:	ff e0                	jmpq   \*%rax
+[ 	]*[a-f0-9]+:	ff e0                	jmpq   \*%rax
+[ 	]*[a-f0-9]+:	66 ff e0             	jmpw   \*%ax
+[ 	]*[a-f0-9]+:	66 ff e0             	jmpw   \*%ax
+[ 	]*[a-f0-9]+:	66 ff 20             	jmpw   \*\(%rax\)
+[ 	]*[a-f0-9]+:	ff d0                	callq  \*%rax
+[ 	]*[a-f0-9]+:	ff d0                	callq  \*%rax
+[ 	]*[a-f0-9]+:	66 ff d0             	callw  \*%ax
+[ 	]*[a-f0-9]+:	66 ff d0             	callw  \*%ax
+[ 	]*[a-f0-9]+:	66 ff 10             	callw  \*\(%rax\)
+[ 	]*[a-f0-9]+:	ff e0                	jmpq   \*%rax
+[ 	]*[a-f0-9]+:	ff e0                	jmpq   \*%rax
+[ 	]*[a-f0-9]+:	66 ff e0             	jmpw   \*%ax
+[ 	]*[a-f0-9]+:	66 ff e0             	jmpw   \*%ax
+[ 	]*[a-f0-9]+:	66 ff 20             	jmpw   \*\(%rax\)
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-cbw-intel.d

@@ -0,0 +1,24 @@
+#source: ../x86-64-cbw.s
+#objdump: -dwMintel
+#name: x86-64 (ILP32) CBW/CWD & Co (Intel disassembly)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_cbw>:
+   0:	66 98                	cbw    
+   2:	98                   	cwde   
+   3:	48 98                	cdqe   
+   5:	66 40 98             	rex cbw 
+   8:	40 98                	rex cwde 
+   a:	66 48 98             	data32 cdqe 
+
+0+00d <_cwd>:
+   d:	66 99                	cwd    
+   f:	99                   	cdq    
+  10:	48 99                	cqo    
+  12:	66 40 99             	rex cwd 
+  15:	40 99                	rex cdq 
+  17:	66 48 99             	data32 cqo 
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-cbw.d

@@ -0,0 +1,24 @@
+#source: ../x86-64-cbw.s
+#objdump: -dw
+#name: x86-64 (ILP32) CBW/CWD & Co
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_cbw>:
+   0:	66 98                	cbtw   
+   2:	98                   	cwtl   
+   3:	48 98                	cltq   
+   5:	66 40 98             	rex cbtw 
+   8:	40 98                	rex cwtl 
+   a:	66 48 98             	data32 cltq 
+
+0+00d <_cwd>:
+   d:	66 99                	cwtd   
+   f:	99                   	cltd   
+  10:	48 99                	cqto   
+  12:	66 40 99             	rex cwtd 
+  15:	40 99                	rex cltd 
+  17:	66 48 99             	data32 cqto 
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-clmul-intel.d

@@ -0,0 +1,31 @@
+#source: ../x86-64-clmul.s
+#as: -J
+#objdump: -dw -Mintel
+#name: x86-64 (ILP32) PCLMUL (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 08    	pclmulqdq xmm0,XMMWORD PTR \[rcx\],0x8
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 08    	pclmulqdq xmm0,xmm1,0x8
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 00    	pclmullqlqdq xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 00    	pclmullqlqdq xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 01    	pclmulhqlqdq xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 01    	pclmulhqlqdq xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 10    	pclmullqhqdq xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 10    	pclmullqhqdq xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 11    	pclmulhqhqdq xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 11    	pclmulhqhqdq xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 08    	pclmulqdq xmm0,XMMWORD PTR \[rcx\],0x8
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 08    	pclmulqdq xmm0,xmm1,0x8
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 00    	pclmullqlqdq xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 00    	pclmullqlqdq xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 01    	pclmulhqlqdq xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 01    	pclmulhqlqdq xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 10    	pclmullqhqdq xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 10    	pclmullqhqdq xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 11    	pclmulhqhqdq xmm0,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 11    	pclmulhqhqdq xmm0,xmm1
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-clmul.d

@@ -0,0 +1,31 @@
+#source: ../x86-64-clmul.s
+#as: -J
+#objdump: -dw
+#name: x86-64 (ILP32) PCLMUL
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 08    	pclmulqdq \$0x8,\(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 08    	pclmulqdq \$0x8,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 00    	pclmullqlqdq \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 00    	pclmullqlqdq %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 01    	pclmulhqlqdq \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 01    	pclmulhqlqdq %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 10    	pclmullqhqdq \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 10    	pclmullqhqdq %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 11    	pclmulhqhqdq \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 11    	pclmulhqhqdq %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 08    	pclmulqdq \$0x8,\(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 08    	pclmulqdq \$0x8,%xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 00    	pclmullqlqdq \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 00    	pclmullqlqdq %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 01    	pclmulhqlqdq \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 01    	pclmulhqlqdq %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 10    	pclmullqhqdq \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 10    	pclmullqhqdq %xmm1,%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 01 11    	pclmulhqhqdq \(%rcx\),%xmm0
+[ 	]*[a-f0-9]+:	66 0f 3a 44 c1 11    	pclmulhqhqdq %xmm1,%xmm0
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-crc32-intel.d

@@ -0,0 +1,35 @@
+#source: ../x86-64-crc32.s
+#objdump: -drwMintel
+#name: x86-64 (ILP32) crc32 (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32  eax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32  rax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32  eax,WORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32  rax,QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32  rax,al
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32  rax,al
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32  rax,rax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32  rax,rax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32  rax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32  eax,BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32  eax,WORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32  eax,DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32  rax,QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32  eax,al
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32  rax,al
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32  eax,ax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32  eax,eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32  rax,rax
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-crc32.d

@@ -0,0 +1,35 @@
+#source: ../x86-64-crc32.s
+#objdump: -dw
+#name: x86-64 (ILP32) crc32
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32b \(%rsi\),%eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32b \(%rsi\),%rax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32w \(%rsi\),%eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32l \(%rsi\),%eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32q \(%rsi\),%rax
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b %al,%eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b %al,%eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32b %al,%rax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32b %al,%rax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w %ax,%eax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w %ax,%eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32l %eax,%eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32l %eax,%eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32q %rax,%rax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32q %rax,%rax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 06    	crc32b \(%rsi\),%rax
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 06       	crc32b \(%rsi\),%eax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 06    	crc32w \(%rsi\),%eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 06       	crc32l \(%rsi\),%eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 06    	crc32q \(%rsi\),%rax
+[ 	]*[a-f0-9]+:	f2 0f 38 f0 c0       	crc32b %al,%eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f0 c0    	crc32b %al,%rax
+[ 	]*[a-f0-9]+:	66 f2 0f 38 f1 c0    	crc32w %ax,%eax
+[ 	]*[a-f0-9]+:	f2 0f 38 f1 c0       	crc32l %eax,%eax
+[ 	]*[a-f0-9]+:	f2 48 0f 38 f1 c0    	crc32q %rax,%rax
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-crx-suffix.d

@@ -0,0 +1,21 @@
+#source: ../x86-64-crx.s
+#objdump: -dwMsuffix
+#name: x86-64 (ILP32) control register related opcodes (with suffixes)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[0-9a-f]+:	44 0f 20 c0[ 	]+movq[ 	]+?%cr8,%rax
+[ 	]*[0-9a-f]+:	44 0f 20 c7[ 	]+movq[ 	]+?%cr8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 22 c0[ 	]+movq[ 	]+?%rax,%cr8
+[ 	]*[0-9a-f]+:	44 0f 22 c7[ 	]+movq[ 	]+?%rdi,%cr8
+[ 	]*[0-9a-f]+:	44 0f 20 c0[ 	]+movq[ 	]+?%cr8,%rax
+[ 	]*[0-9a-f]+:	44 0f 20 c7[ 	]+movq[ 	]+?%cr8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 22 c0[ 	]+movq[ 	]+?%rax,%cr8
+[ 	]*[0-9a-f]+:	44 0f 22 c7[ 	]+movq[ 	]+?%rdi,%cr8
+[ 	]*[0-9a-f]+:	44 0f 20 c0[ 	]+movq[ 	]+?%cr8,%rax
+[ 	]*[0-9a-f]+:	44 0f 20 c7[ 	]+movq[ 	]+?%cr8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 22 c0[ 	]+movq[ 	]+?%rax,%cr8
+[ 	]*[0-9a-f]+:	44 0f 22 c7[ 	]+movq[ 	]+?%rdi,%cr8

gas/testsuite/gas/i386/ilp32/x86-64-crx.d

@@ -0,0 +1,21 @@
+#source: ../x86-64-crx.s
+#objdump: -dw
+#name: x86-64 (ILP32) control register related opcodes
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[0-9a-f]+:	44 0f 20 c0[ 	]+movq?[ 	]+?%cr8,%rax
+[ 	]*[0-9a-f]+:	44 0f 20 c7[ 	]+movq?[ 	]+?%cr8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 22 c0[ 	]+movq?[ 	]+?%rax,%cr8
+[ 	]*[0-9a-f]+:	44 0f 22 c7[ 	]+movq?[ 	]+?%rdi,%cr8
+[ 	]*[0-9a-f]+:	44 0f 20 c0[ 	]+movq?[ 	]+?%cr8,%rax
+[ 	]*[0-9a-f]+:	44 0f 20 c7[ 	]+movq?[ 	]+?%cr8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 22 c0[ 	]+movq?[ 	]+?%rax,%cr8
+[ 	]*[0-9a-f]+:	44 0f 22 c7[ 	]+movq?[ 	]+?%rdi,%cr8
+[ 	]*[0-9a-f]+:	44 0f 20 c0[ 	]+movq?[ 	]+?%cr8,%rax
+[ 	]*[0-9a-f]+:	44 0f 20 c7[ 	]+movq?[ 	]+?%cr8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 22 c0[ 	]+movq?[ 	]+?%rax,%cr8
+[ 	]*[0-9a-f]+:	44 0f 22 c7[ 	]+movq?[ 	]+?%rdi,%cr8

gas/testsuite/gas/i386/ilp32/x86-64-disp-intel.d

@@ -0,0 +1,40 @@
+#source: ../x86-64-disp.s
+#as: -J
+#objdump: -dw -Mintel
+#name: x86-64 (ILP32) displacement (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 	]*[a-f0-9]+:	8b 98 ff ff ff 7f    	mov    ebx,DWORD PTR \[rax\+0x7fffffff\]
+[ 	]*[a-f0-9]+:	8b 98 00 00 00 80    	mov    ebx,DWORD PTR \[rax-0x80000000\]
+[ 	]*[a-f0-9]+:	8b 1c 25 00 00 00 80 	mov    ebx,DWORD PTR ds:0xffffffff80000000
+[ 	]*[a-f0-9]+:	8b 1c 25 00 00 00 80 	mov    ebx,DWORD PTR ds:0xffffffff80000000
+[ 	]*[a-f0-9]+:	8b 1c 25 ff ff ff 7f 	mov    ebx,DWORD PTR ds:0x7fffffff
+[ 	]*[a-f0-9]+:	8b 04 25 00 00 00 80 	mov    eax,DWORD PTR ds:0xffffffff80000000
+[ 	]*[a-f0-9]+:	8b 04 25 00 00 00 80 	mov    eax,DWORD PTR ds:0xffffffff80000000
+[ 	]*[a-f0-9]+:	8b 04 25 ff ff ff 7f 	mov    eax,DWORD PTR ds:0x7fffffff
+[ 	]*[a-f0-9]+:	a1 00 00 00 80 00 00 00 00 	movabs eax,ds:0x80000000
+[ 	]*[a-f0-9]+:	b8 f0 00 e0 0e       	mov    eax,0xee000f0
+[ 	]*[a-f0-9]+:	89 98 f0 00 e0 0e    	mov    DWORD PTR \[rax\+0xee000f0\],ebx
+[ 	]*[a-f0-9]+:	89 98 f0 00 e0 0e    	mov    DWORD PTR \[rax\+0xee000f0\],ebx
+[ 	]*[a-f0-9]+:	65 89 98 f0 00 e0 0e 	mov    DWORD PTR gs:\[rax\+0xee000f0\],ebx
+[ 	]*[a-f0-9]+:	65 89 98 f0 00 e0 0e 	mov    DWORD PTR gs:\[rax\+0xee000f0\],ebx
+[ 	]*[a-f0-9]+:	89 1c 25 f0 00 e0 0e 	mov    DWORD PTR ds:0xee000f0,ebx
+[ 	]*[a-f0-9]+:	65 89 1c 25 f0 00 e0 0e 	mov    DWORD PTR gs:0xee000f0,ebx
+[ 	]*[a-f0-9]+:	89 04 25 f0 00 e0 0e 	mov    DWORD PTR ds:0xee000f0,eax
+[ 	]*[a-f0-9]+:	65 89 04 25 f0 00 e0 0e 	mov    DWORD PTR gs:0xee000f0,eax
+[ 	]*[a-f0-9]+:	a3 f0 00 e0 fe 00 00 00 00 	movabs ds:0xfee000f0,eax
+[ 	]*[a-f0-9]+:	65 a3 f0 00 e0 fe 00 00 00 00 	movabs gs:0xfee000f0,eax
+[ 	]*[a-f0-9]+:	65 8b 1c 25 f0 00 e0 0e 	mov    ebx,DWORD PTR gs:0xee000f0
+[ 	]*[a-f0-9]+:	8b 1c 25 f0 00 e0 0e 	mov    ebx,DWORD PTR ds:0xee000f0
+[ 	]*[a-f0-9]+:	8b 1c 25 f0 00 e0 0e 	mov    ebx,DWORD PTR ds:0xee000f0
+[ 	]*[a-f0-9]+:	65 8b 04 25 f0 00 e0 0e 	mov    eax,DWORD PTR gs:0xee000f0
+[ 	]*[a-f0-9]+:	8b 04 25 f0 00 e0 0e 	mov    eax,DWORD PTR ds:0xee000f0
+[ 	]*[a-f0-9]+:	8b 04 25 f0 00 e0 0e 	mov    eax,DWORD PTR ds:0xee000f0
+[ 	]*[a-f0-9]+:	65 a1 f0 00 e0 fe 00 00 00 00 	movabs eax,gs:0xfee000f0
+[ 	]*[a-f0-9]+:	a1 f0 00 e0 fe 00 00 00 00 	movabs eax,ds:0xfee000f0
+[ 	]*[a-f0-9]+:	a1 f0 00 e0 fe 00 00 00 00 	movabs eax,ds:0xfee000f0
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-disp.d

@@ -0,0 +1,40 @@
+#source: ../x86-64-disp.s
+#as: -J
+#objdump: -drw
+#name: x86-64 (ILP32) displacement
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 	]*[a-f0-9]+:	8b 98 ff ff ff 7f    	mov    0x7fffffff\(%rax\),%ebx
+[ 	]*[a-f0-9]+:	8b 98 00 00 00 80    	mov    -0x80000000\(%rax\),%ebx
+[ 	]*[a-f0-9]+:	8b 1c 25 00 00 00 80 	mov    0xffffffff80000000,%ebx
+[ 	]*[a-f0-9]+:	8b 1c 25 00 00 00 80 	mov    0xffffffff80000000,%ebx
+[ 	]*[a-f0-9]+:	8b 1c 25 ff ff ff 7f 	mov    0x7fffffff,%ebx
+[ 	]*[a-f0-9]+:	8b 04 25 00 00 00 80 	mov    0xffffffff80000000,%eax
+[ 	]*[a-f0-9]+:	8b 04 25 00 00 00 80 	mov    0xffffffff80000000,%eax
+[ 	]*[a-f0-9]+:	8b 04 25 ff ff ff 7f 	mov    0x7fffffff,%eax
+[ 	]*[a-f0-9]+:	a1 00 00 00 80 00 00 00 00 	movabs 0x80000000,%eax
+[ 	]*[a-f0-9]+:	b8 f0 00 e0 0e       	mov    \$0xee000f0,%eax
+[ 	]*[a-f0-9]+:	89 98 f0 00 e0 0e    	mov    %ebx,0xee000f0\(%rax\)
+[ 	]*[a-f0-9]+:	89 98 f0 00 e0 0e    	mov    %ebx,0xee000f0\(%rax\)
+[ 	]*[a-f0-9]+:	65 89 98 f0 00 e0 0e 	mov    %ebx,%gs:0xee000f0\(%rax\)
+[ 	]*[a-f0-9]+:	65 89 98 f0 00 e0 0e 	mov    %ebx,%gs:0xee000f0\(%rax\)
+[ 	]*[a-f0-9]+:	89 1c 25 f0 00 e0 0e 	mov    %ebx,0xee000f0
+[ 	]*[a-f0-9]+:	65 89 1c 25 f0 00 e0 0e 	mov    %ebx,%gs:0xee000f0
+[ 	]*[a-f0-9]+:	89 04 25 f0 00 e0 0e 	mov    %eax,0xee000f0
+[ 	]*[a-f0-9]+:	65 89 04 25 f0 00 e0 0e 	mov    %eax,%gs:0xee000f0
+[ 	]*[a-f0-9]+:	a3 f0 00 e0 fe 00 00 00 00 	movabs %eax,0xfee000f0
+[ 	]*[a-f0-9]+:	65 a3 f0 00 e0 fe 00 00 00 00 	movabs %eax,%gs:0xfee000f0
+[ 	]*[a-f0-9]+:	65 8b 1c 25 f0 00 e0 0e 	mov    %gs:0xee000f0,%ebx
+[ 	]*[a-f0-9]+:	8b 1c 25 f0 00 e0 0e 	mov    0xee000f0,%ebx
+[ 	]*[a-f0-9]+:	8b 1c 25 f0 00 e0 0e 	mov    0xee000f0,%ebx
+[ 	]*[a-f0-9]+:	65 8b 04 25 f0 00 e0 0e 	mov    %gs:0xee000f0,%eax
+[ 	]*[a-f0-9]+:	8b 04 25 f0 00 e0 0e 	mov    0xee000f0,%eax
+[ 	]*[a-f0-9]+:	8b 04 25 f0 00 e0 0e 	mov    0xee000f0,%eax
+[ 	]*[a-f0-9]+:	65 a1 f0 00 e0 fe 00 00 00 00 	movabs %gs:0xfee000f0,%eax
+[ 	]*[a-f0-9]+:	a1 f0 00 e0 fe 00 00 00 00 	movabs 0xfee000f0,%eax
+[ 	]*[a-f0-9]+:	a1 f0 00 e0 fe 00 00 00 00 	movabs 0xfee000f0,%eax
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-drx-suffix.d

@@ -0,0 +1,21 @@
+#source: ../x86-64-drx.s
+#objdump: -dwMsuffix
+#name: x86-64 (ILP32) debug register related opcodes (with suffixes)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[0-9a-f]+:	44 0f 21 c0[ 	]+movq[ 	]+?%db8,%rax
+[ 	]*[0-9a-f]+:	44 0f 21 c7[ 	]+movq[ 	]+?%db8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 23 c0[ 	]+movq[ 	]+?%rax,%db8
+[ 	]*[0-9a-f]+:	44 0f 23 c7[ 	]+movq[ 	]+?%rdi,%db8
+[ 	]*[0-9a-f]+:	44 0f 21 c0[ 	]+movq[ 	]+?%db8,%rax
+[ 	]*[0-9a-f]+:	44 0f 21 c7[ 	]+movq[ 	]+?%db8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 23 c0[ 	]+movq[ 	]+?%rax,%db8
+[ 	]*[0-9a-f]+:	44 0f 23 c7[ 	]+movq[ 	]+?%rdi,%db8
+[ 	]*[0-9a-f]+:	44 0f 21 c0[ 	]+movq[ 	]+?%db8,%rax
+[ 	]*[0-9a-f]+:	44 0f 21 c7[ 	]+movq[ 	]+?%db8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 23 c0[ 	]+movq[ 	]+?%rax,%db8
+[ 	]*[0-9a-f]+:	44 0f 23 c7[ 	]+movq[ 	]+?%rdi,%db8

gas/testsuite/gas/i386/ilp32/x86-64-drx.d

@@ -0,0 +1,21 @@
+#source: ../x86-64-drx.s
+#objdump: -dw
+#name: x86-64 (ILP32) debug register related opcodes
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[0-9a-f]+:	44 0f 21 c0[ 	]+movq?[ 	]+?%db8,%rax
+[ 	]*[0-9a-f]+:	44 0f 21 c7[ 	]+movq?[ 	]+?%db8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 23 c0[ 	]+movq?[ 	]+?%rax,%db8
+[ 	]*[0-9a-f]+:	44 0f 23 c7[ 	]+movq?[ 	]+?%rdi,%db8
+[ 	]*[0-9a-f]+:	44 0f 21 c0[ 	]+movq?[ 	]+?%db8,%rax
+[ 	]*[0-9a-f]+:	44 0f 21 c7[ 	]+movq?[ 	]+?%db8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 23 c0[ 	]+movq?[ 	]+?%rax,%db8
+[ 	]*[0-9a-f]+:	44 0f 23 c7[ 	]+movq?[ 	]+?%rdi,%db8
+[ 	]*[0-9a-f]+:	44 0f 21 c0[ 	]+movq?[ 	]+?%db8,%rax
+[ 	]*[0-9a-f]+:	44 0f 21 c7[ 	]+movq?[ 	]+?%db8,%rdi
+[ 	]*[0-9a-f]+:	44 0f 23 c0[ 	]+movq?[ 	]+?%rax,%db8
+[ 	]*[0-9a-f]+:	44 0f 23 c7[ 	]+movq?[ 	]+?%rdi,%db8

gas/testsuite/gas/i386/ilp32/x86-64-ept-intel.d

@@ -0,0 +1,18 @@
+#source: ../x86-64-ept.s
+#objdump: -drwMintel
+#name: x86-64 (ILP32) EPT (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	66 0f 38 80 19       	invept rbx,OWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 44 0f 38 80 19    	invept r11,OWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 81 19       	invvpid rbx,OWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 44 0f 38 81 19    	invvpid r11,OWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 80 19       	invept rbx,OWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 44 0f 38 80 19    	invept r11,OWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 81 19       	invvpid rbx,OWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 44 0f 38 81 19    	invvpid r11,OWORD PTR \[rcx\]
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-ept.d

@@ -0,0 +1,18 @@
+#source: ../x86-64-ept.s
+#objdump: -dw
+#name: x86-64 (ILP32) EPT
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	66 0f 38 80 19       	invept \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	66 44 0f 38 80 19    	invept \(%rcx\),%r11
+[ 	]*[a-f0-9]+:	66 0f 38 81 19       	invvpid \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	66 44 0f 38 81 19    	invvpid \(%rcx\),%r11
+[ 	]*[a-f0-9]+:	66 0f 38 80 19       	invept \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	66 44 0f 38 80 19    	invept \(%rcx\),%r11
+[ 	]*[a-f0-9]+:	66 0f 38 81 19       	invvpid \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	66 44 0f 38 81 19    	invvpid \(%rcx\),%r11
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-fma-intel.d

@@ -0,0 +1,491 @@
+#source: ../x86-64-fma.s
+#objdump: -drwMintel
+#name: x86-64 (ILP32) FMA (Intel mode)
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 d4       	vfmadd132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 11       	vfmadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 d4       	vfmadd132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 11       	vfmadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 d4       	vfmadd213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 11       	vfmadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 d4       	vfmadd213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 11       	vfmadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 d4       	vfmadd231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 11       	vfmadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 d4       	vfmadd231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 11       	vfmadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 d4       	vfmaddsub132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 11       	vfmaddsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 d4       	vfmaddsub132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 11       	vfmaddsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 d4       	vfmaddsub213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 11       	vfmaddsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 d4       	vfmaddsub213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 11       	vfmaddsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 d4       	vfmaddsub231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 11       	vfmaddsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 d4       	vfmaddsub231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 11       	vfmaddsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 d4       	vfmsubadd132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 11       	vfmsubadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 d4       	vfmsubadd132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 11       	vfmsubadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 d4       	vfmsubadd213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 11       	vfmsubadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 d4       	vfmsubadd213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 11       	vfmsubadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 d4       	vfmsubadd231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 11       	vfmsubadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 d4       	vfmsubadd231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 11       	vfmsubadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a d4       	vfmsub132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a 11       	vfmsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a d4       	vfmsub132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a 11       	vfmsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd aa d4       	vfmsub213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd aa 11       	vfmsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d aa d4       	vfmsub213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d aa 11       	vfmsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ba d4       	vfmsub231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd ba 11       	vfmsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ba d4       	vfmsub231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d ba 11       	vfmsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c d4       	vfnmadd132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c 11       	vfnmadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c d4       	vfnmadd132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c 11       	vfnmadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ac d4       	vfnmadd213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd ac 11       	vfnmadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ac d4       	vfnmadd213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d ac 11       	vfnmadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd bc d4       	vfnmadd231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd bc 11       	vfnmadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d bc d4       	vfnmadd231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d bc 11       	vfnmadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e d4       	vfnmsub132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e 11       	vfnmsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e d4       	vfnmsub132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e 11       	vfnmsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ae d4       	vfnmsub213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd ae 11       	vfnmsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ae d4       	vfnmsub213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d ae 11       	vfnmsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd be d4       	vfnmsub231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd be 11       	vfnmsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d be d4       	vfnmsub231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d be 11       	vfnmsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 d4       	vfmadd132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 39       	vfmadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 98 d4       	vfmadd132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 98 39       	vfmadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 d4       	vfmadd213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 39       	vfmadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 d4       	vfmadd213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 39       	vfmadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 d4       	vfmadd231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 39       	vfmadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 d4       	vfmadd231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 39       	vfmadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 d4       	vfmaddsub132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 39       	vfmaddsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 96 d4       	vfmaddsub132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 96 39       	vfmaddsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 d4       	vfmaddsub213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 39       	vfmaddsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 d4       	vfmaddsub213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 39       	vfmaddsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 d4       	vfmaddsub231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 39       	vfmaddsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 d4       	vfmaddsub231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 39       	vfmaddsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 d4       	vfmsubadd132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 39       	vfmsubadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 97 d4       	vfmsubadd132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 97 39       	vfmsubadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 d4       	vfmsubadd213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 39       	vfmsubadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 d4       	vfmsubadd213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 39       	vfmsubadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 d4       	vfmsubadd231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 39       	vfmsubadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 d4       	vfmsubadd231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 39       	vfmsubadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a d4       	vfmsub132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a 39       	vfmsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9a d4       	vfmsub132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9a 39       	vfmsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa d4       	vfmsub213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa 39       	vfmsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 aa d4       	vfmsub213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 aa 39       	vfmsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba d4       	vfmsub231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba 39       	vfmsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ba d4       	vfmsub231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ba 39       	vfmsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c d4       	vfnmadd132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c 39       	vfnmadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9c d4       	vfnmadd132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9c 39       	vfnmadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac d4       	vfnmadd213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac 39       	vfnmadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ac d4       	vfnmadd213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ac 39       	vfnmadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc d4       	vfnmadd231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc 39       	vfnmadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bc d4       	vfnmadd231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 bc 39       	vfnmadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e d4       	vfnmsub132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e 39       	vfnmsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9e d4       	vfnmsub132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9e 39       	vfnmsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae d4       	vfnmsub213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae 39       	vfnmsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ae d4       	vfnmsub213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ae 39       	vfnmsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 be d4       	vfnmsub231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 be 39       	vfnmsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 be d4       	vfnmsub231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 be 39       	vfnmsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 d4       	vfmadd132sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 11       	vfmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 d4       	vfmadd213sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 11       	vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 d4       	vfmadd231sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 11       	vfmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b d4       	vfmsub132sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b 11       	vfmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab d4       	vfmsub213sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab 11       	vfmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb d4       	vfmsub231sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb 11       	vfmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d d4       	vfnmadd132sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d 11       	vfnmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad d4       	vfnmadd213sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad 11       	vfnmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd d4       	vfnmadd231sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd 11       	vfnmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f d4       	vfnmsub132sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f 11       	vfnmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 af d4       	vfnmsub213sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 af 11       	vfnmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf d4       	vfnmsub231sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf 11       	vfnmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 99 d4       	vfmadd132ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 99 11       	vfmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 d4       	vfmadd213ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 11       	vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 d4       	vfmadd231ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 11       	vfmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9b d4       	vfmsub132ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9b 11       	vfmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ab d4       	vfmsub213ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ab 11       	vfmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bb d4       	vfmsub231ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 bb 11       	vfmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9d d4       	vfnmadd132ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9d 11       	vfnmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ad d4       	vfnmadd213ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ad 11       	vfnmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bd d4       	vfnmadd231ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 bd 11       	vfnmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9f d4       	vfnmsub132ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9f 11       	vfnmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 af d4       	vfnmsub213ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 af 11       	vfnmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bf d4       	vfnmsub231ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 bf 11       	vfnmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 d4       	vfmadd132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 11       	vfmadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 11       	vfmadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 d4       	vfmadd132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 11       	vfmadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 11       	vfmadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 d4       	vfmadd213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 11       	vfmadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 11       	vfmadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 d4       	vfmadd213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 11       	vfmadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 11       	vfmadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 d4       	vfmadd231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 11       	vfmadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 11       	vfmadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 d4       	vfmadd231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 11       	vfmadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 11       	vfmadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 d4       	vfmaddsub132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 11       	vfmaddsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 11       	vfmaddsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 d4       	vfmaddsub132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 11       	vfmaddsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 11       	vfmaddsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 d4       	vfmaddsub213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 11       	vfmaddsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 11       	vfmaddsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 d4       	vfmaddsub213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 11       	vfmaddsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 11       	vfmaddsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 d4       	vfmaddsub231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 11       	vfmaddsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 11       	vfmaddsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 d4       	vfmaddsub231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 11       	vfmaddsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 11       	vfmaddsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 d4       	vfmsubadd132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 11       	vfmsubadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 11       	vfmsubadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 d4       	vfmsubadd132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 11       	vfmsubadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 11       	vfmsubadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 d4       	vfmsubadd213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 11       	vfmsubadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 11       	vfmsubadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 d4       	vfmsubadd213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 11       	vfmsubadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 11       	vfmsubadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 d4       	vfmsubadd231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 11       	vfmsubadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 11       	vfmsubadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 d4       	vfmsubadd231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 11       	vfmsubadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 11       	vfmsubadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a d4       	vfmsub132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a 11       	vfmsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a 11       	vfmsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a d4       	vfmsub132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a 11       	vfmsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a 11       	vfmsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd aa d4       	vfmsub213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd aa 11       	vfmsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd aa 11       	vfmsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d aa d4       	vfmsub213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d aa 11       	vfmsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d aa 11       	vfmsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ba d4       	vfmsub231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd ba 11       	vfmsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ba 11       	vfmsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ba d4       	vfmsub231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d ba 11       	vfmsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ba 11       	vfmsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c d4       	vfnmadd132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c 11       	vfnmadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c 11       	vfnmadd132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c d4       	vfnmadd132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c 11       	vfnmadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c 11       	vfnmadd132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ac d4       	vfnmadd213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd ac 11       	vfnmadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ac 11       	vfnmadd213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ac d4       	vfnmadd213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d ac 11       	vfnmadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ac 11       	vfnmadd213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd bc d4       	vfnmadd231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd bc 11       	vfnmadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd bc 11       	vfnmadd231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d bc d4       	vfnmadd231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d bc 11       	vfnmadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d bc 11       	vfnmadd231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e d4       	vfnmsub132pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e 11       	vfnmsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e 11       	vfnmsub132pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e d4       	vfnmsub132ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e 11       	vfnmsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e 11       	vfnmsub132ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ae d4       	vfnmsub213pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd ae 11       	vfnmsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd ae 11       	vfnmsub213pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ae d4       	vfnmsub213ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d ae 11       	vfnmsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d ae 11       	vfnmsub213ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd be d4       	vfnmsub231pd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 cd be 11       	vfnmsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 cd be 11       	vfnmsub231pd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d be d4       	vfnmsub231ps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 4d be 11       	vfnmsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 4d be 11       	vfnmsub231ps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 d4       	vfmadd132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 39       	vfmadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 39       	vfmadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 98 d4       	vfmadd132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 98 39       	vfmadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 98 39       	vfmadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 d4       	vfmadd213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 39       	vfmadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 39       	vfmadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 d4       	vfmadd213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 39       	vfmadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 39       	vfmadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 d4       	vfmadd231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 39       	vfmadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 39       	vfmadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 d4       	vfmadd231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 39       	vfmadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 39       	vfmadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 d4       	vfmaddsub132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 39       	vfmaddsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 39       	vfmaddsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 96 d4       	vfmaddsub132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 96 39       	vfmaddsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 96 39       	vfmaddsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 d4       	vfmaddsub213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 39       	vfmaddsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 39       	vfmaddsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 d4       	vfmaddsub213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 39       	vfmaddsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 39       	vfmaddsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 d4       	vfmaddsub231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 39       	vfmaddsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 39       	vfmaddsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 d4       	vfmaddsub231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 39       	vfmaddsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 39       	vfmaddsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 d4       	vfmsubadd132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 39       	vfmsubadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 39       	vfmsubadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 97 d4       	vfmsubadd132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 97 39       	vfmsubadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 97 39       	vfmsubadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 d4       	vfmsubadd213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 39       	vfmsubadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 39       	vfmsubadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 d4       	vfmsubadd213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 39       	vfmsubadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 39       	vfmsubadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 d4       	vfmsubadd231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 39       	vfmsubadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 39       	vfmsubadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 d4       	vfmsubadd231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 39       	vfmsubadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 39       	vfmsubadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a d4       	vfmsub132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a 39       	vfmsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a 39       	vfmsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9a d4       	vfmsub132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9a 39       	vfmsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9a 39       	vfmsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa d4       	vfmsub213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa 39       	vfmsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa 39       	vfmsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 aa d4       	vfmsub213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 aa 39       	vfmsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 aa 39       	vfmsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba d4       	vfmsub231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba 39       	vfmsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba 39       	vfmsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ba d4       	vfmsub231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ba 39       	vfmsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ba 39       	vfmsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c d4       	vfnmadd132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c 39       	vfnmadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c 39       	vfnmadd132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9c d4       	vfnmadd132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9c 39       	vfnmadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9c 39       	vfnmadd132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac d4       	vfnmadd213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac 39       	vfnmadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac 39       	vfnmadd213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ac d4       	vfnmadd213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ac 39       	vfnmadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ac 39       	vfnmadd213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc d4       	vfnmadd231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc 39       	vfnmadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc 39       	vfnmadd231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bc d4       	vfnmadd231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 bc 39       	vfnmadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bc 39       	vfnmadd231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e d4       	vfnmsub132pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e 39       	vfnmsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e 39       	vfnmsub132pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9e d4       	vfnmsub132ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9e 39       	vfnmsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9e 39       	vfnmsub132ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae d4       	vfnmsub213pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae 39       	vfnmsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae 39       	vfnmsub213pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ae d4       	vfnmsub213ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ae 39       	vfnmsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ae 39       	vfnmsub213ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 be d4       	vfnmsub231pd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 be 39       	vfnmsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 be 39       	vfnmsub231pd xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 be d4       	vfnmsub231ps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 be 39       	vfnmsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 be 39       	vfnmsub231ps xmm7,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 d4       	vfmadd132sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 11       	vfmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 11       	vfmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 d4       	vfmadd213sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 11       	vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 11       	vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 d4       	vfmadd231sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 11       	vfmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 11       	vfmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b d4       	vfmsub132sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b 11       	vfmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b 11       	vfmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab d4       	vfmsub213sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab 11       	vfmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab 11       	vfmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb d4       	vfmsub231sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb 11       	vfmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb 11       	vfmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d d4       	vfnmadd132sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d 11       	vfnmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d 11       	vfnmadd132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad d4       	vfnmadd213sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad 11       	vfnmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad 11       	vfnmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd d4       	vfnmadd231sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd 11       	vfnmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd 11       	vfnmadd231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f d4       	vfnmsub132sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f 11       	vfnmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f 11       	vfnmsub132sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 af d4       	vfnmsub213sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 af 11       	vfnmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 af 11       	vfnmsub213sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf d4       	vfnmsub231sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf 11       	vfnmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf 11       	vfnmsub231sd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 99 d4       	vfmadd132ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 99 11       	vfmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 99 11       	vfmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 d4       	vfmadd213ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 11       	vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 11       	vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 d4       	vfmadd231ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 11       	vfmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 11       	vfmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9b d4       	vfmsub132ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9b 11       	vfmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9b 11       	vfmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ab d4       	vfmsub213ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ab 11       	vfmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ab 11       	vfmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bb d4       	vfmsub231ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 bb 11       	vfmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bb 11       	vfmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9d d4       	vfnmadd132ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9d 11       	vfnmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9d 11       	vfnmadd132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ad d4       	vfnmadd213ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 ad 11       	vfnmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 ad 11       	vfnmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bd d4       	vfnmadd231ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 bd 11       	vfnmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bd 11       	vfnmadd231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9f d4       	vfnmsub132ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 9f 11       	vfnmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 9f 11       	vfnmsub132ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 af d4       	vfnmsub213ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 af 11       	vfnmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 af 11       	vfnmsub213ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bf d4       	vfnmsub231ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c4 e2 49 bf 11       	vfnmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e2 49 bf 11       	vfnmsub231ss xmm2,xmm6,DWORD PTR \[rcx\]
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-fma.d

@@ -0,0 +1,491 @@
+#source: ../x86-64-fma.s
+#objdump: -dw
+#name: x86-64 (ILP32) FMA
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 d4       	vfmadd132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 11       	vfmadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 d4       	vfmadd132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 11       	vfmadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 d4       	vfmadd213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 11       	vfmadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 d4       	vfmadd213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 11       	vfmadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 d4       	vfmadd231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 11       	vfmadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 d4       	vfmadd231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 11       	vfmadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 d4       	vfmaddsub132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 11       	vfmaddsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 d4       	vfmaddsub132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 11       	vfmaddsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 d4       	vfmaddsub213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 11       	vfmaddsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 d4       	vfmaddsub213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 11       	vfmaddsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 d4       	vfmaddsub231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 11       	vfmaddsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 d4       	vfmaddsub231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 11       	vfmaddsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 d4       	vfmsubadd132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 11       	vfmsubadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 d4       	vfmsubadd132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 11       	vfmsubadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 d4       	vfmsubadd213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 11       	vfmsubadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 d4       	vfmsubadd213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 11       	vfmsubadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 d4       	vfmsubadd231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 11       	vfmsubadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 d4       	vfmsubadd231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 11       	vfmsubadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a d4       	vfmsub132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a 11       	vfmsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a d4       	vfmsub132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a 11       	vfmsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd aa d4       	vfmsub213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd aa 11       	vfmsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d aa d4       	vfmsub213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d aa 11       	vfmsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ba d4       	vfmsub231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ba 11       	vfmsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ba d4       	vfmsub231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ba 11       	vfmsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c d4       	vfnmadd132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c 11       	vfnmadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c d4       	vfnmadd132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c 11       	vfnmadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ac d4       	vfnmadd213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ac 11       	vfnmadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ac d4       	vfnmadd213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ac 11       	vfnmadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd bc d4       	vfnmadd231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd bc 11       	vfnmadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d bc d4       	vfnmadd231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d bc 11       	vfnmadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e d4       	vfnmsub132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e 11       	vfnmsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e d4       	vfnmsub132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e 11       	vfnmsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ae d4       	vfnmsub213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ae 11       	vfnmsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ae d4       	vfnmsub213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ae 11       	vfnmsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd be d4       	vfnmsub231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd be 11       	vfnmsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d be d4       	vfnmsub231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d be 11       	vfnmsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 d4       	vfmadd132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 39       	vfmadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 98 d4       	vfmadd132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 98 39       	vfmadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 d4       	vfmadd213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 39       	vfmadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 d4       	vfmadd213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 39       	vfmadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 d4       	vfmadd231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 39       	vfmadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 d4       	vfmadd231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 39       	vfmadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 d4       	vfmaddsub132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 39       	vfmaddsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 96 d4       	vfmaddsub132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 96 39       	vfmaddsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 d4       	vfmaddsub213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 39       	vfmaddsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 d4       	vfmaddsub213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 39       	vfmaddsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 d4       	vfmaddsub231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 39       	vfmaddsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 d4       	vfmaddsub231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 39       	vfmaddsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 d4       	vfmsubadd132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 39       	vfmsubadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 97 d4       	vfmsubadd132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 97 39       	vfmsubadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 d4       	vfmsubadd213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 39       	vfmsubadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 d4       	vfmsubadd213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 39       	vfmsubadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 d4       	vfmsubadd231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 39       	vfmsubadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 d4       	vfmsubadd231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 39       	vfmsubadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a d4       	vfmsub132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a 39       	vfmsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9a d4       	vfmsub132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9a 39       	vfmsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa d4       	vfmsub213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa 39       	vfmsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 aa d4       	vfmsub213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 aa 39       	vfmsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba d4       	vfmsub231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba 39       	vfmsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ba d4       	vfmsub231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ba 39       	vfmsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c d4       	vfnmadd132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c 39       	vfnmadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9c d4       	vfnmadd132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9c 39       	vfnmadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac d4       	vfnmadd213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac 39       	vfnmadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ac d4       	vfnmadd213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ac 39       	vfnmadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc d4       	vfnmadd231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc 39       	vfnmadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 bc d4       	vfnmadd231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bc 39       	vfnmadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e d4       	vfnmsub132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e 39       	vfnmsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9e d4       	vfnmsub132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9e 39       	vfnmsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae d4       	vfnmsub213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae 39       	vfnmsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ae d4       	vfnmsub213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ae 39       	vfnmsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 be d4       	vfnmsub231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 be 39       	vfnmsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 be d4       	vfnmsub231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 be 39       	vfnmsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 d4       	vfmadd132sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 11       	vfmadd132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 d4       	vfmadd213sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 11       	vfmadd213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 d4       	vfmadd231sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 11       	vfmadd231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b d4       	vfmsub132sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b 11       	vfmsub132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab d4       	vfmsub213sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab 11       	vfmsub213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb d4       	vfmsub231sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb 11       	vfmsub231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d d4       	vfnmadd132sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d 11       	vfnmadd132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad d4       	vfnmadd213sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad 11       	vfnmadd213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd d4       	vfnmadd231sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd 11       	vfnmadd231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f d4       	vfnmsub132sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f 11       	vfnmsub132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 af d4       	vfnmsub213sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 af 11       	vfnmsub213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf d4       	vfnmsub231sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf 11       	vfnmsub231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 99 d4       	vfmadd132ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 99 11       	vfmadd132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 d4       	vfmadd213ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 11       	vfmadd213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 d4       	vfmadd231ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 11       	vfmadd231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9b d4       	vfmsub132ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9b 11       	vfmsub132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ab d4       	vfmsub213ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ab 11       	vfmsub213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bb d4       	vfmsub231ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bb 11       	vfmsub231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9d d4       	vfnmadd132ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9d 11       	vfnmadd132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ad d4       	vfnmadd213ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ad 11       	vfnmadd213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bd d4       	vfnmadd231ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bd 11       	vfnmadd231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9f d4       	vfnmsub132ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9f 11       	vfnmsub132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 af d4       	vfnmsub213ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 af 11       	vfnmsub213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bf d4       	vfnmsub231ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bf 11       	vfnmsub231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 d4       	vfmadd132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 11       	vfmadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 98 11       	vfmadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 d4       	vfmadd132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 11       	vfmadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 98 11       	vfmadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 d4       	vfmadd213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 11       	vfmadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a8 11       	vfmadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 d4       	vfmadd213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 11       	vfmadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a8 11       	vfmadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 d4       	vfmadd231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 11       	vfmadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b8 11       	vfmadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 d4       	vfmadd231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 11       	vfmadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b8 11       	vfmadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 d4       	vfmaddsub132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 11       	vfmaddsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 96 11       	vfmaddsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 d4       	vfmaddsub132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 11       	vfmaddsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 96 11       	vfmaddsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 d4       	vfmaddsub213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 11       	vfmaddsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a6 11       	vfmaddsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 d4       	vfmaddsub213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 11       	vfmaddsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a6 11       	vfmaddsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 d4       	vfmaddsub231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 11       	vfmaddsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b6 11       	vfmaddsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 d4       	vfmaddsub231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 11       	vfmaddsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b6 11       	vfmaddsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 d4       	vfmsubadd132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 11       	vfmsubadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 97 11       	vfmsubadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 d4       	vfmsubadd132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 11       	vfmsubadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 97 11       	vfmsubadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 d4       	vfmsubadd213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 11       	vfmsubadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd a7 11       	vfmsubadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 d4       	vfmsubadd213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 11       	vfmsubadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d a7 11       	vfmsubadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 d4       	vfmsubadd231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 11       	vfmsubadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd b7 11       	vfmsubadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 d4       	vfmsubadd231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 11       	vfmsubadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d b7 11       	vfmsubadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a d4       	vfmsub132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a 11       	vfmsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9a 11       	vfmsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a d4       	vfmsub132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a 11       	vfmsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9a 11       	vfmsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd aa d4       	vfmsub213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd aa 11       	vfmsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd aa 11       	vfmsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d aa d4       	vfmsub213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d aa 11       	vfmsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d aa 11       	vfmsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ba d4       	vfmsub231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ba 11       	vfmsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ba 11       	vfmsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ba d4       	vfmsub231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ba 11       	vfmsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ba 11       	vfmsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c d4       	vfnmadd132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c 11       	vfnmadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9c 11       	vfnmadd132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c d4       	vfnmadd132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c 11       	vfnmadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9c 11       	vfnmadd132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ac d4       	vfnmadd213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ac 11       	vfnmadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ac 11       	vfnmadd213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ac d4       	vfnmadd213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ac 11       	vfnmadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ac 11       	vfnmadd213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd bc d4       	vfnmadd231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd bc 11       	vfnmadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd bc 11       	vfnmadd231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d bc d4       	vfnmadd231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d bc 11       	vfnmadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d bc 11       	vfnmadd231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e d4       	vfnmsub132pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e 11       	vfnmsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd 9e 11       	vfnmsub132pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e d4       	vfnmsub132ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e 11       	vfnmsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d 9e 11       	vfnmsub132ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ae d4       	vfnmsub213pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ae 11       	vfnmsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd ae 11       	vfnmsub213pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ae d4       	vfnmsub213ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ae 11       	vfnmsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d ae 11       	vfnmsub213ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd be d4       	vfnmsub231pd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd be 11       	vfnmsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd be 11       	vfnmsub231pd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d be d4       	vfnmsub231ps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d be 11       	vfnmsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 4d be 11       	vfnmsub231ps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 d4       	vfmadd132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 39       	vfmadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 39       	vfmadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 98 d4       	vfmadd132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 98 39       	vfmadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 98 39       	vfmadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 d4       	vfmadd213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 39       	vfmadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a8 39       	vfmadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 d4       	vfmadd213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 39       	vfmadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a8 39       	vfmadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 d4       	vfmadd231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 39       	vfmadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b8 39       	vfmadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 d4       	vfmadd231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 39       	vfmadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b8 39       	vfmadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 d4       	vfmaddsub132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 39       	vfmaddsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 96 39       	vfmaddsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 96 d4       	vfmaddsub132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 96 39       	vfmaddsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 96 39       	vfmaddsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 d4       	vfmaddsub213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 39       	vfmaddsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a6 39       	vfmaddsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 d4       	vfmaddsub213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 39       	vfmaddsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a6 39       	vfmaddsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 d4       	vfmaddsub231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 39       	vfmaddsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b6 39       	vfmaddsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 d4       	vfmaddsub231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 39       	vfmaddsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b6 39       	vfmaddsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 d4       	vfmsubadd132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 39       	vfmsubadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 97 39       	vfmsubadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 97 d4       	vfmsubadd132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 97 39       	vfmsubadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 97 39       	vfmsubadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 d4       	vfmsubadd213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 39       	vfmsubadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 a7 39       	vfmsubadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 d4       	vfmsubadd213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 39       	vfmsubadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 a7 39       	vfmsubadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 d4       	vfmsubadd231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 39       	vfmsubadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 b7 39       	vfmsubadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 d4       	vfmsubadd231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 39       	vfmsubadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 b7 39       	vfmsubadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a d4       	vfmsub132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a 39       	vfmsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9a 39       	vfmsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9a d4       	vfmsub132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9a 39       	vfmsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9a 39       	vfmsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa d4       	vfmsub213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa 39       	vfmsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 aa 39       	vfmsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 aa d4       	vfmsub213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 aa 39       	vfmsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 aa 39       	vfmsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba d4       	vfmsub231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba 39       	vfmsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ba 39       	vfmsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ba d4       	vfmsub231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ba 39       	vfmsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ba 39       	vfmsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c d4       	vfnmadd132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c 39       	vfnmadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9c 39       	vfnmadd132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9c d4       	vfnmadd132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9c 39       	vfnmadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9c 39       	vfnmadd132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac d4       	vfnmadd213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac 39       	vfnmadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ac 39       	vfnmadd213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ac d4       	vfnmadd213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ac 39       	vfnmadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ac 39       	vfnmadd213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc d4       	vfnmadd231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc 39       	vfnmadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 bc 39       	vfnmadd231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 bc d4       	vfnmadd231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bc 39       	vfnmadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 bc 39       	vfnmadd231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e d4       	vfnmsub132pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e 39       	vfnmsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 9e 39       	vfnmsub132pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9e d4       	vfnmsub132ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9e 39       	vfnmsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 9e 39       	vfnmsub132ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae d4       	vfnmsub213pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae 39       	vfnmsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 ae 39       	vfnmsub213pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ae d4       	vfnmsub213ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ae 39       	vfnmsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 ae 39       	vfnmsub213ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 be d4       	vfnmsub231pd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 be 39       	vfnmsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 be 39       	vfnmsub231pd \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 be d4       	vfnmsub231ps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 be 39       	vfnmsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 49 be 39       	vfnmsub231ps \(%rcx\),%xmm6,%xmm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 d4       	vfmadd132sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 11       	vfmadd132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 99 11       	vfmadd132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 d4       	vfmadd213sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 11       	vfmadd213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 a9 11       	vfmadd213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 d4       	vfmadd231sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 11       	vfmadd231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 b9 11       	vfmadd231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b d4       	vfmsub132sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b 11       	vfmsub132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9b 11       	vfmsub132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab d4       	vfmsub213sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab 11       	vfmsub213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ab 11       	vfmsub213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb d4       	vfmsub231sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb 11       	vfmsub231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bb 11       	vfmsub231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d d4       	vfnmadd132sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d 11       	vfnmadd132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9d 11       	vfnmadd132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad d4       	vfnmadd213sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad 11       	vfnmadd213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 ad 11       	vfnmadd213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd d4       	vfnmadd231sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd 11       	vfnmadd231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bd 11       	vfnmadd231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f d4       	vfnmsub132sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f 11       	vfnmsub132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 9f 11       	vfnmsub132sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 af d4       	vfnmsub213sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 af 11       	vfnmsub213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 af 11       	vfnmsub213sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf d4       	vfnmsub231sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf 11       	vfnmsub231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 c9 bf 11       	vfnmsub231sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 99 d4       	vfmadd132ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 99 11       	vfmadd132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 99 11       	vfmadd132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 d4       	vfmadd213ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 11       	vfmadd213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 a9 11       	vfmadd213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 d4       	vfmadd231ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 11       	vfmadd231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 b9 11       	vfmadd231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9b d4       	vfmsub132ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9b 11       	vfmsub132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9b 11       	vfmsub132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ab d4       	vfmsub213ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ab 11       	vfmsub213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ab 11       	vfmsub213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bb d4       	vfmsub231ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bb 11       	vfmsub231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bb 11       	vfmsub231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9d d4       	vfnmadd132ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9d 11       	vfnmadd132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9d 11       	vfnmadd132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ad d4       	vfnmadd213ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ad 11       	vfnmadd213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 ad 11       	vfnmadd213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bd d4       	vfnmadd231ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bd 11       	vfnmadd231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bd 11       	vfnmadd231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9f d4       	vfnmsub132ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9f 11       	vfnmsub132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 9f 11       	vfnmsub132ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 af d4       	vfnmsub213ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 af 11       	vfnmsub213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 af 11       	vfnmsub213ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bf d4       	vfnmsub231ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bf 11       	vfnmsub231ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e2 49 bf 11       	vfnmsub231ss \(%rcx\),%xmm6,%xmm2
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-fma4.d

@@ -0,0 +1,72 @@
+#source: ../x86-64-fma4.s
+#objdump: -dw
+#name: x86-64 (ILP32) FMA4
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e3 ed 69 fc 60    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 69 39 60    	vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 68 fc 60    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 68 39 60    	vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 63 41 68 5c da 01 40 	vfmaddps %xmm4,0x1\(%rdx,%rbx,8\),%xmm7,%xmm11
+[ 	]*[a-f0-9]+:	c4 e3 49 68 a4 81 80 00 00 00 80 	vfmaddps %xmm8,0x80\(%rcx,%rax,4\),%xmm6,%xmm4
+[ 	]*[a-f0-9]+:	c4 e3 ed 5d fc 60    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5d 39 60    	vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5c fc 60    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5c 39 60    	vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 69 fc 60    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 69 39 60    	vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 69 39 40    	vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 68 fc 60    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 68 39 60    	vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 68 39 40    	vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5d fc 60    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5d 39 60    	vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 5d 39 40    	vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5c fc 60    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5c 39 60    	vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 5c 39 40    	vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6b fc 60    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6b 39 60    	vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6b 39 40    	vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6a fc 60    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6a 39 60    	vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6a 39 40    	vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 79 fc 60    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 79 39 60    	vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 78 fc 60    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 78 39 60    	vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7d fc 60    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7d 39 60    	vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7c fc 60    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7c 39 60    	vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 79 fc 60    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 79 39 60    	vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 79 39 40    	vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 78 fc 60    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 78 39 60    	vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 78 39 40    	vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7d fc 60    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7d 39 60    	vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7d 39 40    	vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7c fc 60    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7c 39 60    	vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7c 39 40    	vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7b fc 60    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7b 39 60    	vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7b 39 40    	vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7f fc 60    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7f 39 60    	vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7f 39 40    	vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7a fc 60    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7a 39 60    	vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7a 39 40    	vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7e fc 60    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7e 39 60    	vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 c3 e1 69 64 0d 00 b0[ 	]+vfmaddpd 0x0\(%r13,%rcx,1\),%xmm11,%xmm3,%xmm4
+[ 	]*[a-f0-9]+:	c4 c3 f1 69 bc c1 be 00 00 00 90[ 	]+vfmaddpd 0xbe\(%r9,%rax,8\),%xmm9,%xmm1,%xmm7
+[ 	]*[a-f0-9]+:	c4 c3 e1 6d 64 0d 00 b0[ 	]+vfmsubpd 0x0\(%r13,%rcx,1\),%xmm11,%xmm3,%xmm4
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-gidt.d

@@ -0,0 +1,18 @@
+#source: ../x86-64-gidt.s
+#objdump: -dw
+#name: x86-64 (ILP32) load/store global/interrupt description table register.
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <foo>:
+   0:	0f 01 08 [ 	]*sidt   \(%rax\)
+   3:	0f 01 18 [ 	]*lidt   \(%rax\)
+   6:	0f 01 00 [ 	]*sgdt   \(%rax\)
+   9:	0f 01 10 [ 	]*lgdt   \(%rax\)
+   c:	0f 01 08 [ 	]*sidt   \(%rax\)
+   f:	0f 01 18 [ 	]*lidt   \(%rax\)
+  12:	0f 01 00 [ 	]*sgdt   \(%rax\)
+  15:	0f 01 10 [ 	]*lgdt   \(%rax\)
+	...

gas/testsuite/gas/i386/ilp32/x86-64-ifunc.d

@@ -0,0 +1,20 @@
+#source: ../ifunc.s
+#objdump: -drw
+#name: x86-64 (ILP32) ifunc
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	e9 00 00 00 00       	jmpq   5 <ifunc>	1: R_X86_64_PLT32	ifunc(\+0xf+c|-0x4)
+
+0+5 <ifunc>:
+[ 	]*[a-f0-9]+:	c3                   	retq   
+
+0+6 <bar>:
+[ 	]*[a-f0-9]+:	eb 00                	jmp    8 <normal>
+
+0+8 <normal>:
+[ 	]*[a-f0-9]+:	c3                   	retq   
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-intel64.d

@@ -0,0 +1,11 @@
+#source: ../x86-64-intel64.s
+#objdump: -dw
+#name: x86-64 (ILP32) Intel64
+
+.*: +file format .*
+
+Disassembly of section .text:
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 05                	syscall 
+[ 	]*[a-f0-9]+:	0f 07                	sysret 
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-io-intel.d

@@ -0,0 +1,24 @@
+#source: ../x86-64-io.s
+#objdump: -dwMintel
+#name: x86-64 (ILP32) rex.W in/out (Intel disassembly)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_in>:
+   0:	48 ed                	rex.W in eax,dx
+   2:	66 48 ed             	data32 rex.W in eax,dx
+
+0+005 <_out>:
+   5:	48 ef                	rex.W out dx,eax
+   7:	66 48 ef             	data32 rex.W out dx,eax
+
+0+00a <_ins>:
+   a:	48 6d                	rex.W ins DWORD PTR es:\[rdi\],dx
+   c:	66 48 6d             	data32 rex.W ins DWORD PTR es:\[rdi\],dx
+
+0+00f <_outs>:
+   f:	48 6f                	rex.W outs dx,DWORD PTR ds:\[rsi\]
+  11:	66 48 6f             	data32 rex.W outs dx,DWORD PTR ds:\[rsi\]
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-io-suffix.d

@@ -0,0 +1,24 @@
+#source: ../x86-64-io.s
+#objdump: -dwMsuffix
+#name: x86-64 (ILP32) rex.W in/out w/ suffix
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_in>:
+   0:	48 ed                	rex.W inl \(%dx\),%eax
+   2:	66 48 ed             	data32 rex.W inl \(%dx\),%eax
+
+0+005 <_out>:
+   5:	48 ef                	rex.W outl %eax,\(%dx\)
+   7:	66 48 ef             	data32 rex.W outl %eax,\(%dx\)
+
+0+00a <_ins>:
+   a:	48 6d                	rex.W insl \(%dx\),%es:\(%rdi\)
+   c:	66 48 6d             	data32 rex.W insl \(%dx\),%es:\(%rdi\)
+
+0+00f <_outs>:
+   f:	48 6f                	rex.W outsl %ds:\(%rsi\),\(%dx\)
+  11:	66 48 6f             	data32 rex.W outsl %ds:\(%rsi\),\(%dx\)
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-io.d

@@ -0,0 +1,24 @@
+#source: ../x86-64-io.s
+#objdump: -dw
+#name: x86-64 (ILP32) rex.W in/out
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_in>:
+   0:	48 ed                	rex.W in \(%dx\),%eax
+   2:	66 48 ed             	data32 rex.W in \(%dx\),%eax
+
+0+005 <_out>:
+   5:	48 ef                	rex.W out %eax,\(%dx\)
+   7:	66 48 ef             	data32 rex.W out %eax,\(%dx\)
+
+0+00a <_ins>:
+   a:	48 6d                	rex.W insl \(%dx\),%es:\(%rdi\)
+   c:	66 48 6d             	data32 rex.W insl \(%dx\),%es:\(%rdi\)
+
+0+00f <_outs>:
+   f:	48 6f                	rex.W outsl %ds:\(%rsi\),\(%dx\)
+  11:	66 48 6f             	data32 rex.W outsl %ds:\(%rsi\),\(%dx\)
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-localpic.d

@@ -0,0 +1,10 @@
+#source: ../x86-64-localpic.s
+#readelf: -rs
+#name: x86-64 (ILP32) local PIC
+
+Relocation section '.rela.text' at offset 0x[0-9a-f]+ contains 1 entries:
+ Offset     Info    Type            Sym.Value  Sym. Name \+ Addend
+[0-9a-f]+ +[0-9a-f]+ R_X86_64_GOTPCREL +[0-9a-f]+ +foo - 4
+#...
+ +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +NOTYPE +LOCAL +DEFAULT +[0-9]+ +foo
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-mem-intel.d

@@ -0,0 +1,43 @@
+#source: ../x86-64-mem.s
+#as: -J
+#objdump: -dw -Mintel
+#name: x86-64 (ILP32) mem (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 01 06             	sgdt   \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 0e             	sidt   \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 16             	lgdt   \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 1e             	lidt   \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 3e             	invlpg BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f c7 0e             	cmpxchg8b QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	48 0f c7 0e          	cmpxchg16b OWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f c7 36             	vmptrld QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	66 0f c7 36          	vmclear QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f3 0f c7 36          	vmxon  QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f c7 3e             	vmptrst QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 06             	fxsave \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 0e             	fxrstor \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 16             	ldmxcsr DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 1e             	stmxcsr DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 3e             	clflush BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 06             	sgdt   \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 0e             	sidt   \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 16             	lgdt   \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 1e             	lidt   \[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 3e             	invlpg BYTE PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f c7 0e             	cmpxchg8b QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	48 0f c7 0e          	cmpxchg16b OWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f c7 36             	vmptrld QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	66 0f c7 36          	vmclear QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	f3 0f c7 36          	vmxon  QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f c7 3e             	vmptrst QWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 06             	fxsave \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 0e             	fxrstor \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 16             	ldmxcsr DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 1e             	stmxcsr DWORD PTR \[rsi\]
+[ 	]*[a-f0-9]+:	0f ae 3e             	clflush BYTE PTR \[rsi\]
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-mem.d

@@ -0,0 +1,43 @@
+#source: ../x86-64-mem.s
+#as: -J
+#objdump: -dw
+#name: x86-64 (ILP32) mem
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 01 06             	sgdt   \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 0e             	sidt   \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 16             	lgdt   \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 1e             	lidt   \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 3e             	invlpg \(%rsi\)
+[ 	]*[a-f0-9]+:	0f c7 0e             	cmpxchg8b \(%rsi\)
+[ 	]*[a-f0-9]+:	48 0f c7 0e          	cmpxchg16b \(%rsi\)
+[ 	]*[a-f0-9]+:	0f c7 36             	vmptrld \(%rsi\)
+[ 	]*[a-f0-9]+:	66 0f c7 36          	vmclear \(%rsi\)
+[ 	]*[a-f0-9]+:	f3 0f c7 36          	vmxon  \(%rsi\)
+[ 	]*[a-f0-9]+:	0f c7 3e             	vmptrst \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 06             	fxsave \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 0e             	fxrstor \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 16             	ldmxcsr \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 1e             	stmxcsr \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 3e             	clflush \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 06             	sgdt   \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 0e             	sidt   \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 16             	lgdt   \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 1e             	lidt   \(%rsi\)
+[ 	]*[a-f0-9]+:	0f 01 3e             	invlpg \(%rsi\)
+[ 	]*[a-f0-9]+:	0f c7 0e             	cmpxchg8b \(%rsi\)
+[ 	]*[a-f0-9]+:	48 0f c7 0e          	cmpxchg16b \(%rsi\)
+[ 	]*[a-f0-9]+:	0f c7 36             	vmptrld \(%rsi\)
+[ 	]*[a-f0-9]+:	66 0f c7 36          	vmclear \(%rsi\)
+[ 	]*[a-f0-9]+:	f3 0f c7 36          	vmxon  \(%rsi\)
+[ 	]*[a-f0-9]+:	0f c7 3e             	vmptrst \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 06             	fxsave \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 0e             	fxrstor \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 16             	ldmxcsr \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 1e             	stmxcsr \(%rsi\)
+[ 	]*[a-f0-9]+:	0f ae 3e             	clflush \(%rsi\)
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-movbe-intel.d

@@ -0,0 +1,28 @@
+#source: ../x86-64-movbe.s
+#objdump: -drwMintel
+#name: x86-64 (ILP32) movbe (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	66 45 0f 38 f0 29    	movbe  r13w,WORD PTR \[r9\]
+[ 	]*[a-f0-9]+:	45 0f 38 f0 29       	movbe  r13d,DWORD PTR \[r9\]
+[ 	]*[a-f0-9]+:	4d 0f 38 f0 29       	movbe  r13,QWORD PTR \[r9\]
+[ 	]*[a-f0-9]+:	66 45 0f 38 f1 29    	movbe  WORD PTR \[r9\],r13w
+[ 	]*[a-f0-9]+:	45 0f 38 f1 29       	movbe  DWORD PTR \[r9\],r13d
+[ 	]*[a-f0-9]+:	4d 0f 38 f1 29       	movbe  QWORD PTR \[r9\],r13
+[ 	]*[a-f0-9]+:	66 45 0f 38 f0 29    	movbe  r13w,WORD PTR \[r9\]
+[ 	]*[a-f0-9]+:	45 0f 38 f0 29       	movbe  r13d,DWORD PTR \[r9\]
+[ 	]*[a-f0-9]+:	4d 0f 38 f0 29       	movbe  r13,QWORD PTR \[r9\]
+[ 	]*[a-f0-9]+:	66 45 0f 38 f1 29    	movbe  WORD PTR \[r9\],r13w
+[ 	]*[a-f0-9]+:	45 0f 38 f1 29       	movbe  DWORD PTR \[r9\],r13d
+[ 	]*[a-f0-9]+:	4d 0f 38 f1 29       	movbe  QWORD PTR \[r9\],r13
+[ 	]*[a-f0-9]+:	66 0f 38 f0 19       	movbe  bx,WORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	0f 38 f0 19          	movbe  ebx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	48 0f 38 f0 19       	movbe  rbx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	66 0f 38 f1 19       	movbe  WORD PTR \[rcx\],bx
+[ 	]*[a-f0-9]+:	0f 38 f1 19          	movbe  DWORD PTR \[rcx\],ebx
+[ 	]*[a-f0-9]+:	48 0f 38 f1 19       	movbe  QWORD PTR \[rcx\],rbx
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-movbe.d

@@ -0,0 +1,28 @@
+#source: ../x86-64-movbe.s
+#objdump: -dw
+#name: x86-64 (ILP32) movbe
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	66 45 0f 38 f0 29    	movbe  \(%r9\),%r13w
+[ 	]*[a-f0-9]+:	45 0f 38 f0 29       	movbe  \(%r9\),%r13d
+[ 	]*[a-f0-9]+:	4d 0f 38 f0 29       	movbe  \(%r9\),%r13
+[ 	]*[a-f0-9]+:	66 45 0f 38 f1 29    	movbe  %r13w,\(%r9\)
+[ 	]*[a-f0-9]+:	45 0f 38 f1 29       	movbe  %r13d,\(%r9\)
+[ 	]*[a-f0-9]+:	4d 0f 38 f1 29       	movbe  %r13,\(%r9\)
+[ 	]*[a-f0-9]+:	66 45 0f 38 f0 29    	movbe  \(%r9\),%r13w
+[ 	]*[a-f0-9]+:	45 0f 38 f0 29       	movbe  \(%r9\),%r13d
+[ 	]*[a-f0-9]+:	4d 0f 38 f0 29       	movbe  \(%r9\),%r13
+[ 	]*[a-f0-9]+:	66 45 0f 38 f1 29    	movbe  %r13w,\(%r9\)
+[ 	]*[a-f0-9]+:	45 0f 38 f1 29       	movbe  %r13d,\(%r9\)
+[ 	]*[a-f0-9]+:	4d 0f 38 f1 29       	movbe  %r13,\(%r9\)
+[ 	]*[a-f0-9]+:	66 0f 38 f0 19       	movbe  \(%rcx\),%bx
+[ 	]*[a-f0-9]+:	0f 38 f0 19          	movbe  \(%rcx\),%ebx
+[ 	]*[a-f0-9]+:	48 0f 38 f0 19       	movbe  \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	66 0f 38 f1 19       	movbe  %bx,\(%rcx\)
+[ 	]*[a-f0-9]+:	0f 38 f1 19          	movbe  %ebx,\(%rcx\)
+[ 	]*[a-f0-9]+:	48 0f 38 f1 19       	movbe  %rbx,\(%rcx\)
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-nops-1-core2.d

@@ -0,0 +1,156 @@
+#source: ../nops-1.s
+#as: -mtune=core2
+#objdump: -drw
+#name: x86-64 (ILP32) -mtune=core2 nops 1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+20 <nop13>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+30 <nop12>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 2e 0f 1f 84 00 00 00 00 00 	data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 2e 0f 1f 84 00 00 00 00 00 	nopw   %cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 0f 1f 84 00 00 00 00 00 	nopw   0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 84 00 00 00 00 00 	nopl   0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 80 00 00 00 00 	nopl   0x0\(%rax\)
+
+0+90 <nop6>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 0f 1f 44 00 00    	nopw   0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 44 00 00       	nopl   0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 40 00          	nopl   0x0\(%rax\)
+
+0+c0 <nop3>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 00             	nopl   \(%rax\)
+
+0+d0 <nop2>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 90                	xchg   %ax,%ax
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-nops-1-k8.d

@@ -0,0 +1,161 @@
+#source: ../nops-1.s
+#as: -mtune=k8
+#objdump: -drw
+#name: x86-64 (ILP32) -mtune=k8 nops 1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[	 ]*0:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*1:[	 ]+0f 1f 80 00 00 00 00[	 ]+nopl[ 	]+0x0\(%rax\)
+[	 ]*8:[	 ]+0f 1f 84 00 00 00 00 00[	 ]+nopl[ 	]+0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[	 ]*10:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*11:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*12:[	 ]+0f 1f 80 00 00 00 00[	 ]+nopl[ 	]+0x0\(%rax\)
+[	 ]*19:[	 ]+0f 1f 80 00 00 00 00[	 ]+nopl[ 	]+0x0\(%rax\)
+
+0+20 <nop13>:
+[	 ]*20:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*21:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*22:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*23:[	 ]+66 0f 1f 44 00 00[	 ]+nopw[ 	]+0x0\(%rax,%rax,1\)
+[	 ]*29:[	 ]+0f 1f 80 00 00 00 00[	 ]+nopl[ 	]+0x0\(%rax\)
+
+0+30 <nop12>:
+[	 ]*30:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*31:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*32:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*33:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*34:[	 ]+66 0f 1f 44 00 00[	 ]+nopw[ 	]+0x0\(%rax,%rax,1\)
+[	 ]*3a:[	 ]+66 0f 1f 44 00 00[	 ]+nopw[ 	]+0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[	 ]*40:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*41:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*42:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*43:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*44:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*45:[	 ]+0f 1f 44 00 00[	 ]+nopl[ 	]+0x0\(%rax,%rax,1\)
+[	 ]*4a:[	 ]+66 0f 1f 44 00 00[	 ]+nopw[ 	]+0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[	 ]*50:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*51:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*52:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*53:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*54:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*55:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*56:[	 ]+66 2e 0f 1f 84 00 00 00 00 00[	 ]+nopw[ 	]+%cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[	 ]*60:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*61:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*62:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*63:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*64:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*65:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*66:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*67:[	 ]+66 0f 1f 84 00 00 00 00 00[	 ]+nopw[ 	]+0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[	 ]*70:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*71:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*72:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*73:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*74:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*75:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*76:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*77:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*78:[	 ]+0f 1f 84 00 00 00 00 00[	 ]+nopl[ 	]+0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[	 ]*80:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*81:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*82:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*83:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*84:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*85:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*86:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*87:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*88:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*89:[	 ]+0f 1f 80 00 00 00 00[	 ]+nopl[ 	]+0x0\(%rax\)
+
+0+90 <nop6>:
+[	 ]*90:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*91:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*92:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*93:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*94:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*95:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*96:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*97:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*98:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*99:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*9a:[	 ]+66 0f 1f 44 00 00[	 ]+nopw[ 	]+0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[	 ]*a0:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a1:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a2:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a3:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a4:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a5:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a6:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a7:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a8:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*a9:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*aa:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*ab:[	 ]+0f 1f 44 00 00[	 ]+nopl[ 	]+0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[	 ]*b0:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b1:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b2:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b3:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b4:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b5:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b6:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b7:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b8:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*b9:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*ba:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*bb:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*bc:[	 ]+0f 1f 40 00[	 ]+nopl[ 	]+0x0\(%rax\)
+
+0+c0 <nop3>:
+[	 ]*c0:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c1:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c2:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c3:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c4:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c5:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c6:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c7:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c8:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*c9:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*ca:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*cb:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*cc:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*cd:[	 ]+0f 1f 00[	 ]+nopl[ 	]+\(%rax\)
+
+0+d0 <nop2>:
+[	 ]*d0:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d1:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d2:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d3:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d4:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d5:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d6:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d7:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d8:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*d9:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*da:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*db:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*dc:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*dd:[	 ]+90[	 ]+nop[ 	]*
+[	 ]*de:[	 ]+66 90[	 ]+xchg[ 	]+%ax,%ax
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-nops-1-nocona.d

@@ -0,0 +1,156 @@
+#source: ../nops-1.s
+#as: -mtune=nocona
+#objdump: -drw
+#name: x86-64 (ILP32) -mtune=nocona nops 1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+20 <nop13>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+30 <nop12>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 2e 0f 1f 84 00 00 00 00 00 	data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 2e 0f 1f 84 00 00 00 00 00 	nopw   %cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 0f 1f 84 00 00 00 00 00 	nopw   0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 84 00 00 00 00 00 	nopl   0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 80 00 00 00 00 	nopl   0x0\(%rax\)
+
+0+90 <nop6>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 0f 1f 44 00 00    	nopw   0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 44 00 00       	nopl   0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 40 00          	nopl   0x0\(%rax\)
+
+0+c0 <nop3>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 00             	nopl   \(%rax\)
+
+0+d0 <nop2>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 90                	xchg   %ax,%ax
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-nops-1-pentium.d

@@ -0,0 +1,247 @@
+#source: ../nops-1.s
+#as: -mtune=pentium
+#objdump: -drw
+#name: x86-64 (ILP32) -mtune=pentium nops 1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 0d                	jmp    10 <nop14>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+10 <nop14>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 0c                	jmp    20 <nop13>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+20 <nop13>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 0b                	jmp    30 <nop12>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+30 <nop12>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 0a                	jmp    40 <nop11>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+40 <nop11>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 09                	jmp    50 <nop10>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+50 <nop10>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 08                	jmp    60 <nop9>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+60 <nop9>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 07                	jmp    70 <nop8>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+70 <nop8>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 06                	jmp    80 <nop7>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+80 <nop7>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 05                	jmp    90 <nop6>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+90 <nop6>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 04                	jmp    a0 <nop5>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+a0 <nop5>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 03                	jmp    b0 <nop4>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+b0 <nop4>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 02                	jmp    c0 <nop3>
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+c0 <nop3>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	eb 01                	jmp    d0 <nop2>
+[ 	]*[a-f0-9]+:	90                   	nop
+
+0+d0 <nop2>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 90                	xchg   %ax,%ax
+#pass

gas/testsuite/gas/i386/ilp32/x86-64-nops-1.d

@@ -0,0 +1,156 @@
+#source: ../nops-1.s
+#as: -mtune=generic64
+#objdump: -drw
+#name: x86-64 (ILP32) nops 1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <nop15>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+10 <nop14>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+20 <nop13>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+30 <nop12>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 66 2e 0f 1f 84 00 00 00 00 00 	data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+40 <nop11>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 66 2e 0f 1f 84 00 00 00 00 00 	data32 nopw %cs:0x0\(%rax,%rax,1\)
+
+0+50 <nop10>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 2e 0f 1f 84 00 00 00 00 00 	nopw   %cs:0x0\(%rax,%rax,1\)
+
+0+60 <nop9>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 0f 1f 84 00 00 00 00 00 	nopw   0x0\(%rax,%rax,1\)
+
+0+70 <nop8>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 84 00 00 00 00 00 	nopl   0x0\(%rax,%rax,1\)
+
+0+80 <nop7>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 80 00 00 00 00 	nopl   0x0\(%rax\)
+
+0+90 <nop6>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 0f 1f 44 00 00    	nopw   0x0\(%rax,%rax,1\)
+
+0+a0 <nop5>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 44 00 00       	nopl   0x0\(%rax,%rax,1\)
+
+0+b0 <nop4>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 40 00          	nopl   0x0\(%rax\)
+
+0+c0 <nop3>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	0f 1f 00             	nopl   \(%rax\)
+
+0+d0 <nop2>:
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	90                   	nop
+[ 	]*[a-f0-9]+:	66 90                	xchg   %ax,%ax
+#pass