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[ARM] Clear reserved bits in CPSR

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Bits 20 ~ 23 of CPSR are reserved (RAZ, read as zero), but they are not
zero if the arm program runs on aarch64-linux.  AArch64 tracer gets PSTATE
from arm 32-bit tracee as CPSR, but bits 20 ~ 23 are used in PSTATE.  I
think kernel should clear these bits when it is read through ptrace, but
the fix in user space is still needed.

This patch fixes these two fails,

-FAIL: gdb.reverse/insn-reverse.exp: ext_reg_push_pop: compare registers on insn 0:vldr	d7, [r11, #-12]
-FAIL: gdb.reverse/insn-reverse.exp: ext_reg_push_pop: compare registers on insn 0:vldr	d7, [r7]

gdb:

2016-04-22  Yao Qi  <yao.qi@linaro.org>

	* aarch32-linux-nat.c (aarch32_gp_regcache_supply): Clear CPSR
	bits 20 to 23.

gdb/gdbserver:

2016-04-22  Yao Qi  <yao.qi@linaro.org>

	* linux-aarch32-low.c (arm_store_gregset): Clear CPSR bits 20
	to 23.
This commit is contained in:
Yao Qi 2016-04-22 15:53:05 +01:00
parent 495346f6f0
commit 3539aa13fb
4 changed files with 19 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
gdb/ChangeLog
View File

@ -1,3 +1,8 @@
2016-04-22 Yao Qi <yao.qi@linaro.org>
* aarch32-linux-nat.c (aarch32_gp_regcache_supply): Clear CPSR
bits 20 to 23.
2016-04-22 Joel Brobecker <brobecker@adacore.com>
* MAINTAINER: Remove myself as AIX Maintainer.

6
gdb/aarch32-linux-nat.c
View File

@ -37,7 +37,11 @@ aarch32_gp_regcache_supply (struct regcache *regcache, uint32_t *regs,
regcache_raw_supply (regcache, regno, &regs[regno]);
if (arm_apcs_32)
regcache_raw_supply (regcache, ARM_PS_REGNUM, &regs[ARM_CPSR_GREGNUM]);
{
/* Clear reserved bits bit 20 to bit 23. */
regs[ARM_CPSR_GREGNUM] &= 0xff0fffff;
regcache_raw_supply (regcache, ARM_PS_REGNUM, &regs[ARM_CPSR_GREGNUM]);
}
else
regcache_raw_supply (regcache, ARM_PS_REGNUM, &regs[ARM_PC_REGNUM]);

5
gdb/gdbserver/ChangeLog
View File

@ -1,3 +1,8 @@
2016-04-22 Yao Qi <yao.qi@linaro.org>
* linux-aarch32-low.c (arm_store_gregset): Clear CPSR bits 20
to 23.
2016-04-22 Yao Qi <yao.qi@linaro.org>
* linux-low.c (lwp_signal_can_be_delivered): Don't deliver

5
gdb/gdbserver/linux-aarch32-low.c
View File

@ -77,6 +77,7 @@ arm_store_gregset (struct regcache *regcache, const void *buf)
int i;
char zerobuf[8];
const uint32_t *regs = (const uint32_t *) buf;
uint32_t cpsr = regs[ARM_CPSR_GREGNUM];
memset (zerobuf, 0, 8);
for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
@ -85,7 +86,9 @@ arm_store_gregset (struct regcache *regcache, const void *buf)
for (; i < ARM_PS_REGNUM; i++)
supply_register (regcache, i, zerobuf);
supply_register (regcache, ARM_PS_REGNUM, &regs[ARM_CPSR_GREGNUM]);
/* Clear reserved bits bit 20 to bit 23. */
cpsr &= 0xff0fffff;
supply_register (regcache, ARM_PS_REGNUM, &cpsr);
}
/* Collect NUM number of VFP registers from REGCACHE to buffer BUF. */