diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index e640321a37..5722761f5b 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+Thu Jan 29 13:02:56 1998  Doug Evans  <devans@canuck.cygnus.com>
+
+	* m32r-opc.h (HAVE_CPU_M32R): Define.
+
 start-sanitize-sky
 Wed Jan 28 13:46:19 1998  Doug Evans  <devans@canuck.cygnus.com>
 
@@ -6,6 +10,7 @@ Wed Jan 28 13:46:19 1998  Doug Evans  <devans@canuck.cygnus.com>
 	* configure: Regenerate.
 	* Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
 	(dvp-dis.lo,dvp-opc.lo): Add rules for.
+	(mips-dis.lo): Compile with @archdefs@.
 	* Makefile.in: Regenerate.
 	* disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
 	* mips-dis.c (print_insn_little_mips): Check for DVP insns.
diff --git a/opcodes/m32r-opc.h b/opcodes/m32r-opc.h
index ce2ffe4922..62b3f6cc6f 100644
--- a/opcodes/m32r-opc.h
+++ b/opcodes/m32r-opc.h
@@ -24,9 +24,13 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 #define m32r_OPC_H
 
 #define CGEN_ARCH m32r
+
 /* Given symbol S, return m32r_cgen_<s>.  */
 #define CGEN_SYM(s) CGEN_CAT3 (m32r,_cgen_,s)
 
+/* Selected cpu families.  */
+#define HAVE_CPU_M32R
+
 #define CGEN_WORD_BITSIZE 32
 #define CGEN_DEFAULT_INSN_BITSIZE 32
 #define CGEN_BASE_INSN_BITSIZE 32