diff --git a/gas/ChangeLog b/gas/ChangeLog index 287656b325..4ab6fa3ef1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2018-01-09 Jim Wilson + + * testsuite/gas/riscv/auipc-x0.d: New. + * testsuite/gas/riscv/auipc-x0.s: New. + 2018-01-09 James Greenhalgh * config/tc-arm.c (insns): Add csdb, enable for Armv3 and above diff --git a/gas/testsuite/gas/riscv/auipc-x0.d b/gas/testsuite/gas/riscv/auipc-x0.d new file mode 100644 index 0000000000..bcf95af057 --- /dev/null +++ b/gas/testsuite/gas/riscv/auipc-x0.d @@ -0,0 +1,12 @@ +#as: -march=rv32i +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +#... +[ ]+40:[ ]+00000017[ ]+auipc[ ]+zero,0x0 +[ ]+44:[ ]+00002003[ ]+lw[ ]+zero,0\(zero\) # 0 .* diff --git a/gas/testsuite/gas/riscv/auipc-x0.s b/gas/testsuite/gas/riscv/auipc-x0.s new file mode 100644 index 0000000000..f7b394c67d --- /dev/null +++ b/gas/testsuite/gas/riscv/auipc-x0.s @@ -0,0 +1,4 @@ +target: + .skip 64 + auipc x0, 0 + lw x0, 0(x0) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 96bc41c900..24d1101c10 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2018-01-09 Jim Wilson + + * riscv-dis.c (maybe_print_address): If base_reg is zero, + then the hi_addr value is zero. + 2018-01-09 James Greenhalgh * arm-dis.c (arm_opcodes): Add csdb. diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index cc427b4b93..cc642d4ad3 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -101,7 +101,7 @@ maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset) { if (pd->hi_addr[base_reg] != (bfd_vma)-1) { - pd->print_addr = pd->hi_addr[base_reg] + offset; + pd->print_addr = (base_reg != 0 ? pd->hi_addr[base_reg] : 0) + offset; pd->hi_addr[base_reg] = -1; } else if (base_reg == X_GP && pd->gp != (bfd_vma)-1)