2011-03-08 Yao Qi <yao@codesourcery.com>
* arm-tdep.c: Remove prototype declaration displaced_in_arm_mode. (displaced_read_reg): Add `dsc' parameter, remove `from' parameter. Use cached result instead of calling displaced_in_arm_mode again. (branch_write_pc, alu_write_pc, load_write_pc): Add `dsc' parameter. (displaced_write_reg, copy_preload, copy_preload_reg): Callers update. (cleanup_copro_load_store, copy_copro_load_store): Likewise. (cleanup_branch, copy_bx_blx_reg, copy_alu_imm): Likewise. (cleanup_alu_reg, copy_alu_reg, cleanup_alu_shifted_reg): Likewise. (copy_alu_shifted_reg, cleanup_load, cleanup_store): Likewise. (copy_extra_ld_st, copy_ldr_str_ldrb_strb): Likewise. (cleanup_block_load_all, cleanup_block_store_pc): Likewise. (cleanup_block_load_pc, copy_block_xfer): Likewise. * arm-linux-tdep.c (arm_linux_copy_svc): Callers update. (arm_catch_kernel_helper_return): Likewise. * gdb/arm-tdep.h : Update function declarations.
This commit is contained in:
Yao Qi
parent
72b9089ad6
commit
36073a929d
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@ -1,3 +1,21 @@
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2011-03-08 Yao Qi <yao@codesourcery.com>
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* arm-tdep.c: Remove prototype declaration displaced_in_arm_mode.
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(displaced_read_reg): Add `dsc' parameter, remove `from' parameter.
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Use cached result instead of calling displaced_in_arm_mode again.
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(branch_write_pc, alu_write_pc, load_write_pc): Add `dsc' parameter.
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(displaced_write_reg, copy_preload, copy_preload_reg): Callers update.
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(cleanup_copro_load_store, copy_copro_load_store): Likewise.
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(cleanup_branch, copy_bx_blx_reg, copy_alu_imm): Likewise.
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(cleanup_alu_reg, copy_alu_reg, cleanup_alu_shifted_reg): Likewise.
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(copy_alu_shifted_reg, cleanup_load, cleanup_store): Likewise.
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(copy_extra_ld_st, copy_ldr_str_ldrb_strb): Likewise.
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(cleanup_block_load_all, cleanup_block_store_pc): Likewise.
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(cleanup_block_load_pc, copy_block_xfer): Likewise.
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* arm-linux-tdep.c (arm_linux_copy_svc): Callers update.
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(arm_catch_kernel_helper_return): Likewise.
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* gdb/arm-tdep.h : Update function declarations.
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2011-03-06 Michael Snyder <msnyder@vmware.com>
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* dwarf2loc.c (indirect_pieced_value): Assert 'piece' not null.
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@ -801,11 +801,10 @@ static int
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arm_linux_copy_svc (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to,
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struct regcache *regs, struct displaced_step_closure *dsc)
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{
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CORE_ADDR from = dsc->insn_addr;
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CORE_ADDR return_to = 0;
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struct frame_info *frame;
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unsigned int svc_number = displaced_read_reg (regs, from, 7);
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unsigned int svc_number = displaced_read_reg (regs, dsc, 7);
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int is_sigreturn = 0;
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if (debug_displaced)
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@ -918,7 +917,7 @@ arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from,
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Insn: ldr pc, [r14, #4]
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Cleanup: r14 <- tmp[0], pc <- tmp[0]. */
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dsc->tmp[0] = displaced_read_reg (regs, from, ARM_LR_REGNUM);
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dsc->tmp[0] = displaced_read_reg (regs, dsc, ARM_LR_REGNUM);
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displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4,
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CANNOT_WRITE_PC);
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write_memory_unsigned_integer (to + 8, 4, byte_order, from);
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162
gdb/arm-tdep.c
162
gdb/arm-tdep.c
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@ -5111,16 +5111,16 @@ arm_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr)
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/* NOP instruction (mov r0, r0). */
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#define ARM_NOP 0xe1a00000
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static int displaced_in_arm_mode (struct regcache *regs);
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/* Helper for register reads for displaced stepping. In particular, this
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returns the PC as it would be seen by the instruction at its original
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location. */
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ULONGEST
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displaced_read_reg (struct regcache *regs, CORE_ADDR from, int regno)
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displaced_read_reg (struct regcache *regs, struct displaced_step_closure *dsc,
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int regno)
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{
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ULONGEST ret;
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CORE_ADDR from = dsc->insn_addr;
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if (regno == ARM_PC_REGNUM)
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{
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@ -5130,7 +5130,7 @@ displaced_read_reg (struct regcache *regs, CORE_ADDR from, int regno)
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- When executing a Thumb instruction, PC reads as the address of the
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current instruction plus 4. */
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if (displaced_in_arm_mode (regs))
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if (!dsc->is_thumb)
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from += 8;
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else
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from += 4;
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@ -5164,9 +5164,10 @@ displaced_in_arm_mode (struct regcache *regs)
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/* Write to the PC as from a branch instruction. */
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static void
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branch_write_pc (struct regcache *regs, ULONGEST val)
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branch_write_pc (struct regcache *regs, struct displaced_step_closure *dsc,
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ULONGEST val)
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{
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if (displaced_in_arm_mode (regs))
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if (!dsc->is_thumb)
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/* Note: If bits 0/1 are set, this branch would be unpredictable for
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architecture versions < 6. */
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regcache_cooked_write_unsigned (regs, ARM_PC_REGNUM,
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@ -5209,23 +5210,25 @@ bx_write_pc (struct regcache *regs, ULONGEST val)
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/* Write to the PC as if from a load instruction. */
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static void
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load_write_pc (struct regcache *regs, ULONGEST val)
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load_write_pc (struct regcache *regs, struct displaced_step_closure *dsc,
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ULONGEST val)
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{
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if (DISPLACED_STEPPING_ARCH_VERSION >= 5)
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bx_write_pc (regs, val);
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else
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branch_write_pc (regs, val);
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branch_write_pc (regs, dsc, val);
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}
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/* Write to the PC as if from an ALU instruction. */
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static void
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alu_write_pc (struct regcache *regs, ULONGEST val)
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alu_write_pc (struct regcache *regs, struct displaced_step_closure *dsc,
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ULONGEST val)
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{
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if (DISPLACED_STEPPING_ARCH_VERSION >= 7 && displaced_in_arm_mode (regs))
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if (DISPLACED_STEPPING_ARCH_VERSION >= 7 && !dsc->is_thumb)
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bx_write_pc (regs, val);
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else
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branch_write_pc (regs, val);
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branch_write_pc (regs, dsc, val);
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}
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/* Helper for writing to registers for displaced stepping. Writing to the PC
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@ -5244,7 +5247,7 @@ displaced_write_reg (struct regcache *regs, struct displaced_step_closure *dsc,
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switch (write_pc)
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{
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case BRANCH_WRITE_PC:
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branch_write_pc (regs, val);
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branch_write_pc (regs, dsc, val);
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break;
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case BX_WRITE_PC:
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@ -5252,11 +5255,11 @@ displaced_write_reg (struct regcache *regs, struct displaced_step_closure *dsc,
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break;
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case LOAD_WRITE_PC:
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load_write_pc (regs, val);
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load_write_pc (regs, dsc, val);
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break;
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case ALU_WRITE_PC:
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alu_write_pc (regs, val);
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alu_write_pc (regs, dsc, val);
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break;
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case CANNOT_WRITE_PC:
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@ -5346,7 +5349,6 @@ copy_preload (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
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{
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unsigned int rn = bits (insn, 16, 19);
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ULONGEST rn_val;
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CORE_ADDR from = dsc->insn_addr;
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if (!insn_references_pc (insn, 0x000f0000ul))
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return copy_unmodified (gdbarch, insn, "preload", dsc);
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@ -5361,8 +5363,8 @@ copy_preload (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
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->
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{pli/pld} [r0, #+/-imm]. */
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dsc->tmp[0] = displaced_read_reg (regs, from, 0);
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rn_val = displaced_read_reg (regs, from, rn);
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dsc->tmp[0] = displaced_read_reg (regs, dsc, 0);
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rn_val = displaced_read_reg (regs, dsc, rn);
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displaced_write_reg (regs, dsc, 0, rn_val, CANNOT_WRITE_PC);
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dsc->u.preload.immed = 1;
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@ -5384,7 +5386,6 @@ copy_preload_reg (struct gdbarch *gdbarch, uint32_t insn,
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unsigned int rn = bits (insn, 16, 19);
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unsigned int rm = bits (insn, 0, 3);
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ULONGEST rn_val, rm_val;
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CORE_ADDR from = dsc->insn_addr;
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if (!insn_references_pc (insn, 0x000f000ful))
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return copy_unmodified (gdbarch, insn, "preload reg", dsc);
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@ -5399,10 +5400,10 @@ copy_preload_reg (struct gdbarch *gdbarch, uint32_t insn,
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->
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{pli/pld} [r0, r1 {, shift}]. */
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dsc->tmp[0] = displaced_read_reg (regs, from, 0);
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dsc->tmp[1] = displaced_read_reg (regs, from, 1);
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rn_val = displaced_read_reg (regs, from, rn);
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rm_val = displaced_read_reg (regs, from, rm);
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dsc->tmp[0] = displaced_read_reg (regs, dsc, 0);
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dsc->tmp[1] = displaced_read_reg (regs, dsc, 1);
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rn_val = displaced_read_reg (regs, dsc, rn);
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rm_val = displaced_read_reg (regs, dsc, rm);
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displaced_write_reg (regs, dsc, 0, rn_val, CANNOT_WRITE_PC);
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displaced_write_reg (regs, dsc, 1, rm_val, CANNOT_WRITE_PC);
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@ -5422,7 +5423,7 @@ cleanup_copro_load_store (struct gdbarch *gdbarch,
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struct regcache *regs,
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struct displaced_step_closure *dsc)
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{
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ULONGEST rn_val = displaced_read_reg (regs, dsc->insn_addr, 0);
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ULONGEST rn_val = displaced_read_reg (regs, dsc, 0);
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displaced_write_reg (regs, dsc, 0, dsc->tmp[0], CANNOT_WRITE_PC);
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@ -5437,7 +5438,6 @@ copy_copro_load_store (struct gdbarch *gdbarch, uint32_t insn,
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{
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unsigned int rn = bits (insn, 16, 19);
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ULONGEST rn_val;
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CORE_ADDR from = dsc->insn_addr;
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if (!insn_references_pc (insn, 0x000f0000ul))
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return copy_unmodified (gdbarch, insn, "copro load/store", dsc);
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@ -5454,8 +5454,8 @@ copy_copro_load_store (struct gdbarch *gdbarch, uint32_t insn,
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ldc/ldc2 are handled identically. */
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dsc->tmp[0] = displaced_read_reg (regs, from, 0);
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rn_val = displaced_read_reg (regs, from, rn);
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dsc->tmp[0] = displaced_read_reg (regs, dsc, 0);
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rn_val = displaced_read_reg (regs, dsc, rn);
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displaced_write_reg (regs, dsc, 0, rn_val, CANNOT_WRITE_PC);
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dsc->u.ldst.writeback = bit (insn, 25);
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@ -5475,8 +5475,7 @@ static void
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cleanup_branch (struct gdbarch *gdbarch, struct regcache *regs,
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struct displaced_step_closure *dsc)
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{
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ULONGEST from = dsc->insn_addr;
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uint32_t status = displaced_read_reg (regs, from, ARM_PS_REGNUM);
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uint32_t status = displaced_read_reg (regs, dsc, ARM_PS_REGNUM);
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int branch_taken = condition_true (dsc->u.branch.cond, status);
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enum pc_write_style write_pc = dsc->u.branch.exchange
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? BX_WRITE_PC : BRANCH_WRITE_PC;
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@ -5486,7 +5485,7 @@ cleanup_branch (struct gdbarch *gdbarch, struct regcache *regs,
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if (dsc->u.branch.link)
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{
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ULONGEST pc = displaced_read_reg (regs, from, ARM_PC_REGNUM);
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ULONGEST pc = displaced_read_reg (regs, dsc, ARM_PC_REGNUM);
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displaced_write_reg (regs, dsc, ARM_LR_REGNUM, pc - 4, CANNOT_WRITE_PC);
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}
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@ -5551,7 +5550,6 @@ copy_bx_blx_reg (struct gdbarch *gdbarch, uint32_t insn,
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BLX: x12xxx3x. */
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int link = bit (insn, 5);
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unsigned int rm = bits (insn, 0, 3);
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CORE_ADDR from = dsc->insn_addr;
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if (debug_displaced)
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fprintf_unfiltered (gdb_stdlog, "displaced: copying %s register insn "
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@ -5566,7 +5564,7 @@ copy_bx_blx_reg (struct gdbarch *gdbarch, uint32_t insn,
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Don't set r14 in cleanup for BX. */
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dsc->u.branch.dest = displaced_read_reg (regs, from, rm);
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dsc->u.branch.dest = displaced_read_reg (regs, dsc, rm);
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dsc->u.branch.cond = cond;
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dsc->u.branch.link = link;
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@ -5585,7 +5583,7 @@ static void
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cleanup_alu_imm (struct gdbarch *gdbarch,
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struct regcache *regs, struct displaced_step_closure *dsc)
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{
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ULONGEST rd_val = displaced_read_reg (regs, dsc->insn_addr, 0);
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ULONGEST rd_val = displaced_read_reg (regs, dsc, 0);
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displaced_write_reg (regs, dsc, 0, dsc->tmp[0], CANNOT_WRITE_PC);
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displaced_write_reg (regs, dsc, 1, dsc->tmp[1], CANNOT_WRITE_PC);
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displaced_write_reg (regs, dsc, dsc->rd, rd_val, ALU_WRITE_PC);
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@ -5600,7 +5598,6 @@ copy_alu_imm (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
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unsigned int op = bits (insn, 21, 24);
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int is_mov = (op == 0xd);
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ULONGEST rd_val, rn_val;
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CORE_ADDR from = dsc->insn_addr;
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if (!insn_references_pc (insn, 0x000ff000ul))
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return copy_unmodified (gdbarch, insn, "ALU immediate", dsc);
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@ -5622,10 +5619,10 @@ copy_alu_imm (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
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Cleanup: rd <- r0; r0 <- tmp1; r1 <- tmp2
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*/
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dsc->tmp[0] = displaced_read_reg (regs, from, 0);
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dsc->tmp[1] = displaced_read_reg (regs, from, 1);
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rn_val = displaced_read_reg (regs, from, rn);
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rd_val = displaced_read_reg (regs, from, rd);
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dsc->tmp[0] = displaced_read_reg (regs, dsc, 0);
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dsc->tmp[1] = displaced_read_reg (regs, dsc, 1);
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rn_val = displaced_read_reg (regs, dsc, rn);
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rd_val = displaced_read_reg (regs, dsc, rd);
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displaced_write_reg (regs, dsc, 0, rd_val, CANNOT_WRITE_PC);
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displaced_write_reg (regs, dsc, 1, rn_val, CANNOT_WRITE_PC);
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dsc->rd = rd;
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@ -5649,7 +5646,7 @@ cleanup_alu_reg (struct gdbarch *gdbarch,
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ULONGEST rd_val;
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int i;
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rd_val = displaced_read_reg (regs, dsc->insn_addr, 0);
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rd_val = displaced_read_reg (regs, dsc, 0);
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for (i = 0; i < 3; i++)
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displaced_write_reg (regs, dsc, i, dsc->tmp[i], CANNOT_WRITE_PC);
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@ -5667,7 +5664,6 @@ copy_alu_reg (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
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unsigned int op = bits (insn, 21, 24);
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int is_mov = (op == 0xd);
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ULONGEST rd_val, rn_val, rm_val;
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CORE_ADDR from = dsc->insn_addr;
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if (!insn_references_pc (insn, 0x000ff00ful))
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return copy_unmodified (gdbarch, insn, "ALU reg", dsc);
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@ -5688,12 +5684,12 @@ copy_alu_reg (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
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Cleanup: rd <- r0; r0, r1, r2 <- tmp1, tmp2, tmp3
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*/
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dsc->tmp[0] = displaced_read_reg (regs, from, 0);
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dsc->tmp[1] = displaced_read_reg (regs, from, 1);
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dsc->tmp[2] = displaced_read_reg (regs, from, 2);
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rd_val = displaced_read_reg (regs, from, rd);
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rn_val = displaced_read_reg (regs, from, rn);
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rm_val = displaced_read_reg (regs, from, rm);
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dsc->tmp[0] = displaced_read_reg (regs, dsc, 0);
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dsc->tmp[1] = displaced_read_reg (regs, dsc, 1);
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dsc->tmp[2] = displaced_read_reg (regs, dsc, 2);
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rd_val = displaced_read_reg (regs, dsc, rd);
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rn_val = displaced_read_reg (regs, dsc, rn);
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rm_val = displaced_read_reg (regs, dsc, rm);
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displaced_write_reg (regs, dsc, 0, rd_val, CANNOT_WRITE_PC);
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displaced_write_reg (regs, dsc, 1, rn_val, CANNOT_WRITE_PC);
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displaced_write_reg (regs, dsc, 2, rm_val, CANNOT_WRITE_PC);
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@ -5716,7 +5712,7 @@ cleanup_alu_shifted_reg (struct gdbarch *gdbarch,
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struct regcache *regs,
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struct displaced_step_closure *dsc)
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{
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ULONGEST rd_val = displaced_read_reg (regs, dsc->insn_addr, 0);
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ULONGEST rd_val = displaced_read_reg (regs, dsc, 0);
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int i;
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for (i = 0; i < 4; i++)
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@ -5737,7 +5733,6 @@ copy_alu_shifted_reg (struct gdbarch *gdbarch, uint32_t insn,
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unsigned int op = bits (insn, 21, 24);
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int is_mov = (op == 0xd), i;
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ULONGEST rd_val, rn_val, rm_val, rs_val;
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CORE_ADDR from = dsc->insn_addr;
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if (!insn_references_pc (insn, 0x000fff0ful))
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return copy_unmodified (gdbarch, insn, "ALU shifted reg", dsc);
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|
|
@ -5762,12 +5757,12 @@ copy_alu_shifted_reg (struct gdbarch *gdbarch, uint32_t insn,
|
|||
*/
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
dsc->tmp[i] = displaced_read_reg (regs, from, i);
|
||||
dsc->tmp[i] = displaced_read_reg (regs, dsc, i);
|
||||
|
||||
rd_val = displaced_read_reg (regs, from, rd);
|
||||
rn_val = displaced_read_reg (regs, from, rn);
|
||||
rm_val = displaced_read_reg (regs, from, rm);
|
||||
rs_val = displaced_read_reg (regs, from, rs);
|
||||
rd_val = displaced_read_reg (regs, dsc, rd);
|
||||
rn_val = displaced_read_reg (regs, dsc, rn);
|
||||
rm_val = displaced_read_reg (regs, dsc, rm);
|
||||
rs_val = displaced_read_reg (regs, dsc, rs);
|
||||
displaced_write_reg (regs, dsc, 0, rd_val, CANNOT_WRITE_PC);
|
||||
displaced_write_reg (regs, dsc, 1, rn_val, CANNOT_WRITE_PC);
|
||||
displaced_write_reg (regs, dsc, 2, rm_val, CANNOT_WRITE_PC);
|
||||
|
|
@ -5791,12 +5786,11 @@ cleanup_load (struct gdbarch *gdbarch, struct regcache *regs,
|
|||
struct displaced_step_closure *dsc)
|
||||
{
|
||||
ULONGEST rt_val, rt_val2 = 0, rn_val;
|
||||
CORE_ADDR from = dsc->insn_addr;
|
||||
|
||||
rt_val = displaced_read_reg (regs, from, 0);
|
||||
rt_val = displaced_read_reg (regs, dsc, 0);
|
||||
if (dsc->u.ldst.xfersize == 8)
|
||||
rt_val2 = displaced_read_reg (regs, from, 1);
|
||||
rn_val = displaced_read_reg (regs, from, 2);
|
||||
rt_val2 = displaced_read_reg (regs, dsc, 1);
|
||||
rn_val = displaced_read_reg (regs, dsc, 2);
|
||||
|
||||
displaced_write_reg (regs, dsc, 0, dsc->tmp[0], CANNOT_WRITE_PC);
|
||||
if (dsc->u.ldst.xfersize > 4)
|
||||
|
|
@ -5820,8 +5814,7 @@ static void
|
|||
cleanup_store (struct gdbarch *gdbarch, struct regcache *regs,
|
||||
struct displaced_step_closure *dsc)
|
||||
{
|
||||
CORE_ADDR from = dsc->insn_addr;
|
||||
ULONGEST rn_val = displaced_read_reg (regs, from, 2);
|
||||
ULONGEST rn_val = displaced_read_reg (regs, dsc, 2);
|
||||
|
||||
displaced_write_reg (regs, dsc, 0, dsc->tmp[0], CANNOT_WRITE_PC);
|
||||
if (dsc->u.ldst.xfersize > 4)
|
||||
|
|
@ -5854,7 +5847,6 @@ copy_extra_ld_st (struct gdbarch *gdbarch, uint32_t insn, int unpriveleged,
|
|||
int immed = (op1 & 0x4) != 0;
|
||||
int opcode;
|
||||
ULONGEST rt_val, rt_val2 = 0, rn_val, rm_val = 0;
|
||||
CORE_ADDR from = dsc->insn_addr;
|
||||
|
||||
if (!insn_references_pc (insn, 0x000ff00ful))
|
||||
return copy_unmodified (gdbarch, insn, "extra load/store", dsc);
|
||||
|
|
@ -5870,18 +5862,18 @@ copy_extra_ld_st (struct gdbarch *gdbarch, uint32_t insn, int unpriveleged,
|
|||
internal_error (__FILE__, __LINE__,
|
||||
_("copy_extra_ld_st: instruction decode error"));
|
||||
|
||||
dsc->tmp[0] = displaced_read_reg (regs, from, 0);
|
||||
dsc->tmp[1] = displaced_read_reg (regs, from, 1);
|
||||
dsc->tmp[2] = displaced_read_reg (regs, from, 2);
|
||||
dsc->tmp[0] = displaced_read_reg (regs, dsc, 0);
|
||||
dsc->tmp[1] = displaced_read_reg (regs, dsc, 1);
|
||||
dsc->tmp[2] = displaced_read_reg (regs, dsc, 2);
|
||||
if (!immed)
|
||||
dsc->tmp[3] = displaced_read_reg (regs, from, 3);
|
||||
dsc->tmp[3] = displaced_read_reg (regs, dsc, 3);
|
||||
|
||||
rt_val = displaced_read_reg (regs, from, rt);
|
||||
rt_val = displaced_read_reg (regs, dsc, rt);
|
||||
if (bytesize[opcode] == 8)
|
||||
rt_val2 = displaced_read_reg (regs, from, rt + 1);
|
||||
rn_val = displaced_read_reg (regs, from, rn);
|
||||
rt_val2 = displaced_read_reg (regs, dsc, rt + 1);
|
||||
rn_val = displaced_read_reg (regs, dsc, rn);
|
||||
if (!immed)
|
||||
rm_val = displaced_read_reg (regs, from, rm);
|
||||
rm_val = displaced_read_reg (regs, dsc, rm);
|
||||
|
||||
displaced_write_reg (regs, dsc, 0, rt_val, CANNOT_WRITE_PC);
|
||||
if (bytesize[opcode] == 8)
|
||||
|
|
@ -5926,7 +5918,6 @@ copy_ldr_str_ldrb_strb (struct gdbarch *gdbarch, uint32_t insn,
|
|||
unsigned int rn = bits (insn, 16, 19);
|
||||
unsigned int rm = bits (insn, 0, 3); /* Only valid if !immed. */
|
||||
ULONGEST rt_val, rn_val, rm_val = 0;
|
||||
CORE_ADDR from = dsc->insn_addr;
|
||||
|
||||
if (!insn_references_pc (insn, 0x000ff00ful))
|
||||
return copy_unmodified (gdbarch, insn, "load/store", dsc);
|
||||
|
|
@ -5937,17 +5928,17 @@ copy_ldr_str_ldrb_strb (struct gdbarch *gdbarch, uint32_t insn,
|
|||
: (byte ? "strb" : "str"), usermode ? "t" : "",
|
||||
(unsigned long) insn);
|
||||
|
||||
dsc->tmp[0] = displaced_read_reg (regs, from, 0);
|
||||
dsc->tmp[2] = displaced_read_reg (regs, from, 2);
|
||||
dsc->tmp[0] = displaced_read_reg (regs, dsc, 0);
|
||||
dsc->tmp[2] = displaced_read_reg (regs, dsc, 2);
|
||||
if (!immed)
|
||||
dsc->tmp[3] = displaced_read_reg (regs, from, 3);
|
||||
dsc->tmp[3] = displaced_read_reg (regs, dsc, 3);
|
||||
if (!load)
|
||||
dsc->tmp[4] = displaced_read_reg (regs, from, 4);
|
||||
dsc->tmp[4] = displaced_read_reg (regs, dsc, 4);
|
||||
|
||||
rt_val = displaced_read_reg (regs, from, rt);
|
||||
rn_val = displaced_read_reg (regs, from, rn);
|
||||
rt_val = displaced_read_reg (regs, dsc, rt);
|
||||
rn_val = displaced_read_reg (regs, dsc, rn);
|
||||
if (!immed)
|
||||
rm_val = displaced_read_reg (regs, from, rm);
|
||||
rm_val = displaced_read_reg (regs, dsc, rm);
|
||||
|
||||
displaced_write_reg (regs, dsc, 0, rt_val, CANNOT_WRITE_PC);
|
||||
displaced_write_reg (regs, dsc, 2, rn_val, CANNOT_WRITE_PC);
|
||||
|
|
@ -6047,7 +6038,6 @@ static void
|
|||
cleanup_block_load_all (struct gdbarch *gdbarch, struct regcache *regs,
|
||||
struct displaced_step_closure *dsc)
|
||||
{
|
||||
ULONGEST from = dsc->insn_addr;
|
||||
int inc = dsc->u.block.increment;
|
||||
int bump_before = dsc->u.block.before ? (inc ? 4 : -4) : 0;
|
||||
int bump_after = dsc->u.block.before ? 0 : (inc ? 4 : -4);
|
||||
|
|
@ -6056,7 +6046,7 @@ cleanup_block_load_all (struct gdbarch *gdbarch, struct regcache *regs,
|
|||
CORE_ADDR xfer_addr = dsc->u.block.xfer_addr;
|
||||
int exception_return = dsc->u.block.load && dsc->u.block.user
|
||||
&& (regmask & 0x8000) != 0;
|
||||
uint32_t status = displaced_read_reg (regs, from, ARM_PS_REGNUM);
|
||||
uint32_t status = displaced_read_reg (regs, dsc, ARM_PS_REGNUM);
|
||||
int do_transfer = condition_true (dsc->u.block.cond, status);
|
||||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||||
|
||||
|
|
@ -6109,8 +6099,7 @@ static void
|
|||
cleanup_block_store_pc (struct gdbarch *gdbarch, struct regcache *regs,
|
||||
struct displaced_step_closure *dsc)
|
||||
{
|
||||
ULONGEST from = dsc->insn_addr;
|
||||
uint32_t status = displaced_read_reg (regs, from, ARM_PS_REGNUM);
|
||||
uint32_t status = displaced_read_reg (regs, dsc, ARM_PS_REGNUM);
|
||||
int store_executed = condition_true (dsc->u.block.cond, status);
|
||||
CORE_ADDR pc_stored_at, transferred_regs = bitcount (dsc->u.block.regmask);
|
||||
CORE_ADDR stm_insn_addr;
|
||||
|
|
@ -6161,8 +6150,7 @@ cleanup_block_load_pc (struct gdbarch *gdbarch,
|
|||
struct regcache *regs,
|
||||
struct displaced_step_closure *dsc)
|
||||
{
|
||||
ULONGEST from = dsc->insn_addr;
|
||||
uint32_t status = displaced_read_reg (regs, from, ARM_PS_REGNUM);
|
||||
uint32_t status = displaced_read_reg (regs, dsc, ARM_PS_REGNUM);
|
||||
int load_executed = condition_true (dsc->u.block.cond, status), i;
|
||||
unsigned int mask = dsc->u.block.regmask, write_reg = ARM_PC_REGNUM;
|
||||
unsigned int regs_loaded = bitcount (mask);
|
||||
|
|
@ -6185,7 +6173,7 @@ cleanup_block_load_pc (struct gdbarch *gdbarch,
|
|||
|
||||
if (read_reg != write_reg)
|
||||
{
|
||||
ULONGEST rval = displaced_read_reg (regs, from, read_reg);
|
||||
ULONGEST rval = displaced_read_reg (regs, dsc, read_reg);
|
||||
displaced_write_reg (regs, dsc, write_reg, rval, LOAD_WRITE_PC);
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog, _("displaced: LDM: move "
|
||||
|
|
@ -6247,7 +6235,6 @@ copy_block_xfer (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
|
|||
int before = bit (insn, 24);
|
||||
int writeback = bit (insn, 21);
|
||||
int rn = bits (insn, 16, 19);
|
||||
CORE_ADDR from = dsc->insn_addr;
|
||||
|
||||
/* Block transfers which don't mention PC can be run directly
|
||||
out-of-line. */
|
||||
|
|
@ -6265,7 +6252,7 @@ copy_block_xfer (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
|
|||
fprintf_unfiltered (gdb_stdlog, "displaced: copying block transfer insn "
|
||||
"%.8lx\n", (unsigned long) insn);
|
||||
|
||||
dsc->u.block.xfer_addr = displaced_read_reg (regs, from, rn);
|
||||
dsc->u.block.xfer_addr = displaced_read_reg (regs, dsc, rn);
|
||||
dsc->u.block.rn = rn;
|
||||
|
||||
dsc->u.block.load = load;
|
||||
|
|
@ -6301,7 +6288,7 @@ copy_block_xfer (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
|
|||
unsigned int to = 0, from = 0, i, new_rn;
|
||||
|
||||
for (i = 0; i < num_in_list; i++)
|
||||
dsc->tmp[i] = displaced_read_reg (regs, from, i);
|
||||
dsc->tmp[i] = displaced_read_reg (regs, dsc, i);
|
||||
|
||||
/* Writeback makes things complicated. We need to avoid clobbering
|
||||
the base register with one of the registers in our modified
|
||||
|
|
@ -6358,8 +6345,7 @@ static void
|
|||
cleanup_svc (struct gdbarch *gdbarch, struct regcache *regs,
|
||||
struct displaced_step_closure *dsc)
|
||||
{
|
||||
CORE_ADDR from = dsc->insn_addr;
|
||||
CORE_ADDR resume_addr = from + 4;
|
||||
CORE_ADDR resume_addr = dsc->insn_addr + 4;
|
||||
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog, "displaced: cleanup for svc, resume at "
|
||||
|
|
@ -6372,8 +6358,6 @@ static int
|
|||
copy_svc (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to,
|
||||
struct regcache *regs, struct displaced_step_closure *dsc)
|
||||
{
|
||||
CORE_ADDR from = dsc->insn_addr;
|
||||
|
||||
/* Allow OS-specific code to override SVC handling. */
|
||||
if (dsc->u.svc.copy_svc_os)
|
||||
return dsc->u.svc.copy_svc_os (gdbarch, insn, to, regs, dsc);
|
||||
|
|
|
|||
|
|
@ -302,7 +302,8 @@ extern void
|
|||
arm_displaced_init_closure (struct gdbarch *gdbarch, CORE_ADDR from,
|
||||
CORE_ADDR to, struct displaced_step_closure *dsc);
|
||||
extern ULONGEST
|
||||
displaced_read_reg (struct regcache *regs, CORE_ADDR from, int regno);
|
||||
displaced_read_reg (struct regcache *regs, struct displaced_step_closure *dsc,
|
||||
int regno);
|
||||
extern void
|
||||
displaced_write_reg (struct regcache *regs,
|
||||
struct displaced_step_closure *dsc, int regno,
|
||||
|
|
|
|||
Loading…
Reference in New Issue