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remove maxq-coff port

This commit is contained in:
Alan Modra 2010-06-29 04:17:34 +00:00
parent 68e47e3bb1
commit 360cfc9c8b
54 changed files with 178 additions and 5974 deletions
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16
bfd/ChangeLog
View File

@ -1,3 +1,19 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* cpu-maxq.c: Delete file.
* coff-maxq.c: Delete file.
* Makefile.am: Remove references to maxq.
* archures.c: Likewise.
* coffcode.h: Likewise.
* configure.in: Likewise.
* targets.c: Likewise.
* config.bfd: Move maxq from obsolete to removed.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
2010-06-28 Alan Modra <amodra@gmail.com>
* compress.c (bfd_uncompress_section_contents): Use ATTRIBUTE_UNUSED

4
bfd/Makefile.am
View File

@ -103,7 +103,6 @@ ALL_MACHINES = \
cpu-m68hc12.lo \
cpu-m68k.lo \
cpu-m88k.lo \
cpu-maxq.lo \
cpu-mcore.lo \
cpu-mep.lo \
cpu-microblaze.lo \
@ -176,7 +175,6 @@ ALL_MACHINES_CFILES = \
cpu-m68hc12.c \
cpu-m68k.c \
cpu-m88k.c \
cpu-maxq.c \
cpu-mcore.c \
cpu-mep.c \
cpu-microblaze.c \
@ -240,7 +238,6 @@ BFD32_BACKENDS = \
coff-i960.lo \
coff-m68k.lo \
coff-m88k.lo \
coff-maxq.lo \
coff-mips.lo \
coff-or32.lo \
coff-rs6000.lo \
@ -422,7 +419,6 @@ BFD32_BACKENDS_CFILES = \
coff-i960.c \
coff-m68k.c \
coff-m88k.c \
coff-maxq.c \
coff-mips.c \
coff-or32.c \
coff-rs6000.c \

6
bfd/Makefile.in
View File

@ -400,7 +400,6 @@ ALL_MACHINES = \
cpu-m68hc12.lo \
cpu-m68k.lo \
cpu-m88k.lo \
cpu-maxq.lo \
cpu-mcore.lo \
cpu-mep.lo \
cpu-microblaze.lo \
@ -473,7 +472,6 @@ ALL_MACHINES_CFILES = \
cpu-m68hc12.c \
cpu-m68k.c \
cpu-m88k.c \
cpu-maxq.c \
cpu-mcore.c \
cpu-mep.c \
cpu-microblaze.c \
@ -538,7 +536,6 @@ BFD32_BACKENDS = \
coff-i960.lo \
coff-m68k.lo \
coff-m88k.lo \
coff-maxq.lo \
coff-mips.lo \
coff-or32.lo \
coff-rs6000.lo \
@ -720,7 +717,6 @@ BFD32_BACKENDS_CFILES = \
coff-i960.c \
coff-m68k.c \
coff-m88k.c \
coff-maxq.c \
coff-mips.c \
coff-or32.c \
coff-rs6000.c \
@ -1208,7 +1204,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-i960.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-m68k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-m88k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-maxq.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-mips.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-or32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-rs6000.Plo@am__quote@
@ -1265,7 +1260,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68hc12.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m88k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-maxq.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mcore.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mep.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-microblaze.Plo@am__quote@

5
bfd/archures.c
View File

@ -417,9 +417,6 @@ DESCRIPTION
.#define bfd_mach_xc16xs 3
. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
.#define bfd_mach_xtensa 1
. bfd_arch_maxq, {* Dallas MAXQ 10/20 *}
.#define bfd_mach_maxq10 10
.#define bfd_mach_maxq20 20
. bfd_arch_z80,
.#define bfd_mach_z80strict 1 {* No undocumented opcodes. *}
.#define bfd_mach_z80 3 {* With ixl, ixh, iyl, and iyh. *}
@ -498,7 +495,6 @@ extern const bfd_arch_info_type bfd_m68hc11_arch;
extern const bfd_arch_info_type bfd_m68hc12_arch;
extern const bfd_arch_info_type bfd_m68k_arch;
extern const bfd_arch_info_type bfd_m88k_arch;
extern const bfd_arch_info_type bfd_maxq_arch;
extern const bfd_arch_info_type bfd_mcore_arch;
extern const bfd_arch_info_type bfd_mep_arch;
extern const bfd_arch_info_type bfd_mips_arch;
@ -576,7 +572,6 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_m68hc12_arch,
&bfd_m68k_arch,
&bfd_m88k_arch,
&bfd_maxq_arch,
&bfd_mcore_arch,
&bfd_mep_arch,
&bfd_microblaze_arch,

3
bfd/bfd-in2.h
View File

@ -2083,9 +2083,6 @@ enum bfd_architecture
#define bfd_mach_xc16xs 3
bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
#define bfd_mach_xtensa 1
bfd_arch_maxq, /* Dallas MAXQ 10/20 */
#define bfd_mach_maxq10 10
#define bfd_mach_maxq20 20
bfd_arch_z80,
#define bfd_mach_z80strict 1 /* No undocumented opcodes. */
#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */

447
bfd/coff-maxq.c
View File

@ -1,447 +0,0 @@
/* BFD back-end for MAXQ COFF binaries.
Copyright 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
Contributed by Vineet Sharma (vineets@noida.hcltech.com) Inderpreet S.
(inderpreetb@noida.hcltech.com)
HCL Technologies Ltd.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
#include "coff/maxq.h"
#include "coff/internal.h"
#include "libcoff.h"
#include "libiberty.h"
#ifndef MAXQ20
#define MAXQ20 1
#endif
#define RTYPE2HOWTO(cache_ptr, dst) \
((cache_ptr)->howto = \
((dst)->r_type < 48 \
? howto_table + (((dst)->r_type==47) ? 6: ((dst)->r_type)) \
: NULL))
#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (2)
/* Code to swap in the reloc offset. */
#define SWAP_IN_RELOC_OFFSET H_GET_16
#define SWAP_OUT_RELOC_OFFSET H_PUT_16
#define SHORT_JUMP BFD_RELOC_16_PCREL_S2
#define LONG_JUMP BFD_RELOC_14
#define ABSOLUTE_ADDR_FOR_DATA BFD_RELOC_24
/* checks the range of short jump -127 to 128 */
#define IS_SJUMP_RANGE(x) ((x > -128) && (x < 129))
#define HIGH_WORD_MASK 0xff00
#define LOW_WORD_MASK 0x00ff
static long
get_symbol_value (asymbol *symbol)
{
long relocation = 0;
if (bfd_is_com_section (symbol->section))
relocation = 0;
else
relocation = symbol->value +
symbol->section->output_section->vma + symbol->section->output_offset;
return relocation;
}
/* This function performs all the maxq relocations.
FIXME: The handling of the addend in the 'BFD_*'
relocations types. */
static bfd_reloc_status_type
coff_maxq20_reloc (bfd * abfd,
arelent * reloc_entry,
asymbol * symbol_in,
void * data,
asection * input_section ATTRIBUTE_UNUSED,
bfd * output_bfd ATTRIBUTE_UNUSED,
char ** error_message ATTRIBUTE_UNUSED)
{
unsigned char *addr = NULL;
unsigned long x = 0;
long call_addr = 0;
short addend = 0;
long diff = 0;
/* If this is an undefined symbol, return error. */
if (symbol_in->section == &bfd_und_section
&& (symbol_in->flags & BSF_WEAK) == 0)
return bfd_reloc_continue;
if (data && reloc_entry)
{
addr = (unsigned char *) data + reloc_entry->address;
call_addr = call_addr - call_addr;
call_addr = get_symbol_value (symbol_in);
/* Over here the value val stores the 8 bit/16 bit value. We will put a
check if we are moving a 16 bit immediate value into an 8 bit
register. In that case we will generate a Upper bytes into PFX[0]
and move the lower 8 bits as SRC. */
switch (reloc_entry->howto->type)
{
/* BFD_RELOC_16_PCREL_S2 47 Handles all the relative jumps and
calls Note: Every relative jump or call is in words. */
case SHORT_JUMP:
/* Handle any addend. */
addend = reloc_entry->addend;
if (addend > call_addr || addend > 0)
call_addr = symbol_in->section->output_section->vma + addend;
else if (addend < call_addr && addend > 0)
call_addr = call_addr + addend;
else if (addend < 0)
call_addr = call_addr + addend;
diff = ((call_addr << 1) - (reloc_entry->address << 1));
if (!IS_SJUMP_RANGE (diff))
{
bfd_perror (_("Can't Make it a Short Jump"));
return bfd_reloc_outofrange;
}
x = bfd_get_16 (abfd, addr);
x = x & LOW_WORD_MASK;
x = x | (diff << 8);
bfd_put_16 (abfd, (bfd_vma) x, addr);
return bfd_reloc_ok;
case ABSOLUTE_ADDR_FOR_DATA:
case LONG_JUMP:
/* BFD_RELOC_14 Handles intersegment or long jumps which might be
from code to code or code to data segment jumps. Note: When this
fucntion is called by gas the section flags somehow do not
contain the info about the section type(CODE or DATA). Thus the
user needs to evoke the linker after assembling the files
because the Code-Code relocs are word aligned but code-data are
byte aligned. */
addend = (reloc_entry->addend - reloc_entry->addend);
/* Handle any addend. */
addend = reloc_entry->addend;
/* For relocation involving multiple file added becomes zero thus
this fails - check for zero added. In another case when we try
to add a stub to a file the addend shows the offset from the
start od this file. */
addend = 0;
if (!bfd_is_com_section (symbol_in->section) &&
((symbol_in->flags & BSF_OLD_COMMON) == 0))
{
if (reloc_entry->addend > symbol_in->value)
addend = reloc_entry->addend - symbol_in->value;
if ((reloc_entry->addend < symbol_in->value)
&& (reloc_entry->addend != 0))
addend = reloc_entry->addend - symbol_in->value;
if (reloc_entry->addend == symbol_in->value)
addend = 0;
}
if (bfd_is_com_section (symbol_in->section) ||
((symbol_in->flags & BSF_OLD_COMMON) != 0))
addend = reloc_entry->addend;
if (addend < 0
&& (call_addr < (long) (addend * (-1))))
addend = 0;
call_addr += addend;
/* FIXME: This check does not work well with the assembler,
linker needs to be run always. */
if ((symbol_in->section->flags & SEC_CODE) == SEC_CODE)
{
/* Convert it into words. */
call_addr = call_addr >> 1;
if (call_addr > 0xFFFF) /* Intersegment Jump. */
{
bfd_perror (_("Exceeds Long Jump Range"));
return bfd_reloc_outofrange;
}
}
else
{
/* case ABSOLUTE_ADDR_FOR_DATA : Resolves any code-data
segemnt relocs. These are NOT word aligned. */
if (call_addr > 0xFFFF) /* Intersegment Jump. */
{
bfd_perror (_("Absolute address Exceeds 16 bit Range"));
return bfd_reloc_outofrange;
}
}
x = bfd_get_32 (abfd, addr);
x = (x & 0xFF00FF00);
x = (x | ((call_addr & HIGH_WORD_MASK) >> 8));
x = (x | (call_addr & LOW_WORD_MASK) << 16);
bfd_put_32 (abfd, (bfd_vma) x, addr);
return bfd_reloc_ok;
case BFD_RELOC_8:
addend = (reloc_entry->addend - reloc_entry->addend);
if (!bfd_is_com_section (symbol_in->section) &&
((symbol_in->flags & BSF_OLD_COMMON) == 0))
{
if (reloc_entry->addend > symbol_in->value)
addend = reloc_entry->addend - symbol_in->value;
if (reloc_entry->addend < symbol_in->value)
addend = reloc_entry->addend - symbol_in->value;
if (reloc_entry->addend == symbol_in->value)
addend = 0;
}
if (bfd_is_com_section (symbol_in->section) ||
((symbol_in->flags & BSF_OLD_COMMON) != 0))
addend = reloc_entry->addend;
if (addend < 0
&& (call_addr < (long) (addend * (-1))))
addend = 0;
if (call_addr + addend > 0xFF)
{
bfd_perror (_("Absolute address Exceeds 8 bit Range"));
return bfd_reloc_outofrange;
}
x = bfd_get_8 (abfd, addr);
x = x & 0x00;
x = x | (call_addr + addend);
bfd_put_8 (abfd, (bfd_vma) x, addr);
return bfd_reloc_ok;
case BFD_RELOC_16:
addend = (reloc_entry->addend - reloc_entry->addend);
if (!bfd_is_com_section (symbol_in->section) &&
((symbol_in->flags & BSF_OLD_COMMON) == 0))
{
if (reloc_entry->addend > symbol_in->value)
addend = reloc_entry->addend - symbol_in->value;
if (reloc_entry->addend < symbol_in->value)
addend = reloc_entry->addend - symbol_in->value;
if (reloc_entry->addend == symbol_in->value)
addend = 0;
}
if (bfd_is_com_section (symbol_in->section) ||
((symbol_in->flags & BSF_OLD_COMMON) != 0))
addend = reloc_entry->addend;
if (addend < 0
&& (call_addr < (long) (addend * (-1))))
addend = 0;
if ((call_addr + addend) > 0xFFFF)
{
bfd_perror (_("Absolute address Exceeds 16 bit Range"));
return bfd_reloc_outofrange;
}
else
{
unsigned short val = (call_addr + addend);
x = bfd_get_16 (abfd, addr);
/* LE */
x = (x & 0x0000); /* Flush garbage value. */
x = val;
if ((symbol_in->section->flags & SEC_CODE) == SEC_CODE)
x = x >> 1; /* Convert it into words. */
}
bfd_put_16 (abfd, (bfd_vma) x, addr);
return bfd_reloc_ok;
case BFD_RELOC_32:
addend = (reloc_entry->addend - reloc_entry->addend);
if (!bfd_is_com_section (symbol_in->section) &&
((symbol_in->flags & BSF_OLD_COMMON) == 0))
{
if (reloc_entry->addend > symbol_in->value)
addend = reloc_entry->addend - symbol_in->value;
if (reloc_entry->addend < symbol_in->value)
addend = reloc_entry->addend - symbol_in->value;
if (reloc_entry->addend == symbol_in->value)
addend = 0;
}
if (bfd_is_com_section (symbol_in->section) ||
((symbol_in->flags & BSF_OLD_COMMON) != 0))
addend = reloc_entry->addend;
if (addend < 0
&& (call_addr < (long) (addend * (-1))))
addend = 0;
if ((call_addr + addend) < 0)
{
bfd_perror ("Absolute address Exceeds 32 bit Range");
return bfd_reloc_outofrange;
}
x = bfd_get_32 (abfd, addr);
x = (x & 0x0000); /* Flush garbage value. */
x = call_addr + addend;
if ((symbol_in->section->flags & SEC_CODE) == SEC_CODE)
x = x >> 1; /* Convert it into words. */
bfd_put_32 (abfd, (bfd_vma) x, addr);
return bfd_reloc_ok;
default:
bfd_perror (_("Unrecognized Reloc Type"));
return bfd_reloc_notsupported;
}
}
return bfd_reloc_notsupported;
}
static reloc_howto_type howto_table[] =
{
EMPTY_HOWTO (0),
EMPTY_HOWTO (1),
{
BFD_RELOC_32, 0, 1, 8, FALSE, 0, complain_overflow_bitfield,
coff_maxq20_reloc, "32Bit", TRUE, 0x000000ff, 0x000000ff, TRUE
},
{
SHORT_JUMP, 0, 1, 8, FALSE, 0, complain_overflow_bitfield,
coff_maxq20_reloc, "SHORT_JMP", TRUE, 0x000000ff, 0x000000ff, TRUE
},
{
ABSOLUTE_ADDR_FOR_DATA, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
coff_maxq20_reloc, "INTERSEGMENT_RELOC", TRUE, 0x00000000, 0x00000000,
FALSE
},
{
BFD_RELOC_16, 0, 1, 8, FALSE, 0, complain_overflow_bitfield,
coff_maxq20_reloc, "16Bit", TRUE, 0x000000ff, 0x000000ff, TRUE
},
{
LONG_JUMP, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
coff_maxq20_reloc, "LONG_JUMP", TRUE, 0x00000000, 0x00000000, FALSE
},
{
BFD_RELOC_8, 0, 1, 8, FALSE, 0, complain_overflow_bitfield,
coff_maxq20_reloc, "8bit", TRUE, 0x000000ff, 0x000000ff, TRUE
},
EMPTY_HOWTO (8),
EMPTY_HOWTO (9),
EMPTY_HOWTO (10),
};
static reloc_howto_type *
maxq_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
{
switch (code)
{
/* SHORT JUMP */
case BFD_RELOC_16_PCREL_S2:
return howto_table + 3;
/* INTERSEGMENT JUMP */
case BFD_RELOC_24:
return howto_table + 4;
/* BYTE RELOC */
case BFD_RELOC_8:
return howto_table + 7;
/* WORD RELOC */
case BFD_RELOC_16:
return howto_table + 5;
/* LONG RELOC */
case BFD_RELOC_32:
return howto_table + 2;
/* LONG JUMP */
case BFD_RELOC_14:
return howto_table + 6;
default:
return NULL;
}
}
static reloc_howto_type *
maxq_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name)
{
unsigned int i;
for (i = 0; i < sizeof (howto_table) / sizeof (howto_table[0]); i++)
if (howto_table[i].name != NULL
&& strcasecmp (howto_table[i].name, r_name) == 0)
return &howto_table[i];
return NULL;
}
#define coff_bfd_reloc_type_lookup maxq_reloc_type_lookup
#define coff_bfd_reloc_name_lookup maxq_reloc_name_lookup
/* Perform any necessary magic to the addend in a reloc entry. */
#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
cache_ptr->addend = ext_reloc.r_offset;
#ifndef bfd_pe_print_pdata
#define bfd_pe_print_pdata NULL
#endif
#include "coffcode.h"
#ifndef TARGET_UNDERSCORE
#define TARGET_UNDERSCORE 1
#endif
#ifndef EXTRA_S_FLAGS
#define EXTRA_S_FLAGS 0
#endif
/* Forward declaration for use initialising alternative_target field. */
CREATE_LITTLE_COFF_TARGET_VEC (maxqcoff_vec, "coff-maxq", 0, EXTRA_S_FLAGS,
TARGET_UNDERSCORE, NULL, COFF_SWAP_TABLE);

32
bfd/coffcode.h
View File

@ -2094,22 +2094,6 @@ coff_set_arch_mach_hook (bfd *abfd, void * filehdr)
machine = bfd_mach_m68020;
break;
#endif
#ifdef MAXQ20MAGIC
case MAXQ20MAGIC:
arch = bfd_arch_maxq;
switch (internal_f->f_flags & F_MACHMASK)
{
case F_MAXQ10:
machine = bfd_mach_maxq10;
break;
case F_MAXQ20:
machine = bfd_mach_maxq20;
break;
default:
return FALSE;
}
break;
#endif
#ifdef MC88MAGIC
case MC88MAGIC:
case MC88DMAGIC:
@ -3018,17 +3002,6 @@ coff_set_flags (bfd * abfd,
return TRUE;
#endif
#ifdef MAXQ20MAGIC
case bfd_arch_maxq:
* magicp = MAXQ20MAGIC;
switch (bfd_get_mach (abfd))
{
case bfd_mach_maxq10: * flagsp = F_MAXQ10; return TRUE;
case bfd_mach_maxq20: * flagsp = F_MAXQ20; return TRUE;
default: return FALSE;
}
#endif
default: /* Unknown architecture. */
/* Fall through to "return FALSE" below, to avoid
"statement never reached" errors on the one below. */
@ -4111,11 +4084,6 @@ coff_write_object_contents (bfd * abfd)
internal_a.magic = NMAGIC; /* Assume separate i/d. */
#endif
#ifdef MAXQ20MAGIC
#define __A_MAGIC_SET__
internal_a.magic = MAXQ20MAGIC;
#endif
#ifndef __A_MAGIC_SET__
#include "Your aouthdr magic number is not being set!"
#else

7
bfd/config.bfd
View File

@ -31,7 +31,6 @@ targ_underscore=no
# Catch obsolete configurations.
case $targ in
maxq-*-coff | \
null)
if test "x$enable_obsolete" != xyes; then
echo "*** Configuration $targ is obsolete." >&2
@ -47,6 +46,7 @@ case $targ in
m68*-apollo-* | \
m68*-bull-sysv* | \
m68*-*-rtemscoff* | \
maxq-*-coff | \
i960-*-rtems* | \
or32-*-rtems* | \
m68*-*-lynxos* | \
@ -90,7 +90,6 @@ m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch" ;;
m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch" ;;
m68*) targ_archs=bfd_m68k_arch ;;
m88*) targ_archs=bfd_m88k_arch ;;
maxq*) targ_archs=bfd_maxq_arch ;;
microblaze*) targ_archs=bfd_microblaze_arch ;;
mips*) targ_archs=bfd_mips_arch ;;
or32*) targ_archs=bfd_or32_arch ;;
@ -880,10 +879,6 @@ case "${targ}" in
targ_underscore=yes
;;
maxq-*-coff)
targ_defvec=maxqcoff_vec
;;
mcore-*-elf)
targ_defvec=bfd_elf32_mcore_big_vec
targ_selvecs="bfd_elf32_mcore_big_vec bfd_elf32_mcore_little_vec"

19
bfd/configure vendored
View File

@ -2138,8 +2138,10 @@ $as_echo "$ac_res" >&6; }
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
$as_echo_n "checking whether $2 is declared... " >&6; }
as_decl_name=`echo $2|sed 's/ *(.*//'`
as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
@ -2149,8 +2151,12 @@ $4
int
main ()
{
#ifndef $2
(void) $2;
#ifndef $as_decl_name
#ifdef __cplusplus
(void) $as_decl_use;
#else
(void) $as_decl_name;
#endif
#endif
;
@ -11406,7 +11412,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11409 "configure"
#line 11415 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -11512,7 +11518,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11515 "configure"
#line 11521 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -15239,7 +15245,6 @@ do
m88kbcs_vec) tb="$tb coff-m88k.lo" ;;
m88kmach3_vec) tb="$tb m88kmach3.lo aout32.lo" ;;
m88kopenbsd_vec) tb="$tb m88kopenbsd.lo aout32.lo" ;;
maxqcoff_vec) tb="$tb coff-maxq.lo" ;;
mach_o_be_vec) tb="$tb mach-o.lo" ;;
mach_o_le_vec) tb="$tb mach-o.lo" ;;
mach_o_fat_vec) tb="$tb mach-o.lo" ;;

1
bfd/configure.in
View File

@ -876,7 +876,6 @@ do
m88kbcs_vec) tb="$tb coff-m88k.lo" ;;
m88kmach3_vec) tb="$tb m88kmach3.lo aout32.lo" ;;
m88kopenbsd_vec) tb="$tb m88kopenbsd.lo aout32.lo" ;;
maxqcoff_vec) tb="$tb coff-maxq.lo" ;;
mach_o_be_vec) tb="$tb mach-o.lo" ;;
mach_o_le_vec) tb="$tb mach-o.lo" ;;
mach_o_fat_vec) tb="$tb mach-o.lo" ;;

60
bfd/cpu-maxq.c
View File

@ -1,60 +0,0 @@
/* BFD support for the MAXQ20/10 architecture.
Copyright 2004, 2005, 2007 Free Software Foundation, Inc.
Written by Vineet Sharma(vineets@noida.hcltech.com)
Inderpreet Singh(inderpreetb@noida.hcltech.com)
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
/* MAXQ Archtecture info. */
static const bfd_arch_info_type bfd_maxq10_arch =
{
16, /* 16 bits in a word. */
16, /* 16 bits in an address. */
8, /* 16 bits in a byte. */
bfd_arch_maxq, /* Architecture number. */
bfd_mach_maxq10, /* Machine number. */
"maxq", /* Architecture name. */
"maxq10", /* Machine name. */
0, /* Section align power. */
FALSE, /* Not the default machine. */
bfd_default_compatible,
bfd_default_scan,
NULL
};
const bfd_arch_info_type bfd_maxq_arch =
{
16, /* 16 bits in a word. */
16, /* 16 bits in an address. */
8, /* 16 bits in a byte. */
bfd_arch_maxq, /* Architecture number. */
bfd_mach_maxq20, /* Machine number. */
"maxq", /* Architecture name. */
"maxq20", /* Machine name. */
0, /* Section align power. */
TRUE, /* This is the default machine. */
bfd_default_compatible,
bfd_default_scan,
& bfd_maxq10_arch
};

12
bfd/libbfd.h
View File

@ -2243,12 +2243,12 @@ bfd_boolean bfd_generic_merge_sections
(bfd *, struct bfd_link_info *);
bfd_byte *bfd_generic_get_relocated_section_contents
(bfd *,
struct bfd_link_info *,
struct bfd_link_order *,
bfd_byte *,
bfd_boolean,
asymbol **);
(bfd *abfd,
struct bfd_link_info *link_info,
struct bfd_link_order *link_order,
bfd_byte *data,
bfd_boolean relocatable,
asymbol **symbols);
/* Extracted from archures.c. */
extern const bfd_arch_info_type bfd_default_arch_struct;

13
bfd/po/SRC-POTFILES.in
View File

@ -37,7 +37,6 @@ coff-i860.c
coff-i960.c
coff-m68k.c
coff-m88k.c
coff-maxq.c
coff-mips.c
coff-or32.c
coff-rs6000.c
@ -96,7 +95,6 @@ cpu-m68hc11.c
cpu-m68hc12.c
cpu-m68k.c
cpu-m88k.c
cpu-maxq.c
cpu-mcore.c
cpu-mep.c
cpu-microblaze.c
@ -113,6 +111,7 @@ cpu-pj.c
cpu-plugin.c
cpu-powerpc.c
cpu-rs6000.c
cpu-rx.c
cpu-s390.c
cpu-score.c
cpu-sh.c
@ -121,6 +120,7 @@ cpu-spu.c
cpu-tic30.c
cpu-tic4x.c
cpu-tic54x.c
cpu-tic6x.c
cpu-tic80.c
cpu-v850.c
cpu-vax.c
@ -190,6 +190,7 @@ elf32-openrisc.c
elf32-or32.c
elf32-pj.c
elf32-ppc.c
elf32-rx.c
elf32-s390.c
elf32-score.c
elf32-score7.c
@ -199,6 +200,7 @@ elf32-sh64-com.c
elf32-sh64.c
elf32-sparc.c
elf32-spu.c
elf32-tic6x.c
elf32-v850.c
elf32-vax.c
elf32-xc16x.c
@ -266,6 +268,7 @@ m68knetbsd.c
m88kmach3.c
m88kopenbsd.c
mach-o-i386.c
mach-o-x86-64.c
mach-o.c
mach-o.h
merge.c
@ -338,11 +341,9 @@ vaxnetbsd.c
verilog.c
versados.c
version.h
vms-gsd.c
vms-hdr.c
vms-alpha.c
vms-lib.c
vms-misc.c
vms-tir.c
vms.c
vms.h
xcoff-target.h
xcofflink.c

2
bfd/targets.c
View File

@ -769,7 +769,6 @@ extern const bfd_target mach_o_le_vec;
extern const bfd_target mach_o_fat_vec;
extern const bfd_target mach_o_i386_vec;
extern const bfd_target mach_o_x86_64_vec;
extern const bfd_target maxqcoff_vec;
extern const bfd_target mcore_pe_big_vec;
extern const bfd_target mcore_pe_little_vec;
extern const bfd_target mcore_pei_big_vec;
@ -1152,7 +1151,6 @@ static const bfd_target * const _bfd_target_vector[] =
#ifdef BFD64
&mach_o_x86_64_vec,
#endif
&maxqcoff_vec,
&mcore_pe_big_vec,
&mcore_pe_little_vec,
&mcore_pei_big_vec,

5
binutils/ChangeLog
View File

@ -1,3 +1,8 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2010-06-27 Alan Modra <amodra@gmail.com>
* resbin.c (res_to_bin_accelerator): Delete set but unused variables.

18
binutils/configure vendored
View File

@ -1882,8 +1882,10 @@ $as_echo "$ac_res" >&6; }
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
$as_echo_n "checking whether $2 is declared... " >&6; }
as_decl_name=`echo $2|sed 's/ *(.*//'`
as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
@ -1893,8 +1895,12 @@ $4
int
main ()
{
#ifndef $2
(void) $2;
#ifndef $as_decl_name
#ifdef __cplusplus
(void) $as_decl_use;
#else
(void) $as_decl_name;
#endif
#endif
;
@ -11200,7 +11206,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11203 "configure"
#line 11209 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -11306,7 +11312,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11309 "configure"
#line 11315 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H

1
binutils/po/POTFILES.in
View File

@ -20,6 +20,7 @@ dlltool.h
dllwrap.c
dwarf.c
dwarf.h
elfedit.c
emul_aix.c
emul_vanilla.c
filemode.c

11
gas/ChangeLog
View File

@ -1,3 +1,14 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* config/tc-maxq.h: Delete file.
* config/tc-maxq.c: Delete file.
* Makefile.am: Remove references to maxq.
* configure.tgt: Likewise.
* config/obj-coff.h: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2010-06-28 Alan Modra <amodra@gmail.com>
* config/obj-evax.h (S_SET_OTHER, S_SET_TYPE, S_SET_DESC): Don't define.

2
gas/Makefile.am
View File

@ -132,7 +132,6 @@ TARGET_CPU_CFILES = \
config/tc-m32r.c \
config/tc-m68hc11.c \
config/tc-m68k.c \
config/tc-maxq.c \
config/tc-mcore.c \
config/tc-mep.c \
config/tc-microblaze.c \
@ -197,7 +196,6 @@ TARGET_CPU_HFILES = \
config/tc-m32r.h \
config/tc-m68hc11.h \
config/tc-m68k.h \
config/tc-maxq.h \
config/tc-mcore.h \
config/tc-mep.h \
config/tc-microblaze.h \

17
gas/Makefile.in
View File

@ -399,7 +399,6 @@ TARGET_CPU_CFILES = \
config/tc-m32r.c \
config/tc-m68hc11.c \
config/tc-m68k.c \
config/tc-maxq.c \
config/tc-mcore.c \
config/tc-mep.c \
config/tc-microblaze.c \
@ -464,7 +463,6 @@ TARGET_CPU_HFILES = \
config/tc-m32r.h \
config/tc-m68hc11.h \
config/tc-m68k.h \
config/tc-maxq.h \
config/tc-mcore.h \
config/tc-mep.h \
config/tc-microblaze.h \
@ -845,7 +843,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-m32r.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-m68hc11.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-m68k.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-maxq.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-mcore.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-mep.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-microblaze.Po@am__quote@
@ -1283,20 +1280,6 @@ tc-m68k.obj: config/tc-m68k.c
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-m68k.obj `if test -f 'config/tc-m68k.c'; then $(CYGPATH_W) 'config/tc-m68k.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-m68k.c'; fi`
tc-maxq.o: config/tc-maxq.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-maxq.o -MD -MP -MF $(DEPDIR)/tc-maxq.Tpo -c -o tc-maxq.o `test -f 'config/tc-maxq.c' || echo '$(srcdir)/'`config/tc-maxq.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-maxq.Tpo $(DEPDIR)/tc-maxq.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-maxq.c' object='tc-maxq.o' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-maxq.o `test -f 'config/tc-maxq.c' || echo '$(srcdir)/'`config/tc-maxq.c
tc-maxq.obj: config/tc-maxq.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-maxq.obj -MD -MP -MF $(DEPDIR)/tc-maxq.Tpo -c -o tc-maxq.obj `if test -f 'config/tc-maxq.c'; then $(CYGPATH_W) 'config/tc-maxq.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-maxq.c'; fi`
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-maxq.Tpo $(DEPDIR)/tc-maxq.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-maxq.c' object='tc-maxq.obj' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-maxq.obj `if test -f 'config/tc-maxq.c'; then $(CYGPATH_W) 'config/tc-maxq.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-maxq.c'; fi`
tc-mcore.o: config/tc-mcore.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-mcore.o -MD -MP -MF $(DEPDIR)/tc-mcore.Tpo -c -o tc-mcore.o `test -f 'config/tc-mcore.c' || echo '$(srcdir)/'`config/tc-mcore.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-mcore.Tpo $(DEPDIR)/tc-mcore.Po

5
gas/config/obj-coff.h
View File

@ -107,11 +107,6 @@
#define TARGET_FORMAT "coff-h8500"
#endif
#ifdef TC_MAXQ20
#include "coff/maxq.h"
#define TARGET_FORMAT "coff-maxq"
#endif
#ifdef TC_SH
#ifdef TE_PE

3077
gas/config/tc-maxq.c
View File

File diff suppressed because it is too large Load Diff

148
gas/config/tc-maxq.h
View File

@ -1,148 +0,0 @@
/* tc-maxq.h -- Header file for the assembler(MAXQ)
Copyright 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
Contributed by HCL Technologies Pvt. Ltd.
Written by Vineet Sharma(vineets@noida.hcltech.com) Inderpreet
S.(inderpreetb@noida.hcltech.com)
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify it under the
terms of the GNU General Public License as published by the Free Software
Foundation; either version 3, or (at your option) any later version.
GAS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
details.
You should have received a copy of the GNU General Public License along
with GAS; see the file COPYING. If not, write to the Free Software
Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#ifndef _TC_MAXQ_H_
#define _TC_MAXQ_H_
#ifndef NO_RELOC
#define NO_RELOC 0
#endif
/* `md_short_jump_size' `md_long_jump_size' `md_create_short_jump'
`md_create_long_jump' If `WORKING_DOT_WORD' is defined, GAS will not do
broken word processing (*note Broken words::.). Otherwise, you should set
`md_short_jump_size' to the size of a short jump (a jump that is just long
enough to jump around a long jmp) and `md_long_jump_size' to the size of a
long jump (a jump that can go anywhere in the function), You should define
`md_create_short_jump' to create a short jump around a long jump, and
define `md_create_long_jump' to create a long jump. */
#define WORKING_DOT_WORD
typedef enum _RELOC_ENUM
{
MAXQ_WORDDATA = 5, /* Word+n. */
MAXQ_LONGDATA = 2, /* Long+n. */
MAXQ_INTERSEGMENT = 4, /* Text to any other segment. */
MAXQ_SHORTJUMP = BFD_RELOC_16_PCREL_S2, /* PC Relative. */
MAXQ_LONGJUMP = 6, /* Absolute Jump. */
EXTERNAL_RELOC = 8,
INTERSEGMENT_RELOC
}
RELOC_ENUM;
#ifndef MAX_STACK
#define MAX_STACK 0xf
#endif
#ifndef TC_MAXQ20
#define TC_MAXQ20 1
#endif
#ifndef MAX_OPERAND_SIZE
#define MAX_OPERAND_SIZE 255
#endif
#ifndef MAXQ_INSTRUCTION_SIZE
#define MAXQ_INSTRUCTION_SIZE 2 /* 16 - BITS */
#endif
#if MAXQ_INSTRUCTION_SIZE
#define MAXQ_OCTETS_PER_BYTE MAXQ_INSTRUCTION_SIZE
#else
#define MAXQ_OCTETS_PER_BYTE OCTETS_PER_BYTE
#endif
/* if this macro is defined gas will use this instead of comment_chars. */
#define tc_comments_chars maxq20_comment_chars
#define tc_coff_symbol_emit_hook(a) ; /* not used */
#define md_section_align(SEGMENT, SIZE) (SIZE)
/* Locally defined symbol shoudnot be adjusted to section symbol. */
#define tc_fix_adjustable(FIX) 0
/* This specifies that the target has been defined as little endian -
default. */
#define TARGET_BYTES_BIG_ENDIAN 0
#define MAX_MEM_NAME_SIZE 12
#define MAX_REG_NAME_SIZE 7
#define MAX_MNEM_SIZE 8
#define END_OF_INSN '\0'
/* This macro is the BFD archetectureto pass to 'bfd_set_arch_mach'. */
#define TARGET_ARCH bfd_arch_maxq
/* This macro is the BFD machine number to pass to 'bfd_set_arch_mach'.
If not defines GAS will use 0. */
#define TARGET_MACH maxq20_mach ()
extern unsigned long maxq20_mach (void);
#ifndef LEX_AT
/* We define this macro to generate a fixup for a data allocation pseudo-op. */
#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) maxq20_cons_fix_new (FRAG,OFF,LEN,EXP)
extern void maxq20_cons_fix_new (fragS *, unsigned int, unsigned int, expressionS *);
#endif
/* Define md_number_to_chars as the appropriate standard big endian or This
should just call either `number_to_chars_bigendian' or
`number_to_chars_littleendian', whichever is appropriate. On targets like
the MIPS which support options to change the endianness, which function to
call is a runtime decision. On other targets, `md_number_to_chars' can be
a simple macro. */
#define md_number_to_chars maxq_number_to_chars
extern void maxq_number_to_chars (char *, valueT, int);
/* If this macro is defined, it is a pointer to a NULL terminated list of
characters which may appear in an operand. GAS already assumes that all
alphanumeric characters, and '$', '.', and '_' may appear in an
operand("symbol_char"in app.c). This macro may be defined to treat
additional characters as appearing in an operand. This affects the way in
which GAS removes whitespaces before passing the string to md_assemble. */
#define tc_symbol_chars_extra_symbol_chars
/* Define away the call to md_operand in the expression parsing code. This is
called whenever the expression parser can't parse the input and gives the
assembler backend a chance to deal with it instead. */
#define md_operand(x)
#define MAX_OPERANDS 2 /* Max operands per instruction. */
#define MAX_IMMEDIATE_OPERANDS 1 /* Max immediate operands per instruction. */
#define MAX_MEMORY_OPERANDS 1 /* Max memory operands per instruction. */
/* Define the prefix we are using while trying to use an immediate value in
an instruction. e.g move A[0], #03h. */
#define IMMEDIATE_PREFIX '#'
#define ABSOLUTE_PREFIX '@'
/* This here defines the opcode of the nop operation on the MAXQ. We did
declare it here when we tried to fill the align bites with nop's but GAS
only expects nop's to be single byte instruction. */
#define NOP_OPCODE (char)0xDA3A
#define SIZE_OF_PM sizeof(pmodule) /* Size of the structure. */
#endif /* TC_MAXQ_H */

18
gas/configure vendored
View File

@ -1869,8 +1869,10 @@ $as_echo "$ac_res" >&6; }
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
$as_echo_n "checking whether $2 is declared... " >&6; }
as_decl_name=`echo $2|sed 's/ *(.*//'`
as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
@ -1880,8 +1882,12 @@ $4
int
main ()
{
#ifndef $2
(void) $2;
#ifndef $as_decl_name
#ifdef __cplusplus
(void) $as_decl_use;
#else
(void) $as_decl_name;
#endif
#endif
;
@ -11187,7 +11193,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11190 "configure"
#line 11196 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -11293,7 +11299,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11296 "configure"
#line 11302 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H

3
gas/configure.tgt
View File

@ -53,7 +53,6 @@ case ${cpu} in
m680[012346]0) cpu_type=m68k ;;
m6811|m6812|m68hc12) cpu_type=m68hc11 ;;
m683??) cpu_type=m68k ;;
maxq) cpu_type=maxq ;;
mep) cpu_type=mep endian=little ;;
microblaze*) cpu_type=microblaze ;;
mips*el) cpu_type=mips endian=little ;;
@ -271,8 +270,6 @@ case ${generic_target} in
m68k-*-openbsd*) fmt=aout em=nbsd bfd_gas=yes ;;
m68k-*-psos*) fmt=elf em=psos;;
maxq-*-coff) fmt=coff bfd_gas=yes ;;
mep-*-elf) fmt=elf ;;
mcore-*-elf) fmt=elf ;;

6
gas/po/POTFILES.in
View File

@ -89,8 +89,6 @@ config/tc-m68hc11.c
config/tc-m68hc11.h
config/tc-m68k.c
config/tc-m68k.h
config/tc-maxq.c
config/tc-maxq.h
config/tc-mcore.c
config/tc-mcore.h
config/tc-mep.c
@ -122,6 +120,8 @@ config/tc-pj.c
config/tc-pj.h
config/tc-ppc.c
config/tc-ppc.h
config/tc-rx.c
config/tc-rx.h
config/tc-s390.c
config/tc-s390.h
config/tc-score.c
@ -140,6 +140,8 @@ config/tc-tic4x.c
config/tc-tic4x.h
config/tc-tic54x.c
config/tc-tic54x.h
config/tc-tic6x.c
config/tc-tic6x.h
config/tc-v850.c
config/tc-v850.h
config/tc-vax.c

22
gas/testsuite/ChangeLog
View File

@ -1,3 +1,25 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* gas/maxq10/maxq10.exp: Delete file.
* gas/maxq10/bits.d, * gas/maxq10/bits.s, * gas/maxq10/call.d,
* gas/maxq10/call.s, * gas/maxq10/data.s, * gas/maxq10/data2.d,
* gas/maxq10/data2.s, * gas/maxq10/data3.d, * gas/maxq10/data3.s,
* gas/maxq10/err.s, * gas/maxq10/jump.d, * gas/maxq10/jump.s,
* gas/maxq10/logical.d, * gas/maxq10/logical.s, * gas/maxq10/math.d,
* gas/maxq10/math.s, * gas/maxq10/pmtest.d, * gas/maxq10/pmtest.s,
* gas/maxq10/range.d, * gas/maxq10/range.s: Likewise.
* gas/maxq20/maxq20.exp: Delete file.
* gas/maxq20/bits.d, * gas/maxq20/bits.s, * gas/maxq20/call.d,
* gas/maxq20/call.s, * gas/maxq20/data1.d, * gas/maxq20/data1.s,
* gas/maxq20/data2.d, * gas/maxq20/data2.s, * gas/maxq20/data3.d,
* gas/maxq20/data3.s, * gas/maxq20/jump.d, * gas/maxq20/jump.s,
* gas/maxq20/jzimm.d, * gas/maxq20/jzimm.s, * gas/maxq20/logical.d,
* gas/maxq20/logical.s, * gas/maxq20/math.d, * gas/maxq20/math.s,
* gas/maxq20/pfx2.s, * gas/maxq20/pmtest.d, * gas/maxq20/pmtest.s,
* gas/maxq20/pxf0.s, * gas/maxq20/range.d,
* gas/maxq20/range.s: Likewise.
* gas/all/gas.exp: Remove references to maxq.
2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/neon-ldst-align-bad.l: Update for Neon alignment syntax fix.

4
gas/testsuite/gas/all/gas.exp
View File

@ -111,12 +111,12 @@ case $target_triplet in {
# This is usually revealed by the error message:
# symbol `sym' required but not present
setup_xfail "*arm*-*-*aout*" "*arm*-*-*coff" \
"*arm*-*-pe" "m68hc*-*-*" "maxq-*-*" \
"*arm*-*-pe" "m68hc*-*-*" \
"rx-*-*" "vax*-*-*" "z8k-*-*"
run_dump_test redef2
setup_xfail "*-*-aix*" "*-*-coff" "*-*-cygwin" "*-*-mingw*" "*-*-pe*" \
"bfin-*-*" "hppa*-*-hpux*" \
"m68hc*-*-*" "maxq-*-*" "or32-*-*" \
"m68hc*-*-*" "or32-*-*" \
"rx-*-*" "vax*-*-*" "z8k-*-*"
run_dump_test redef3
gas_test_error "redef4.s" "" ".set for symbol already used as label"

38
gas/testsuite/gas/maxq10/maxq10.exp
View File

@ -1,38 +0,0 @@
#
# MAXQ10 tests
#
proc gas_64_check { } {
global NM
global NMFLAGS
set status [gas_host_run "$NM $NMFLAGS --help" ""]
return [regexp "targets:.*maxq" [lindex $status 1]]
}
proc gas_32_check { } {
global NM
global NMFLAGS
global srcdir
set status [gas_host_run "$NM $NMFLAGS --help" ""]
return [regexp "targets:.*maxq" [lindex $status 1]]
}
if [expr ([istarget "maxq-*-*"] || [istarget "maxq-coff-*"]) && [gas_32_check]] then {
global ASFLAGS
set old_ASFLAGS "$ASFLAGS"
set ASFLAGS "$ASFLAGS -MAXQ10"
run_dump_test "range"
run_dump_test "data3"
run_dump_test "data2"
run_dump_test "call"
run_dump_test "jump"
run_dump_test "logical"
run_dump_test "math"
run_dump_test "bits"
set ASFLAGS "$old_ASFLAGS"
}

42
gas/testsuite/gas/maxq20/maxq20.exp
View File

@ -1,42 +0,0 @@
#
# MAXQ20 tests
#
proc gas_64_check { } {
global NM
global NMFLAGS
global srcdir
set status [gas_host_run "$NM $NMFLAGS --help" ""]
return [regexp "targets:.*maxq" [lindex $status 1]]
}
proc gas_32_check { } {
global NM
global NMFLAGS
global srcdir
set status [gas_host_run "$NM $NMFLAGS --help" ""]
return [regexp "targets:.*maxq" [lindex $status 1]]
}
if [expr ([istarget "maxq-*-*"] || [istarget "maxq-coff-*-*"]) && [gas_32_check]] then {
global ASFLAGS
set old_ASFLAGS "$ASFLAGS"
set ASFLAGS "$ASFLAGS"
run_dump_test "range"
run_dump_test "data3"
run_dump_test "data2"
run_dump_test "call"
run_dump_test "jump"
run_dump_test "logical"
run_dump_test "math"
run_dump_test "bits"
run_dump_test "data1"
run_dump_test "jzimm"
set ASFLAGS "$old_ASFLAGS"
}

4
include/ChangeLog
View File

@ -1,3 +1,7 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* dis-asm.h: Remove references to maxq.
2010-06-21 Rafael Espindola <espindola@google.com>
* plugin-api.h (ld_plugin_set_extra_library_path): New.

4
include/coff/ChangeLog
View File

@ -1,3 +1,7 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* maxq.h: Delete file.
2010-04-15 Nick Clifton <nickc@redhat.com>
* alpha.h: Update copyright notice to use GPLv3.

56
include/coff/maxq.h
View File

@ -1,56 +0,0 @@
/* COFF spec for MAXQ
Copyright 2004, 2005, 2010 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
Contributed by Vineet Sharma(vineets@noida.hcltech.com) Inderpreet
S.(inderpreetb@noida.hcltech.com) HCL Technologies Ltd. */
#define L_LNNO_SIZE 2
#include "coff/external.h"
/* Bits for f_flags: F_RELFLG relocation info stripped from file F_EXEC file
is executable (no unresolved external references) F_LNNO line numbers
stripped from file F_LSYMS local symbols stripped from file. */
#define F_RELFLG (0x0001)
#define F_EXEC (0x0002)
#define F_LNNO (0x0004)
#define F_LSYMS (0x0008)
/* Variant Specific Flags for MAXQ10 and MAXQ20. */
#define F_MAXQ10 (0x0030)
#define F_MAXQ20 (0x0040)
#define F_MACHMASK (0x00F0)
/* Magic numbers for maxq. */
#define MAXQ20MAGIC 0xa0
#define MAXQ20BADMAG(x) (((x).f_magic != MAXQ20MAGIC))
#define BADMAG(x) MAXQ20BADMAG (x)
/* Relocation information declaration and related definitions. */
struct external_reloc
{
char r_vaddr[4]; /* (Virtual) address of reference. */
char r_symndx[4]; /* Index into symbol table. */
char r_type[2]; /* Relocation type. */
char r_offset[2]; /* Addend. */
};
#define RELOC struct external_reloc
#define RELSZ (10 + 2) /* sizeof (RELOC) */

2
include/dis-asm.h
View File

@ -261,8 +261,6 @@ extern int print_insn_m68hc11 (bfd_vma, disassemble_info *);
extern int print_insn_m68hc12 (bfd_vma, disassemble_info *);
extern int print_insn_m68k (bfd_vma, disassemble_info *);
extern int print_insn_m88k (bfd_vma, disassemble_info *);
extern int print_insn_maxq_big (bfd_vma, disassemble_info *);
extern int print_insn_maxq_little (bfd_vma, disassemble_info *);
extern int print_insn_mcore (bfd_vma, disassemble_info *);
extern int print_insn_mep (bfd_vma, disassemble_info *);
extern int print_insn_microblaze (bfd_vma, disassemble_info *);

4
include/opcode/ChangeLog
View File

@ -1,3 +1,7 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* maxq.h: Delete file.
2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
* ppc.h (PPC_OPCODE_E500): Define.

1132
include/opcode/maxq.h
View File

File diff suppressed because it is too large Load Diff

10
ld/ChangeLog
View File

@ -1,3 +1,13 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* emulparams/maxqcoff.sh: Delete file.
* scripttempl/maxqcoff.sc: Delete file.
* Makefile.am: Remove references to maxq.
* configure.tgt: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2010-06-27 Alan Modra <amodra@gmail.com>
* pe-dll.c (fill_edata): Avoid set but unused warning.

4
ld/Makefile.am
View File

@ -290,7 +290,6 @@ ALL_EMULATIONS = \
em68knbsd.@OBJEXT@ \
em68kpsos.@OBJEXT@ \
em88kbcs.@OBJEXT@ \
emaxqcoff.@OBJEXT@ \
emcorepe.@OBJEXT@ \
emipsbig.@OBJEXT@ \
emipsbsd.@OBJEXT@ \
@ -1381,9 +1380,6 @@ em68kpsos.c: $(srcdir)/emulparams/m68kpsos.sh \
em88kbcs.c: $(srcdir)/emulparams/m88kbcs.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/m88kbcs.sc ${GEN_DEPENDS}
${GENSCRIPTS} m88kbcs "$(tdir_m88kbcs)"
emaxqcoff.c: $(srcdir)/emulparams/maxqcoff.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/maxqcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} maxqcoff "$(tdir_maxqcoff)"
emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
$(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
${GENSCRIPTS} mcorepe "$(tdir_mcorepe)"

4
ld/Makefile.in
View File

@ -580,7 +580,6 @@ ALL_EMULATIONS = \
em68knbsd.@OBJEXT@ \
em68kpsos.@OBJEXT@ \
em88kbcs.@OBJEXT@ \
emaxqcoff.@OBJEXT@ \
emcorepe.@OBJEXT@ \
emipsbig.@OBJEXT@ \
emipsbsd.@OBJEXT@ \
@ -2407,9 +2406,6 @@ em68kpsos.c: $(srcdir)/emulparams/m68kpsos.sh \
em88kbcs.c: $(srcdir)/emulparams/m88kbcs.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/m88kbcs.sc ${GEN_DEPENDS}
${GENSCRIPTS} m88kbcs "$(tdir_m88kbcs)"
emaxqcoff.c: $(srcdir)/emulparams/maxqcoff.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/maxqcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} maxqcoff "$(tdir_maxqcoff)"
emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
$(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
${GENSCRIPTS} mcorepe "$(tdir_mcorepe)"

18
ld/configure vendored
View File

@ -1884,8 +1884,10 @@ $as_echo "$ac_res" >&6; }
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
$as_echo_n "checking whether $2 is declared... " >&6; }
as_decl_name=`echo $2|sed 's/ *(.*//'`
as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
@ -1895,8 +1897,12 @@ $4
int
main ()
{
#ifndef $2
(void) $2;
#ifndef $as_decl_name
#ifdef __cplusplus
(void) $as_decl_use;
#else
(void) $as_decl_name;
#endif
#endif
;
@ -11614,7 +11620,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11617 "configure"
#line 11623 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -11720,7 +11726,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11723 "configure"
#line 11729 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H

2
ld/configure.tgt
View File

@ -355,8 +355,6 @@ m68*-*-rtems*) targ_emul=m68kelf
;;
m8*-*-*) targ_emul=m88kbcs
;;
maxq-*-coff) targ_emul=maxqcoff
;;
mcore-*-pe) targ_emul=mcorepe ;
targ_extra_ofiles="deffilep.o pe-dll.o" ;;
mcore-*-elf) targ_emul=elf32mcore

7
ld/emulparams/maxqcoff.sh
View File

@ -1,7 +0,0 @@
OUTPUT_FORMAT="coff-maxq"
SCRIPT_NAME=maxqcoff
ARCH=MAXQ
TEXT_START_ADDR=0x8000

1
ld/po/POTFILES.in
View File

@ -14,6 +14,7 @@ ldfile.c
ldfile.h
ldlang.c
ldlang.h
ldlex-wrapper.c
ldlex.h
ldmain.c
ldmain.h

43
ld/scripttempl/maxqcoff.sc
View File

@ -1,43 +0,0 @@
test -z "$ENTRY" && ENTRY=_main
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
${LIB_SEARCH_DIRS}
${RELOCATING+ENTRY (${ENTRY})}
MEMORY
{
rom (rx) : ORIGIN = 0, LENGTH = 0x7FFE
ram (!rx) : org = 0x0A000, l = 0x5FFF
}
SECTIONS
{
.text ${RELOCATING+ 0x0000}:
{
*(.text)
} >rom
.data ${RELOCATING}:
{
*(.data)
*(.rodata)
*(.bss)
*(COMMON)
${RELOCATING+ edata = .};
}>ram
/* .bss ${RELOCATING+ SIZEOF(.data) + 0x0000} :
{
*(.bss)
*(COMMON)
}
*/
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
}
EOF

7
ld/testsuite/ChangeLog
View File

@ -1,3 +1,10 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* ld-maxq/maxq.exp: Delete file.
* ld-maxq/addend.dd, * ld-maxq/addend.s, * ld-maxq/paddr.dd,
* ld-maxq/paddr.s, * ld-maxq/paddr1.dd, * ld-maxq/paddr1.s,
* ld-maxq/r32-1.s, * ld-maxq/r32-2.s, * ld-maxq/r32.dd: Likewise.
2010-06-15 Joseph Myers <joseph@codesourcery.com>
* ld-elf/orphan3.d: Allow section names starting '_'.

55
ld/testsuite/ld-maxq/maxq.exp
View File

@ -1,55 +0,0 @@
# Expect script for ld-maxq tests
# Copyright (C) 2004, 2005, 2007 Free Software Foundation
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
#
# Written by inderpreetb@noida.hcltech.com
# Test maxq linking; all types of relocs. This tests the assembler and
# tools like objdump as well as the linker.
if { !([istarget "maxq*-*-*"] ) } {
return
}
# List contains test-items with 3 items followed by 2 lists:
# 0:name 1:ld options 2:assembler options
# 3:filenames of assembler files 4: action and options. 5: name of output file
# Actions:
# objdump: Apply objdump options on result. Compare with regex (last arg).
# nm: Apply nm options on result. Compare with regex (last arg).
# readelf: Apply readelf options on result. Compare with regex (last arg).
set maxqtests {
{"32-bit Relocation check" "" ""
{r32-1.s r32-2.s} {{objdump -drw r32.dd}}
"r32.o" }
{"maxq addend check" "" ""
{addend.s} {{objdump -dw addend.dd}}
"addendo.o" }
{"16bit relocation test" "" ""
{paddr.s} {{objdump -Dw paddr.dd}}
"paddro.o" }
{"16bit relocation test-1" "" ""
{paddr1.s} {{objdump -Dw paddr1.dd}}
"paddro1.o" }
}
run_ld_link_tests $maxqtests

10
opcodes/ChangeLog
View File

@ -1,3 +1,13 @@
2010-06-29 Alan Modra <amodra@gmail.com>
* maxq-dis.c: Delete file.
* Makefile.am: Remove references to maxq.
* configure.in: Likewise.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2010-06-29 Alan Modra <amodra@gmail.com>
* mep-dis.c: Regenerate.

1
opcodes/Makefile.am
View File

@ -152,7 +152,6 @@ TARGET_LIBOPCODES_CFILES = \
m68k-dis.c \
m68k-opc.c \
m88k-dis.c \
maxq-dis.c \
mcore-dis.c \
mep-asm.c \
mep-desc.c \

2
opcodes/Makefile.in
View File

@ -422,7 +422,6 @@ TARGET_LIBOPCODES_CFILES = \
m68k-dis.c \
m68k-opc.c \
m88k-dis.c \
maxq-dis.c \
mcore-dis.c \
mep-asm.c \
mep-desc.c \
@ -793,7 +792,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68k-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68k-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m88k-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/maxq-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mcore-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-asm.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-desc.Plo@am__quote@

19
opcodes/configure vendored
View File

@ -1862,8 +1862,10 @@ $as_echo "$ac_res" >&6; }
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
$as_echo_n "checking whether $2 is declared... " >&6; }
as_decl_name=`echo $2|sed 's/ *(.*//'`
as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
@ -1873,8 +1875,12 @@ $4
int
main ()
{
#ifndef $2
(void) $2;
#ifndef $as_decl_name
#ifdef __cplusplus
(void) $as_decl_use;
#else
(void) $as_decl_name;
#endif
#endif
;
@ -11136,7 +11142,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11139 "configure"
#line 11145 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -11242,7 +11248,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 11245 "configure"
#line 11251 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -12439,7 +12445,6 @@ if test x${all_targets} = xfalse ; then
bfd_m68hc12_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
bfd_m68k_arch) ta="$ta m68k-dis.lo m68k-opc.lo" ;;
bfd_m88k_arch) ta="$ta m88k-dis.lo" ;;
bfd_maxq_arch) ta="$ta maxq-dis.lo" ;;
bfd_mcore_arch) ta="$ta mcore-dis.lo" ;;
bfd_mep_arch) ta="$ta mep-asm.lo mep-desc.lo mep-dis.lo mep-ibld.lo mep-opc.lo" using_cgen=yes ;;
bfd_microblaze_arch) ta="$ta microblaze-dis.lo" ;;

1
opcodes/configure.in
View File

@ -251,7 +251,6 @@ if test x${all_targets} = xfalse ; then
bfd_m68hc12_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
bfd_m68k_arch) ta="$ta m68k-dis.lo m68k-opc.lo" ;;
bfd_m88k_arch) ta="$ta m88k-dis.lo" ;;
bfd_maxq_arch) ta="$ta maxq-dis.lo" ;;
bfd_mcore_arch) ta="$ta mcore-dis.lo" ;;
bfd_mep_arch) ta="$ta mep-asm.lo mep-desc.lo mep-dis.lo mep-ibld.lo mep-opc.lo" using_cgen=yes ;;
bfd_microblaze_arch) ta="$ta microblaze-dis.lo" ;;

6
opcodes/disassemble.c
View File

@ -53,7 +53,6 @@
#define ARCH_m68hc12
#define ARCH_m68k
#define ARCH_m88k
#define ARCH_maxq
#define ARCH_mcore
#define ARCH_mep
#define ARCH_microblaze
@ -257,11 +256,6 @@ disassembler (abfd)
disassemble = print_insn_m88k;
break;
#endif
#ifdef ARCH_maxq
case bfd_arch_maxq:
disassemble = print_insn_maxq_little;
break;
#endif
#ifdef ARCH_mt
case bfd_arch_mt:
disassemble = print_insn_mt;

710
opcodes/maxq-dis.c
View File

@ -1,710 +0,0 @@
/* Instruction printing code for the MAXQ
Copyright 2004, 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
Written by Vineet Sharma(vineets@noida.hcltech.com) Inderpreet
S.(inderpreetb@noida.hcltech.com)
This file is part of the GNU opcodes library.
This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/maxq.h"
struct _group_info
{
unsigned char group_no;
unsigned char sub_opcode;
unsigned char src;
unsigned char dst;
unsigned char fbit;
unsigned char bit_no;
unsigned char flag;
};
typedef struct _group_info group_info;
#define SRC 0x01
#define DST 0x02
#define FORMAT 0x04
#define BIT_NO 0x08
#define SUB_OP 0x10
#define MASK_LOW_BYTE 0x0f
#define MASK_HIGH_BYTE 0xf0
/* Flags for retrieving the bits from the op-code. */
#define _DECODE_LOWNIB_LOWBYTE 0x000f
#define _DECODE_HIGHNIB_LOWBYTE 0x00f0
#define _DECODE_LOWNIB_HIGHBYTE 0x0f00
#define _DECODE_HIGHNIB_HIGHBYTE 0xf000
#define _DECODE_HIGHBYTE 0xff00
#define _DECODE_LOWBYTE 0x00ff
#define _DECODE_4TO6_HIGHBYTE 0x7000
#define _DECODE_4TO6_LOWBYTE 0x0070
#define _DECODE_0TO6_HIGHBYTE 0x7f00
#define _DECODE_0TO2_HIGHBYTE 0x0700
#define _DECODE_GET_F_HIGHBYTE 0x8000
#define _DECODE_BIT7_HIGHBYTE 0x8000
#define _DECODE_BIT7_LOWBYTE 0x0080
#define _DECODE_GET_CARRY 0x10000
#define _DECODE_BIT0_LOWBYTE 0x1
#define _DECODE_BIT6AND7_HIGHBYTE 0xc000
/* Module and Register Indexed of System Registers. */
#define _CURR_ACC_MODINDEX 0xa
#define _CURR_ACC_REGINDEX 0x0
#define _PSF_REG_MODINDEX 0x8
#define _PSF_REG_REGINDEX 0x4
#define _PFX_REG_MODINDEX 0xb
#define _PFX0_REG_REGINDEX 0x0
#define _PFX2_REG_REGINDEX 0x2
#define _DP_REG_MODINDEX 0xf
#define _DP0_REG_REGINDEX 0x3
#define _DP1_REG_REGINDEX 0x7
#define _IP_REG_MODINDEX 0xc
#define _IP_REG_REGINDEX 0x0
#define _IIR_REG_MODINDEX 0x8
#define _IIR_REG_REGINDEX 0xb
#define _SP_REG_MODINDEX 0xd
#define _SP_REG_REGINDEX 0x1
#define _IC_REG_MODINDEX 0x8
#define _IC_REG_REGINDEX 0x5
#define _LC_REG_MODINDEX 0xe
#define _LC0_REG_REGINDEX 0x0
#define _LC1_REG_REGINDEX 0x1
#define _LC2_REG_REGINDEX 0x2
#define _LC3_REG_REGINDEX 0x3
/* Flags for finding the bits in PSF Register. */
#define SIM_ALU_DECODE_CARRY_BIT_POS 0x2
#define SIM_ALU_DECODE_SIGN_BIT_POS 0x40
#define SIM_ALU_DECODE_ZERO_BIT_POS 0x80
#define SIM_ALU_DECODE_EQUAL_BIT_POS 0x1
#define SIM_ALU_DECODE_IGE_BIT_POS 0x1
/* Number Of Op-code Groups. */
unsigned char const SIM_ALU_DECODE_OPCODE_GROUPS = 11;
/* Op-code Groups. */
unsigned char const SIM_ALU_DECODE_LOGICAL_XCHG_OP_GROUP = 1;
/* Group1: AND/OR/XOR/ADD/SUB Operations: fxxx 1010 ssss ssss. */
unsigned char const SIM_ALU_DECODE_AND_OR_ADD_SUB_OP_GROUP = 2;
/* Group2: Logical Operations: 1000 1010 xxxx 1010. */
unsigned char const SIM_ALU_DECODE_BIT_OP_GROUP = 3;
/* XCHG/Bit Operations: 1xxx 1010 xxxx 1010. */
unsigned char const SIM_ALU_DECODE_SET_DEST_BIT_GROUP = 4;
/* Move value in bit of destination register: 1ddd dddd xbbb 0111. */
unsigned char const SIM_ALU_DECODE_JUMP_OP_GROUP = 5;
#define JUMP_CHECK(insn) \
( ((insn & _DECODE_4TO6_HIGHBYTE) == 0x0000) \
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x2000) \
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x6000) \
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x1000) \
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x5000) \
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x3000) \
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x7000) \
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x4000) )
/* JUMP operations: fxxx 1100 ssss ssss */
unsigned char const SIM_ALU_DECODE_RET_OP_GROUP = 6;
/* RET Operations: 1xxx 1100 0000 1101 */
unsigned char const SIM_ALU_DECODE_MOVE_SRC_DST_GROUP = 7;
/* Move src into dest register: fddd dddd ssss ssss */
unsigned char const SIM_ALU_DECODE_SET_SRC_BIT_GROUP = 8;
/* Move value in bit of source register: fbbb 0111 ssss ssss */
unsigned char const SIM_ALU_DECODE_DJNZ_CALL_PUSH_OP_GROUP = 9;
/* PUSH, DJNZ and CALL operations: fxxx 1101 ssss ssss */
unsigned char const SIM_ALU_DECODE_POP_OP_GROUP = 10;
/* POP operation: 1ddd dddd 0000 1101 */
unsigned char const SIM_ALU_DECODE_CMP_SRC_OP_GROUP = 11;
/* GLOBAL */
char unres_reg_name[20];
static char *
get_reg_name (unsigned char reg_code, type1 arg_pos)
{
unsigned char module;
unsigned char r_index;
int ix = 0;
reg_entry const *reg_x;
mem_access_syntax const *syntax;
mem_access *mem_acc;
module = 0;
r_index = 0;
module = (reg_code & MASK_LOW_BYTE);
r_index = (reg_code & MASK_HIGH_BYTE);
r_index = r_index >> 4;
/* Search the system register table. */
for (reg_x = &system_reg_table[0]; reg_x->reg_name != NULL; ++reg_x)
if ((reg_x->Mod_name == module) && (reg_x->Mod_index == r_index))
return reg_x->reg_name;
/* Serch pheripheral table. */
for (ix = 0; ix < num_of_reg; ix++)
{
reg_x = &new_reg_table[ix];
if ((reg_x->Mod_name == module) && (reg_x->Mod_index == r_index))
return reg_x->reg_name;
}
for (mem_acc = &mem_table[0]; mem_acc->name != NULL || !mem_acc; ++mem_acc)
{
if (reg_code == mem_acc->opcode)
{
for (syntax = mem_access_syntax_table;
syntax != NULL && syntax->name;
++syntax)
if (!strcmp (mem_acc->name, syntax->name))
{
if ((arg_pos == syntax->type) || (syntax->type == BOTH))
return mem_acc->name;
break;
}
}
}
memset (unres_reg_name, 0, 20);
sprintf (unres_reg_name, "%01x%01xh", r_index, module);
return unres_reg_name;
}
static bfd_boolean
check_move (unsigned char insn0, unsigned char insn8)
{
bfd_boolean first = FALSE;
bfd_boolean second = FALSE;
reg_entry const *reg_x;
const unsigned char module1 = insn0 & MASK_LOW_BYTE;
const unsigned char index1 = ((insn0 & 0x70) >> 4);
const unsigned char module2 = insn8 & MASK_LOW_BYTE;
const unsigned char index2 = ((insn8 & MASK_HIGH_BYTE) >> 4);
/* DST */
if (((insn0 & MASK_LOW_BYTE) == MASK_LOW_BYTE)
&& ((index1 == 0) || (index1 == 1) || (index1 == 2) || (index1 == 5)
|| (index1 == 4) || (index1 == 6)))
first = TRUE;
else if (((insn0 & MASK_LOW_BYTE) == 0x0D) && (index1 == 0))
first = TRUE;
else if ((module1 == 0x0E)
&& ((index1 == 0) || (index1 == 1) || (index1 == 2)))
first = TRUE;
else
{
for (reg_x = &system_reg_table[0]; reg_x->reg_name != NULL && reg_x;
++reg_x)
{
if ((reg_x->Mod_name == module1) && (reg_x->Mod_index == index1)
&& ((reg_x->rtype == Reg_16W) || (reg_x->rtype == Reg_8W)))
{
/* IP not allowed. */
if ((reg_x->Mod_name == 0x0C) && (reg_x->Mod_index == 0x00))
continue;
/* A[AP] not allowed. */
if ((reg_x->Mod_name == 0x0A) && (reg_x->Mod_index == 0x01))
continue;
first = TRUE;
break;
}
}
}
if (!first)
/* No need to check further. */
return FALSE;
if (insn0 & 0x80)
{
/* SRC */
if (((insn8 & MASK_LOW_BYTE) == MASK_LOW_BYTE)
&& ((index2 == 0) || (index2 == 1) || (index2 == 2) || (index2 == 4)
|| (index2 == 5) || (index2 == 6)))
second = TRUE;
else if (((insn8 & MASK_LOW_BYTE) == 0x0D) && (index2 == 0))
second = TRUE;
else if ((module2 == 0x0E)
&& ((index2 == 0) || (index2 == 1) || (index2 == 2)))
second = TRUE;
else
{
for (reg_x = &system_reg_table[0];
reg_x->reg_name != NULL && reg_x;
++reg_x)
{
if ((reg_x->Mod_name == (insn8 & MASK_LOW_BYTE))
&& (reg_x->Mod_index == (((insn8 & 0xf0) >> 4))))
{
second = TRUE;
break;
}
}
}
if (second)
{
if ((module1 == 0x0A && index1 == 0x0)
&& (module2 == 0x0A && index2 == 0x01))
return FALSE;
return TRUE;
}
return FALSE;
}
return first;
}
static void
maxq_print_arg (MAX_ARG_TYPE arg,
struct disassemble_info * info,
group_info grp)
{
switch (arg)
{
case FLAG_C:
info->fprintf_func (info->stream, "C");
break;
case FLAG_NC:
info->fprintf_func (info->stream, "NC");
break;
case FLAG_Z:
info->fprintf_func (info->stream, "Z");
break;
case FLAG_NZ:
info->fprintf_func (info->stream, "NZ");
break;
case FLAG_S:
info->fprintf_func (info->stream, "S");
break;
case FLAG_E:
info->fprintf_func (info->stream, "E");
break;
case FLAG_NE:
info->fprintf_func (info->stream, "NE");
break;
case ACC_BIT:
info->fprintf_func (info->stream, "Acc");
if ((grp.flag & BIT_NO) == BIT_NO)
info->fprintf_func (info->stream, ".%d", grp.bit_no);
break;
case A_BIT_0:
info->fprintf_func (info->stream, "#0");
break;
case A_BIT_1:
info->fprintf_func (info->stream, "#1");
break;
default:
break;
}
}
static unsigned char
get_group (const unsigned int insn)
{
if (check_move ((insn >> 8), (insn & _DECODE_LOWBYTE)))
return 8;
if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0A00)
{
/* && condition with sec part added on 26 May for resolving 2 & 3 grp
conflict. */
if (((insn & _DECODE_LOWNIB_LOWBYTE) == 0x000A)
&& ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
{
if ((insn & _DECODE_HIGHNIB_HIGHBYTE) == 0x8000)
return 2;
else
return 3;
}
return 1;
}
else if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0C00)
{
if (((insn & _DECODE_LOWBYTE) == 0x000D) && JUMP_CHECK (insn)
&& ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
return 6;
else if ((insn & _DECODE_LOWBYTE) == 0x008D)
return 7;
return 5;
}
else if (((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0D00)
&& (((insn & _DECODE_4TO6_HIGHBYTE) == 0x3000)
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x4000)
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x5000)
|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x0000)))
return 10;
else if ((insn & _DECODE_LOWBYTE) == 0x000D)
return 11;
else if ((insn & _DECODE_LOWBYTE) == 0x008D)
return 12;
else if ((insn & _DECODE_0TO6_HIGHBYTE) == 0x7800)
return 13;
else if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0700)
return 9;
else if (((insn & _DECODE_LOWNIB_LOWBYTE) == 0x0007)
&& ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
return 4;
return 8;
}
static void
get_insn_opcode (const unsigned int insn, group_info *i)
{
static unsigned char pfx_flag = 0;
static unsigned char count_for_pfx = 0;
i->flag ^= i->flag;
i->bit_no ^= i->bit_no;
i->dst ^= i->dst;
i->fbit ^= i->fbit;
i->group_no ^= i->group_no;
i->src ^= i->src;
i->sub_opcode ^= i->sub_opcode;
if (count_for_pfx > 0)
count_for_pfx++;
if (((insn >> 8) == 0x0b) || ((insn >> 8) == 0x2b))
{
pfx_flag = 1;
count_for_pfx = 1;
}
i->group_no = get_group (insn);
if (pfx_flag && (i->group_no == 0x0D) && (count_for_pfx == 2)
&& ((insn & _DECODE_0TO6_HIGHBYTE) == 0x7800))
{
i->group_no = 0x08;
count_for_pfx = 0;
pfx_flag ^= pfx_flag;
}
switch (i->group_no)
{
case 1:
i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
i->flag |= SUB_OP;
i->src = ((insn & _DECODE_LOWBYTE));
i->flag |= SRC;
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
i->flag |= FORMAT;
break;
case 2:
i->sub_opcode = ((insn & _DECODE_HIGHNIB_LOWBYTE) >> 4);
i->flag |= SUB_OP;
break;
case 3:
i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
i->flag |= SUB_OP;
i->bit_no = ((insn & _DECODE_HIGHNIB_LOWBYTE) >> 4);
i->flag |= BIT_NO;
break;
case 4:
i->sub_opcode = ((insn & _DECODE_BIT7_LOWBYTE) >> 7);
i->flag |= SUB_OP;
i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
i->flag |= DST;
i->bit_no = ((insn & _DECODE_4TO6_LOWBYTE) >> 4);
i->flag |= BIT_NO;
break;
case 5:
i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
i->flag |= SUB_OP;
i->src = ((insn & _DECODE_LOWBYTE));
i->flag |= SRC;
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
i->flag |= FORMAT;
break;
case 6:
i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
i->flag |= SUB_OP;
break;
case 7:
i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
i->flag |= SUB_OP;
break;
case 8:
i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
i->flag |= DST;
i->src = ((insn & _DECODE_LOWBYTE));
i->flag |= SRC;
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
i->flag |= FORMAT;
break;
case 9:
i->sub_opcode = ((insn & _DECODE_0TO2_HIGHBYTE) >> 8);
i->flag |= SUB_OP;
i->bit_no = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
i->flag |= BIT_NO;
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
i->flag |= FORMAT;
i->src = ((insn & _DECODE_LOWBYTE));
i->flag |= SRC;
break;
case 10:
i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
i->flag |= SUB_OP;
i->src = ((insn & _DECODE_LOWBYTE));
i->flag |= SRC;
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
i->flag |= FORMAT;
break;
case 11:
i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
i->flag |= DST;
break;
case 12:
i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
i->flag |= DST;
break;
case 13:
i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
i->flag |= SUB_OP;
i->src = ((insn & _DECODE_LOWBYTE));
i->flag |= SRC;
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
i->flag |= FORMAT;
break;
}
return;
}
/* Print one instruction from MEMADDR on INFO->STREAM. Return the size of the
instruction (always 2 on MAXQ20). */
static int
print_insn (bfd_vma memaddr, struct disassemble_info *info,
enum bfd_endian endianess)
{
/* The raw instruction. */
unsigned char insn[2], derived_code;
unsigned int format;
unsigned int actual_operands;
unsigned int i;
/* The group_info collected/decoded. */
group_info grp;
MAXQ20_OPCODE_INFO const *opcode;
int status;
format = 0;
status = info->read_memory_func (memaddr, (bfd_byte *) & insn[0], 2, info);
if (status != 0)
{
info->memory_error_func (status, memaddr, info);
return -1;
}
/* FIXME: Endianness always little. */
if (endianess == BFD_ENDIAN_BIG)
get_insn_opcode (((insn[0] << 8) | (insn[1])), &grp);
else
get_insn_opcode (((insn[1] << 8) | (insn[0])), &grp);
derived_code = ((grp.group_no << 4) | grp.sub_opcode);
if (insn[0] == 0 && insn[1] == 0)
{
info->fprintf_func (info->stream, "00 00");
return 2;
}
/* The opcode is always in insn[0]. */
for (opcode = &op_table[0]; opcode->name != NULL; ++opcode)
{
if (opcode->instr_id == derived_code)
{
if (opcode->instr_id == 0x3D)
{
if ((grp.bit_no == 0) && (opcode->arg[1] != A_BIT_0))
continue;
if ((grp.bit_no == 1) && (opcode->arg[1] != A_BIT_1))
continue;
if ((grp.bit_no == 3) && (opcode->arg[0] != 0))
continue;
}
info->fprintf_func (info->stream, "%s ", opcode->name);
actual_operands = 0;
if ((grp.flag & SRC) == SRC)
actual_operands++;
if ((grp.flag & DST) == DST)
actual_operands++;
/* If Implict FLAG in the Instruction. */
if ((opcode->op_number > actual_operands)
&& !((grp.flag & SRC) == SRC) && !((grp.flag & DST) == DST))
{
for (i = 0; i < opcode->op_number; i++)
{
if (i == 1 && (opcode->arg[1] != NO_ARG))
info->fprintf_func (info->stream, ",");
maxq_print_arg (opcode->arg[i], info, grp);
}
}
/* DST is ABSENT in the grp. */
if ((opcode->op_number > actual_operands)
&& ((grp.flag & SRC) == SRC))
{
maxq_print_arg (opcode->arg[0], info, grp);
info->fprintf_func (info->stream, " ");
if (opcode->instr_id == 0xA4)
info->fprintf_func (info->stream, "LC[0]");
if (opcode->instr_id == 0xA5)
info->fprintf_func (info->stream, "LC[1]");
if ((grp.flag & SRC) == SRC)
info->fprintf_func (info->stream, ",");
}
if ((grp.flag & DST) == DST)
{
if ((grp.flag & BIT_NO) == BIT_NO)
{
info->fprintf_func (info->stream, " %s.%d",
get_reg_name (grp.dst,
(type1) 0 /*DST*/),
grp.bit_no);
}
else
info->fprintf_func (info->stream, " %s",
get_reg_name (grp.dst, (type1) 0));
}
/* SRC is ABSENT in the grp. */
if ((opcode->op_number > actual_operands)
&& ((grp.flag & DST) == DST))
{
info->fprintf_func (info->stream, ",");
maxq_print_arg (opcode->arg[1], info, grp);
info->fprintf_func (info->stream, " ");
}
if ((grp.flag & SRC) == SRC)
{
if ((grp.flag & DST) == DST)
info->fprintf_func (info->stream, ",");
if ((grp.flag & BIT_NO) == BIT_NO)
{
format = opcode->format;
if ((grp.flag & FORMAT) == FORMAT)
format = grp.fbit;
if (format == 1)
info->fprintf_func (info->stream, " %s.%d",
get_reg_name (grp.src,
(type1) 1 /*SRC*/),
grp.bit_no);
if (format == 0)
info->fprintf_func (info->stream, " #%02xh.%d",
grp.src, grp.bit_no);
}
else
{
format = opcode->format;
if ((grp.flag & FORMAT) == FORMAT)
format = grp.fbit;
if (format == 1)
info->fprintf_func (info->stream, " %s",
get_reg_name (grp.src,
(type1) 1 /*SRC*/));
if (format == 0)
info->fprintf_func (info->stream, " #%02xh",
(grp.src));
}
}
return 2;
}
}
info->fprintf_func (info->stream, "Unable to Decode : %02x %02x",
insn[0], insn[1]);
return 2;
}
int
print_insn_maxq_little (bfd_vma memaddr, struct disassemble_info *info)
{
return print_insn (memaddr, info, BFD_ENDIAN_LITTLE);
}

6
opcodes/po/POTFILES.in
View File

@ -10,8 +10,6 @@ cgen-asm.c
cgen-bitset.c
cgen-dis.c
cgen-opc.c
cgen-ops.h
cgen-types.h
cr16-dis.c
cr16-opc.c
cris-dis.c
@ -112,7 +110,6 @@ m68hc11-opc.c
m68k-dis.c
m68k-opc.c
m88k-dis.c
maxq-dis.c
mcore-dis.c
mcore-opc.h
mep-asm.c
@ -155,6 +152,8 @@ pj-dis.c
pj-opc.c
ppc-dis.c
ppc-opc.c
rx-decode.c
rx-dis.c
s390-dis.c
s390-mkopc.c
s390-opc.c
@ -175,6 +174,7 @@ tic30-dis.c
tic4x-dis.c
tic54x-dis.c
tic54x-opc.c
tic6x-dis.c
tic80-dis.c
tic80-opc.c
v850-dis.c