New version from Andrew; Portability fixes on top of that
This commit is contained in:
Michael Meissner
parent
3d6ab69f35
commit
37404956b4
@ -140,10 +140,16 @@ pk_disklabel.c
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ppc-cache-rules
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ppc-instructions
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ppc-opcode-complex
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ppc-opcode-complex-array
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ppc-opcode-complex-goto
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ppc-opcode-complex-switch
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ppc-opcode-flat
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ppc-opcode-goto
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ppc-opcode-jump
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ppc-opcode-simple
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ppc-opcode-simple-array
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ppc-opcode-simple-goto
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ppc-opcode-simple-switch
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ppc-opcode-stupid
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ppc-opcode-test-1
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ppc-opcode-test-2
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@ -1,5 +1,14 @@
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Tue Feb 11 13:49:10 1997 Michael Meissner <meissner@tiktok.cygnus.com>
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* events.c (event_queue_create): Don't use NULL to initialize an
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integer field.
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(even_queue_{init,schedule_after_signal,tick}): Conditionalize use
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of sigprocmask to appropriate autoconf test.
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* main.c ({cntrl_c,main}): Use RETSIGTYPE for signal return type,
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don't assume void.
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* sim_calls.c (sim_{ctrl_c,resume}): Ditto.
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* Makefile.in (callback.o): Define HAVE_CONFIG_H, so callback.c
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includes our config.h.
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@ -8,6 +17,62 @@ Tue Feb 4 13:42:59 1997 Doug Evans <dje@canuck.cygnus.com>
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* configure.in: Fix typo in test for callback.c.
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* configure: Regenerated.
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Fri Feb 7 10:04:25 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* emul_chirp.c (emul_chirp_create): Handle a virtbase of -1 being
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found in the device tree.
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Wed Feb 5 10:56:27 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* Property create/initialization still wasn't correctly ordered.
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Should be delaying everything related to ihandle creation until
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after the rest of the tree has been established.
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* device.c (device_find_ihandle_runtime_property): Update.
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(device_add_ihandle_runtime_property): Update.
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* tree.c (parse_ihandle_property): Delay lookup of the device to
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be opened until the ihandle initialization phase.
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* tree.c (print_properties): Update.
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Wed Feb 5 10:56:27 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* gen-icache.c (print_icache_extraction): Add a reason parameter.
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Augment each extracted field with a comment citing the codes
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origin. Should simplify tracking down incorrect cache
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extractions.
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Tue Feb 4 17:44:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* gen-icache.c: Generalize code handling XXX_is_NNN so that it
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works for normal and boolean table entries.
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* psim.c (psim_write_memory): last_cpu == -1 or nr_cpus is now
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valid. Handle this just like *_{read,write}_register now handles
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it.
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Mon Feb 3 17:18:16 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* events.c (insert_event_entry): Correct loop termination
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assertions.
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Fri Jan 31 16:20:26 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* psim.c (psim_options): Add new option -c for max-iterations or
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count.
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(psim_usage): Document.
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(psim_max_iterations_exceeded): New function, abort simulation if
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max iterations exceeded.
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* gen-idecode.c: Re-work the table lookup code so that it assumes
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that the entry is a leaf by default. Simplify the boolean table
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entry code so that it involves a mask + test instead of shift +
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shift + mask + test.
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* gen-idecode.c: Correct generated igen body so that it no drops
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or doubles clock interrupts.
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Thu Jan 30 11:23:20 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* Makefile.in (BUILT_SRC_WO_CONFIG): Change targ-vals.* to
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@ -31,6 +96,86 @@ Wed Jan 29 12:32:41 1997 Michael Meissner <meissner@tiktok.cygnus.com>
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(targ-map.o): Add dependency.
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(clean): Remove gentmap.
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Wed Jan 29 12:14:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* igen wasn't aborting if the opcode table contained no valid
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fields.
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* misc.c (name2i): Possibly abort if an invalid name is
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encountered.
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* ld-decode.c: Abort if the table type isn't found.
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Wed Jan 29 12:14:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* When performance monitoring is disabled, it is still possible to
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determine the simulation speed by looking at the number of elapsed
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ticks recorded by the event queue.
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* psim.c (psim_write_register, psim_read_register): Force the cpu
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to zero when it is either of `-1' or `nr_cpus'. In both cases the
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next cpu would be zero any way.
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* mon.c (mon_print_info): If possible, print the system cycle
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performance. This is an indication of the number of instructions
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per second.
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Wed Jan 29 12:14:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* The code to allow an event queue to be updated during a signal
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was missing. For main.c, a cntrl-c simulation termination wasn't
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handled cleanly.
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* The simulation would not correctly restart if an event requested
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that the simulation be halted.
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* psim.c (psim_options): Add hack to -i option to optionally
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include a level vis -i2.
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(psim_usage): Document.
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* main.c (cntrl_c, cntrl_c_simulation): New functions. When a
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cntrl-c occures schedule an event to halt the simulation.
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(main): Catch CNTRL-C signals with the function cntrl_c.
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* events.c (event_queue_process): Mask interrupts while
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manipulating the async event queue.
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(event_queue_init): Ditto.
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(event_queue_schedule_after_signal): Ditto.
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* events.c (event_queue_process): Mark the event queue as being in
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the processing state when processing has started. Adjust code
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so that it is tolerant of halts.
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(event_queue_init): Start the event queue out with processing
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false.
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(event_queue_tick): Check that processing isn't still being
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performed.
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* gen-idecode.c (print_run_until_stop_body): Call
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event_queue_process_events to clear possibly pending events before
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starting a simulation run. Re-arange main loop so that simulator
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is correctly restarted when an event halts the simulation.
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* psim.c (psim_halt): Handle an event halting the simulation.
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* psim.c (psim_init): Adjust initial cpu - == -1 - to match
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reworked idecode.
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Wed Jan 29 12:14:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* ppc-opcode-complex: Correct typo - was expanding ORA instead of
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RA. Based on instruction frequency stats, expand additional
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instructions.
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* ppc-instructions: Change all `RA == 0' to RA_is_0.
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* ppc-opcode-stupid: Move all but the basic table in -complex into
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here. Update to new format.
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* Makefile.in (tmp-defines): New target. Force defines.h to always
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be built. Hence get ppc-opcode-goto to build.
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Tue Jan 28 13:00:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* hw_com.c (hw_com_instance_read, hw_com_instance_write):
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Implement.
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Thu Jan 23 09:07:26 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
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* hw_trace.c (hw_trace_init_data): Delete. The trace options need
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@ -315,7 +315,7 @@ run: psim
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rm -f run
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ln psim run
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$(TARGETLIB): tmp-igen tmp-dgen tmp-hw tmp-pk $(LIB_OBJ) $(GDB_OBJ)
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$(TARGETLIB): tmp-igen tmp-dgen tmp-hw tmp-pk tmp-defines $(LIB_OBJ) $(GDB_OBJ)
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rm -f $(TARGETLIB)
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$(AR) $(AR_FLAGS) $(TARGETLIB) $(LIB_OBJ) $(GDB_OBJ)
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$(RANLIB) $(TARGETLIB)
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@ -412,9 +412,11 @@ targ-map.o: targ-map.c targ-vals.h
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options.o: options.c $(BASICS_H) $(CPU_H) $(IDECODE_H) $(INLINE) $(LIB_SRC) $(BUILT_SRC) config.status Makefile defines.h
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$(CC) -c $(STD_CFLAGS) '-DOPCODE_RULES="@sim_opcode@"' '-DIGEN_FLAGS="$(IGEN_FLAGS)"' '-DDGEN_FLAGS="$(DGEN_FLAGS)"' $<
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defines.h: config.h Makefile
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rm -f defines.h
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sed -n -e '/^#define HAVE_/s/ 1$$/",/' -e '/^#define HAVE_/s//"HAVE_/p' < config.h > defines.h
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tmp-defines: config.h Makefile
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sed -n -e '/^#define HAVE_/s/ 1$$/",/' -e '/^#define HAVE_/s//"HAVE_/p' < config.h > tmp-defines.h
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$(srcdir)/../../move-if-change tmp-defines.h defines.h
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touch tmp-defines
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#
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# Rules to create the built c source code files
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#
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144
sim/ppc/ld-decode.c
Normal file
144
sim/ppc/ld-decode.c
Normal file
@ -0,0 +1,144 @@
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/* This file is part of the program psim.
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Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* load the opcode stat structure */
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#include "misc.h"
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#include "lf.h"
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#include "table.h"
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#include "ld-decode.h"
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#ifndef NULL
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#define NULL 0
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#endif
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enum {
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op_options,
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op_first,
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op_last,
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op_force_first,
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op_force_last,
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op_force_expansion,
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op_special_mask,
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op_special_value,
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op_special_constant,
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nr_decode_fields,
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};
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static const name_map decode_type_map[] = {
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{ "normal", normal_decode_rule },
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{ "expand-forced", expand_forced_rule },
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{ "boolean", boolean_rule },
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{ NULL, normal_decode_rule },
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};
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static const name_map decode_gen_map[] = {
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{ "array", array_gen },
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{ "switch", switch_gen },
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{ "padded-switch", padded_switch_gen },
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{ "goto-switch", goto_switch_gen },
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{ NULL, -1 },
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};
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static const name_map decode_slash_map[] = {
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{ "variable-slash", 0 },
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{ "constant-slash", 1 },
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{ NULL },
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};
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decode_table *
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load_decode_table(char *file_name,
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int hi_bit_nr)
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{
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table *file = table_open(file_name, nr_decode_fields, 0);
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table_entry *entry;
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decode_table *table = NULL;
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decode_table **curr_rule = &table;
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while ((entry = table_entry_read(file)) != NULL) {
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decode_table *new_rule = ZALLOC(decode_table);
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new_rule->type = name2i(entry->fields[op_options], decode_type_map);
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new_rule->gen = name2i(entry->fields[op_options], decode_gen_map);
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new_rule->force_slash = name2i(entry->fields[op_options], decode_slash_map);
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new_rule->first = target_a2i(hi_bit_nr, entry->fields[op_first]);
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new_rule->last = target_a2i(hi_bit_nr, entry->fields[op_last]);
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new_rule->force_first = (strlen(entry->fields[op_force_first])
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? target_a2i(hi_bit_nr, entry->fields[op_force_first])
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: new_rule->last + 1);
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new_rule->force_last = (strlen(entry->fields[op_force_last])
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? target_a2i(hi_bit_nr, entry->fields[op_force_last])
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: new_rule->first - 1);
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new_rule->force_expansion = entry->fields[op_force_expansion];
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new_rule->special_mask = a2i(entry->fields[op_special_mask]);
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new_rule->special_value = a2i(entry->fields[op_special_value]);
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new_rule->special_constant = a2i(entry->fields[op_special_constant]);
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*curr_rule = new_rule;
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curr_rule = &new_rule->next;
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}
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return table;
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}
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void
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dump_decode_rule(decode_table *rule,
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int indent)
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{
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dumpf(indent, "((decode_table*)%p\n", rule);
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if (rule) {
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dumpf(indent, " (type %s)\n", i2name(rule->type, decode_type_map));
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dumpf(indent, " (gen %s)\n", i2name(rule->gen, decode_gen_map));
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dumpf(indent, " (force_slash %d)\n", rule->force_slash);
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dumpf(indent, " (first %d)\n", rule->first);
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dumpf(indent, " (last %d)\n", rule->last);
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dumpf(indent, " (force_first %d)\n", rule->force_first);
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dumpf(indent, " (force_last %d)\n", rule->force_last);
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dumpf(indent, " (force_expansion \"%s\")\n", rule->force_expansion);
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dumpf(indent, " (special_mask 0x%x)\n", rule->special_mask);
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dumpf(indent, " (special_value 0x%x)\n", rule->special_value);
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dumpf(indent, " (special_constant 0x%x)\n", rule->special_constant);
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dumpf(indent, " (next 0x%x)\n", rule->next);
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}
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dumpf(indent, " )\n");
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}
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#ifdef MAIN
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static void
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dump_decode_rules(decode_table *rule,
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int indent)
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{
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while (rule) {
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dump_decode_rule(rule, indent);
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rule = rule->next;
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}
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}
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int
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main(int argc, char **argv)
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{
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decode_table *rules;
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if (argc != 3)
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error("Usage: decode <decode-file> <hi-bit-nr>\n");
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rules = load_decode_table(argv[1], a2i(argv[2]));
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dump_decode_rules(rules, 0);
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return 0;
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}
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#endif
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@ -19,9 +19,40 @@
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#
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array,normal: 0: 5: 0: 5:
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array,normal: 21:31:32:-1:OE,LR,AA,Rc,LK:
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##
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## Branch Conditional instruction - Expand BO{0:4} only, ignore BO{5}
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##
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array,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000
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array,boolean: 11:15:11:15:0RA: 0xfc000000:0x38000000:0
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##
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## Expand RA on equality with 0 in Add instructions were if(RA==0) appears.
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##
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# Add Immediate
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array,boolean: 11:15:11:15:RA: 0xfc000000:0x38000000:0
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# Add Immediate Shifted
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array,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0
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# BLR instruction - LR=8 is munged into 0x100 == 256
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##
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## Ditto for high frequency load/store instructions.
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##
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# Store Byte
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#array,boolean: 11:15:11:15:RA: 0xfc000000:0x98000000:0
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# Store Word
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#array,boolean: 11:15:11:15:RA: 0xfc000000:0x90000000:0
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# Load Word and Zero
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#array,boolean: 11:15:11:15:RA: 0xfc000000:0x80000000:0
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##
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## Move to/from SPR instructions - LR=8 is munged into 0x100 == 256
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##
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#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
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#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
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##
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## Compare Immediate instruction - separate out L == 0 and L == 1
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##
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# Compare Immediate
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#array,normal: 10:11:10:11:L: 0xfc000000:0x2c000000:0
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##
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## Move to/from SPR instructions - separate out LR case
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##
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# Move to SPR
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array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
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# Move from SPR
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array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
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22
sim/ppc/ppc-opcode-complex-array
Normal file
22
sim/ppc/ppc-opcode-complex-array
Normal file
@ -0,0 +1,22 @@
|
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#
|
||||
# This file is part of the program psim.
|
||||
#
|
||||
# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
array,normal: 0: 5: 0: 5:
|
||||
array,normal: 21:31:32:-1:OE,LR,AA,Rc,LK:
|
||||
#array,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000
|
||||
27
sim/ppc/ppc-opcode-complex-goto
Normal file
27
sim/ppc/ppc-opcode-complex-goto
Normal file
@ -0,0 +1,27 @@
|
||||
#
|
||||
# This file is part of the program psim.
|
||||
#
|
||||
# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
goto-switch,normal: 0: 5: 0: 5:
|
||||
goto-switch,normal: 21:31:32:-1:OE,LR,AA,Rc,LK:
|
||||
goto-switch,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000
|
||||
goto-switch,boolean: 11:15:11:15:RA: 0xfc000000:0x38000000:0
|
||||
goto-switch,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0
|
||||
# BLR instruction - LR=8 is munged into 0x100 == 256
|
||||
goto-switch,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
|
||||
goto-switch,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
|
||||
29
sim/ppc/ppc-opcode-complex-switch
Normal file
29
sim/ppc/ppc-opcode-complex-switch
Normal file
@ -0,0 +1,29 @@
|
||||
#
|
||||
# This file is part of the program psim.
|
||||
#
|
||||
# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
# sed < ppc-opcode-complex > ppc-opcode-flat -e 's/array/switch/'
|
||||
#
|
||||
padded-switch,normal: 0: 5: 0: 5:
|
||||
padded-switch,normal: 21:31:32:-1:OE,LR,AA,Rc,LK:
|
||||
padded-switch,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000
|
||||
switch,boolean: 11:15:11:15:RA: 0xfc000000:0x38000000:0
|
||||
switch,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0
|
||||
# BLR instruction
|
||||
switch,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:0x100
|
||||
switch,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:0x100
|
||||
@ -17,13 +17,15 @@
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
# sed < ppc-opcode-complex > ppc-opcode-flat -e 's/array/switch/'
|
||||
# sed < ppc-opcode-simple > ppc-opcode-goto -e 's/array/goto-switch/'
|
||||
#
|
||||
goto-switch,normal: 0: 5: 0: 5:
|
||||
goto-switch,normal: 21:31:32:-1:OE,LR,AA,Rc,LK:
|
||||
goto-switch,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000
|
||||
goto-switch,boolean: 11:15:11:15:0RA: 0xfc000000:0x38000000:0
|
||||
goto-switch,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0
|
||||
# BLR instruction
|
||||
goto-switch,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:0x100
|
||||
goto-switch,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:0x100
|
||||
goto-switch: 0: 5
|
||||
goto-switch:21:31
|
||||
#
|
||||
#goto-switch,normal: 21:31:32:-1:OE,LR,AA,Rc,LK:
|
||||
#goto-switch,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000
|
||||
#goto-switch,boolean: 11:15:11:15:0RA: 0xfc000000:0x38000000:0
|
||||
#goto-switch,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0
|
||||
## BLR instruction - LR=8 is munged into 0x100 == 256
|
||||
#goto-switch,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:255
|
||||
#goto-switch,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:255
|
||||
|
||||
25
sim/ppc/ppc-opcode-simple-array
Normal file
25
sim/ppc/ppc-opcode-simple-array
Normal file
@ -0,0 +1,25 @@
|
||||
#
|
||||
# This file is part of the program psim.
|
||||
#
|
||||
# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
#
|
||||
# Create a two level switch statement. The first level branches on bits
|
||||
# 0..5 while the second level branches on bits 21..31
|
||||
#
|
||||
array: 0: 5: 0: 5
|
||||
array:21:31
|
||||
25
sim/ppc/ppc-opcode-simple-goto
Normal file
25
sim/ppc/ppc-opcode-simple-goto
Normal file
@ -0,0 +1,25 @@
|
||||
#
|
||||
# This file is part of the program psim.
|
||||
#
|
||||
# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
#
|
||||
# Create a two level switch statement. The first level branches on bits
|
||||
# 0..5 while the second level branches on bits 21..31
|
||||
#
|
||||
goto-switch: 0: 5: 0: 5
|
||||
goto-switch:21:31
|
||||
25
sim/ppc/ppc-opcode-simple-switch
Normal file
25
sim/ppc/ppc-opcode-simple-switch
Normal file
@ -0,0 +1,25 @@
|
||||
#
|
||||
# This file is part of the program psim.
|
||||
#
|
||||
# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
#
|
||||
# Create a two level switch statement. The first level branches on bits
|
||||
# 0..5 while the second level branches on bits 21..31
|
||||
#
|
||||
padded-switch: 0: 5
|
||||
padded-switch:21:31
|
||||
@ -17,9 +17,42 @@
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
0: 5: 0: 5:0:0: 0:0x00000000:0x00000000:0
|
||||
21:31:32:-1:0:OE,LR,AA,Rc,LK:0:0x00000000:0x00000000:0
|
||||
6:15: 6:15:0:BO,BI: 0:0xfc000000:0x40000000:0
|
||||
11:15:11:15:0:RA: 0:0xfc000000:0x38000000:2
|
||||
11:15:11:15:0:RA: 0:0xfc000000:0x3c000000:2
|
||||
11:20:11:20:0:spr: 0:0xfc000000:0x7c000000:0
|
||||
array,normal: 0: 5: 0: 5:
|
||||
array,normal:21:31:32:-1:OE,LR,AA,Rc,LK:
|
||||
##
|
||||
## Branch Conditional instruction - Expand BO{0:4} only, ignore BO{5}
|
||||
##
|
||||
array,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000
|
||||
##
|
||||
## Expand RA on equality with 0 in Add instructions were if(RA==0) appears.
|
||||
##
|
||||
# Add Immediate
|
||||
#array,boolean: 11:15:11:15:RA: 0xfc000000:0x38000000:0
|
||||
# Add Immediate Shifted
|
||||
#array,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0
|
||||
##
|
||||
## Ditto for high frequency load/store instructions.
|
||||
##
|
||||
# Store Byte
|
||||
#array,boolean: 11:15:11:15:RA: 0xfc000000:0x98000000:0
|
||||
# Store Word
|
||||
#array,boolean: 11:15:11:15:RA: 0xfc000000:0x90000000:0
|
||||
# Load Word and Zero
|
||||
#array,boolean: 11:15:11:15:RA: 0xfc000000:0x80000000:0
|
||||
##
|
||||
## Move to/from SPR instructions - LR=8 is munged into 0x100 == 256
|
||||
##
|
||||
#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
|
||||
#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
|
||||
##
|
||||
## Compare Immediate instruction - separate out L == 0 and L == 1
|
||||
##
|
||||
# Compare Immediate
|
||||
#array,boolean: 10:11:10:11:L: 0xfc000000:0x2c000000:0
|
||||
##
|
||||
## Move to/from SPR instructions - separate out LR case
|
||||
##
|
||||
# Move to SPR
|
||||
#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
|
||||
# Move from SPR
|
||||
#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
|
||||
|
||||
Loading…
Reference in New Issue
Block a user