MIPS: Reorder ABI determination ahead of target description loading
Move ABI determination code ahead of target description loading so that architecture information can be adjusted according to the ABI selected, and then used in OS dependent register information initialization needed for target description processing. No functional change. gdb/ * gdb/mips-tdep.c (mips_gdbarch_init): Reorder ABI determination ahead of target description loading.
This commit is contained in:
Maciej W. Rozycki
parent
d4dd32824a
commit
37c33887bd
@ -1,3 +1,8 @@
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2018-02-26 Maciej W. Rozycki <macro@mips.com>
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* gdb/mips-tdep.c (mips_gdbarch_init): Reorder ABI determination
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ahead of target description loading.
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2018-02-26 Tom Tromey <tom@tromey.com>
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* stack.c (backtrace_command_1): Update.
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360
gdb/mips-tdep.c
360
gdb/mips-tdep.c
@ -8084,185 +8084,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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int dspacc;
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int dspctl;
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/* Fill in the OS dependent register numbers and names. */
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if (info.osabi == GDB_OSABI_LINUX)
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{
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mips_regnum.fp0 = 38;
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mips_regnum.pc = 37;
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mips_regnum.cause = 36;
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mips_regnum.badvaddr = 35;
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mips_regnum.hi = 34;
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mips_regnum.lo = 33;
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mips_regnum.fp_control_status = 70;
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mips_regnum.fp_implementation_revision = 71;
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mips_regnum.dspacc = -1;
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mips_regnum.dspctl = -1;
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dspacc = 72;
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dspctl = 78;
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num_regs = 90;
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reg_names = mips_linux_reg_names;
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}
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else
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{
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mips_regnum.lo = MIPS_EMBED_LO_REGNUM;
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mips_regnum.hi = MIPS_EMBED_HI_REGNUM;
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mips_regnum.badvaddr = MIPS_EMBED_BADVADDR_REGNUM;
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mips_regnum.cause = MIPS_EMBED_CAUSE_REGNUM;
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mips_regnum.pc = MIPS_EMBED_PC_REGNUM;
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mips_regnum.fp0 = MIPS_EMBED_FP0_REGNUM;
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mips_regnum.fp_control_status = 70;
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mips_regnum.fp_implementation_revision = 71;
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mips_regnum.dspacc = dspacc = -1;
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mips_regnum.dspctl = dspctl = -1;
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num_regs = MIPS_LAST_EMBED_REGNUM + 1;
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if (info.bfd_arch_info != NULL
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&& info.bfd_arch_info->mach == bfd_mach_mips3900)
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reg_names = mips_tx39_reg_names;
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else
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reg_names = mips_generic_reg_names;
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}
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/* Check any target description for validity. */
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if (tdesc_has_registers (info.target_desc))
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{
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static const char *const mips_gprs[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
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"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
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};
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static const char *const mips_fprs[] = {
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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};
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const struct tdesc_feature *feature;
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int valid_p;
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.cpu");
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if (feature == NULL)
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return NULL;
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tdesc_data = tdesc_data_alloc ();
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valid_p = 1;
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for (i = MIPS_ZERO_REGNUM; i <= MIPS_RA_REGNUM; i++)
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valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
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mips_gprs[i]);
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.lo, "lo");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.hi, "hi");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.pc, "pc");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.cp0");
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if (feature == NULL)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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valid_p = 1;
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.badvaddr, "badvaddr");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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MIPS_PS_REGNUM, "status");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.cause, "cause");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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/* FIXME drow/2007-05-17: The FPU should be optional. The MIPS
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backend is not prepared for that, though. */
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.fpu");
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if (feature == NULL)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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valid_p = 1;
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for (i = 0; i < 32; i++)
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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i + mips_regnum.fp0, mips_fprs[i]);
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.fp_control_status,
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"fcsr");
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valid_p
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&= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.fp_implementation_revision,
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"fir");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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num_regs = mips_regnum.fp_implementation_revision + 1;
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if (dspacc >= 0)
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{
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.dsp");
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/* The DSP registers are optional; it's OK if they are absent. */
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if (feature != NULL)
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{
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i = 0;
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valid_p = 1;
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "hi1");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "lo1");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "hi2");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "lo2");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "hi3");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "lo3");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspctl, "dspctl");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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mips_regnum.dspacc = dspacc;
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mips_regnum.dspctl = dspctl;
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num_regs = mips_regnum.dspctl + 1;
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}
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}
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/* It would be nice to detect an attempt to use a 64-bit ABI
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when only 32-bit registers are provided. */
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reg_names = NULL;
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}
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/* First of all, extract the elf_flags, if available. */
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if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
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elf_flags = elf_elfheader (info.abfd)->e_flags;
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@ -8442,10 +8263,185 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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&& tdesc_property (info.target_desc, PROPERTY_GP32) != NULL
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&& mips_abi != MIPS_ABI_EABI32
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&& mips_abi != MIPS_ABI_O32)
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return NULL;
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/* Fill in the OS dependent register numbers and names. */
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if (info.osabi == GDB_OSABI_LINUX)
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{
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if (tdesc_data != NULL)
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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mips_regnum.fp0 = 38;
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mips_regnum.pc = 37;
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mips_regnum.cause = 36;
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mips_regnum.badvaddr = 35;
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mips_regnum.hi = 34;
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mips_regnum.lo = 33;
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mips_regnum.fp_control_status = 70;
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mips_regnum.fp_implementation_revision = 71;
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mips_regnum.dspacc = -1;
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mips_regnum.dspctl = -1;
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dspacc = 72;
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dspctl = 78;
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num_regs = 90;
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reg_names = mips_linux_reg_names;
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}
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else
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{
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mips_regnum.lo = MIPS_EMBED_LO_REGNUM;
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mips_regnum.hi = MIPS_EMBED_HI_REGNUM;
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mips_regnum.badvaddr = MIPS_EMBED_BADVADDR_REGNUM;
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mips_regnum.cause = MIPS_EMBED_CAUSE_REGNUM;
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mips_regnum.pc = MIPS_EMBED_PC_REGNUM;
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mips_regnum.fp0 = MIPS_EMBED_FP0_REGNUM;
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mips_regnum.fp_control_status = 70;
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mips_regnum.fp_implementation_revision = 71;
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mips_regnum.dspacc = dspacc = -1;
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mips_regnum.dspctl = dspctl = -1;
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num_regs = MIPS_LAST_EMBED_REGNUM + 1;
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if (info.bfd_arch_info != NULL
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&& info.bfd_arch_info->mach == bfd_mach_mips3900)
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reg_names = mips_tx39_reg_names;
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else
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reg_names = mips_generic_reg_names;
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}
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/* Check any target description for validity. */
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if (tdesc_has_registers (info.target_desc))
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{
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static const char *const mips_gprs[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
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"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
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};
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static const char *const mips_fprs[] = {
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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};
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const struct tdesc_feature *feature;
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int valid_p;
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.cpu");
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if (feature == NULL)
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return NULL;
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tdesc_data = tdesc_data_alloc ();
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valid_p = 1;
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for (i = MIPS_ZERO_REGNUM; i <= MIPS_RA_REGNUM; i++)
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valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
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mips_gprs[i]);
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.lo, "lo");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.hi, "hi");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.pc, "pc");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.cp0");
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if (feature == NULL)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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valid_p = 1;
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.badvaddr, "badvaddr");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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MIPS_PS_REGNUM, "status");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.cause, "cause");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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/* FIXME drow/2007-05-17: The FPU should be optional. The MIPS
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backend is not prepared for that, though. */
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.fpu");
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if (feature == NULL)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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valid_p = 1;
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for (i = 0; i < 32; i++)
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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i + mips_regnum.fp0, mips_fprs[i]);
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.fp_control_status,
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"fcsr");
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valid_p
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&= tdesc_numbered_register (feature, tdesc_data,
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mips_regnum.fp_implementation_revision,
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"fir");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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num_regs = mips_regnum.fp_implementation_revision + 1;
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if (dspacc >= 0)
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{
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.dsp");
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/* The DSP registers are optional; it's OK if they are absent. */
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if (feature != NULL)
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{
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i = 0;
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valid_p = 1;
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "hi1");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "lo1");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "hi2");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "lo2");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "hi3");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspacc + i++, "lo3");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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dspctl, "dspctl");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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mips_regnum.dspacc = dspacc;
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mips_regnum.dspctl = dspctl;
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num_regs = mips_regnum.dspctl + 1;
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}
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}
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/* It would be nice to detect an attempt to use a 64-bit ABI
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when only 32-bit registers are provided. */
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reg_names = NULL;
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}
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/* Try to find a pre-existing architecture. */
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