* config/tc-sh.c (allow_dollar_register_prefix): New variable.
(parse_reg_without_prefix): New function. (parse_reg): Check for '$' register prefix if --allow-reg-prefix is set. (option md_longopts): Add allow-reg-prefix option. * doc/c-sh.texi: Document --allow-reg-prefix option. * NEWS: Mention the new switch. * gas/sh/basic.exp: Run reg-prefix test. * gas/sh/reg-prefix.s: New * gas/sh/reg-prefix.d: New
This commit is contained in:
Nick Clifton
parent
8ba0209fdd
commit
37dedf6633
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@ -1,3 +1,14 @@
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2005-10-06 Khem Raj <kraj@mvista.com>
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NIIBE Yutaka <gniibe@m17n.org>
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* config/tc-sh.c (allow_dollar_register_prefix): New variable.
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(parse_reg_without_prefix): New function.
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(parse_reg): Check for '$' register prefix if --allow-reg-prefix is
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set.
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(option md_longopts): Add allow-reg-prefix option.
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* doc/c-sh.texi: Document --allow-reg-prefix option.
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* NEWS: Mention the new switch.
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2005-10-03 Arnold Metselaar <arnold.metselaar@planet.nl>
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* doc/as.texinfo (Infix Ops): '<' and '>' are not shift
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4
gas/NEWS
4
gas/NEWS
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@ -1,5 +1,9 @@
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-*- text -*-
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* The SH target supports a new command line switch --enable-reg-prefix which,
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if enabled, will allow register names to be optionally prefixed with a $
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character. This allows register names to be distinguished from label names.
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* Macros with a variable number of arguments are now supported. See the
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documentation for how this works.
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@ -134,7 +134,11 @@ int sh_small;
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static int dont_adjust_reloc_32;
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/* preset architecture set, if given; zero otherwise. */
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/* Flag to indicate that '$' is allowed as a register prefix. */
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static int allow_dollar_register_prefix;
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/* Preset architecture set, if given; zero otherwise. */
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static unsigned int preset_target_arch;
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@ -869,8 +873,8 @@ static int reg_b;
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/* Try to parse a reg name. Return the number of chars consumed. */
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static int
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parse_reg (char *src, int *mode, int *reg)
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static unsigned int
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parse_reg_without_prefix (char *src, int *mode, int *reg)
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{
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char l0 = TOLOWER (src[0]);
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char l1 = l0 ? TOLOWER (src[1]) : 0;
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@ -1225,6 +1229,36 @@ parse_reg (char *src, int *mode, int *reg)
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return 0;
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}
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/* Like parse_reg_without_prefix, but this version supports
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$-prefixed register names if enabled by the user. */
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static unsigned int
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parse_reg (char *src, int *mode, int *reg)
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{
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unsigned int prefix;
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unsigned int consumed;
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if (src[0] == '$')
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{
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if (allow_dollar_register_prefix)
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{
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src ++;
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prefix = 1;
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}
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else
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return 0;
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}
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else
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prefix = 0;
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consumed = parse_reg_without_prefix (src, mode, reg);
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if (consumed == 0)
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return 0;
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return consumed + prefix;
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}
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static char *
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parse_exp (char *s, sh_operand_info *op)
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{
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@ -3005,31 +3039,39 @@ s_uses (int ignore ATTRIBUTE_UNUSED)
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demand_empty_rest_of_line ();
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}
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enum options
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{
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OPTION_RELAX = OPTION_MD_BASE,
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OPTION_BIG,
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OPTION_LITTLE,
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OPTION_SMALL,
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OPTION_DSP,
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OPTION_ISA,
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OPTION_RENESAS,
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OPTION_ALLOW_REG_PREFIX,
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#ifdef HAVE_SH64
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OPTION_ABI,
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OPTION_NO_MIX,
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OPTION_SHCOMPACT_CONST_CRANGE,
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OPTION_NO_EXPAND,
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OPTION_PT32,
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#endif
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OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */
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};
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const char *md_shortopts = "";
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struct option md_longopts[] =
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{
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#define OPTION_RELAX (OPTION_MD_BASE)
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#define OPTION_BIG (OPTION_MD_BASE + 1)
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#define OPTION_LITTLE (OPTION_BIG + 1)
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#define OPTION_SMALL (OPTION_LITTLE + 1)
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#define OPTION_DSP (OPTION_SMALL + 1)
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#define OPTION_ISA (OPTION_DSP + 1)
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#define OPTION_RENESAS (OPTION_ISA + 1)
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{"relax", no_argument, NULL, OPTION_RELAX},
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{"big", no_argument, NULL, OPTION_BIG},
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{"little", no_argument, NULL, OPTION_LITTLE},
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{"small", no_argument, NULL, OPTION_SMALL},
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{"dsp", no_argument, NULL, OPTION_DSP},
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{"isa", required_argument, NULL, OPTION_ISA},
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{"isa", required_argument, NULL, OPTION_ISA},
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{"renesas", no_argument, NULL, OPTION_RENESAS},
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{"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX},
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#ifdef HAVE_SH64
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#define OPTION_ABI (OPTION_RENESAS + 1)
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#define OPTION_NO_MIX (OPTION_ABI + 1)
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#define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
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#define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
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#define OPTION_PT32 (OPTION_NO_EXPAND + 1)
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{"abi", required_argument, NULL, OPTION_ABI},
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{"no-mix", no_argument, NULL, OPTION_NO_MIX},
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{"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
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@ -3070,6 +3112,10 @@ md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
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dont_adjust_reloc_32 = 1;
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break;
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case OPTION_ALLOW_REG_PREFIX:
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allow_dollar_register_prefix = 1;
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break;
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case OPTION_ISA:
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if (strcasecmp (arg, "dsp") == 0)
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preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
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@ -3097,6 +3143,7 @@ md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
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{
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extern const bfd_arch_info_type bfd_sh_arch;
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bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
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preset_target_arch = 0;
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for (; bfd_arch; bfd_arch=bfd_arch->next)
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{
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@ -3173,19 +3220,21 @@ md_show_usage (FILE *stream)
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{
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fprintf (stream, _("\
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SH options:\n\
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-little generate little endian code\n\
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-big generate big endian code\n\
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-relax alter jump instructions for long displacements\n\
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-renesas disable optimization with section symbol for\n\
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--little generate little endian code\n\
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--big generate big endian code\n\
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--relax alter jump instructions for long displacements\n\
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--renesas disable optimization with section symbol for\n\
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compatibility with Renesas assembler.\n\
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-small align sections to 4 byte boundaries, not 16\n\
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-dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
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-isa=[any use most appropriate isa\n\
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--small align sections to 4 byte boundaries, not 16\n\
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--dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
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--allow-reg-prefix allow '$' as a register name prefix.\n\
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--isa=[any use most appropriate isa\n\
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| dsp same as '-dsp'\n\
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| fp"));
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{
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extern const bfd_arch_info_type bfd_sh_arch;
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bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
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for (; bfd_arch; bfd_arch=bfd_arch->next)
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if (bfd_arch->mach != bfd_mach_sh5)
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{
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@ -3196,19 +3245,19 @@ SH options:\n\
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fprintf (stream, "]\n");
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#ifdef HAVE_SH64
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fprintf (stream, _("\
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-isa=[shmedia set as the default instruction set for SH64\n\
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--isa=[shmedia set as the default instruction set for SH64\n\
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| SHmedia\n\
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| shcompact\n\
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| SHcompact]\n"));
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fprintf (stream, _("\
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-abi=[32|64] set size of expanded SHmedia operands and object\n\
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--abi=[32|64] set size of expanded SHmedia operands and object\n\
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file type\n\
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-shcompact-const-crange emit code-range descriptors for constants in\n\
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--shcompact-const-crange emit code-range descriptors for constants in\n\
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SHcompact code sections\n\
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-no-mix disallow SHmedia code in the same section as\n\
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--no-mix disallow SHmedia code in the same section as\n\
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constants and SHcompact code\n\
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-no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
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-expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
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--no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
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--expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
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to 32 bits only\n"));
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#endif /* HAVE_SH64 */
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}
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@ -4263,7 +4312,7 @@ sh_parse_name (char const *name, expressionS *exprP, char *nextcharP)
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exprP->X_add_symbol = GOT_symbol;
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no_suffix:
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/* If we have an absolute symbol or a reg, then we know its
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value now. */
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value now. */
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segment = S_GET_SEGMENT (exprP->X_add_symbol);
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if (segment == absolute_section)
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{
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@ -1,4 +1,4 @@
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@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 2001, 2003, 2004
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@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 2001, 2003, 2004, 2005
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ -24,39 +24,43 @@
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(formerly Hitachi) / SuperH SH family.
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@table @code
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@kindex -little
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@kindex -big
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@kindex -relax
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@kindex -small
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@kindex -dsp
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@kindex -renesas
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@kindex --little
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@kindex --big
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@kindex --relax
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@kindex --small
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@kindex --dsp
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@kindex --renesas
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@kindex --allow-reg-prefix
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@item -little
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@item --little
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Generate little endian code.
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@item -big
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@item --big
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Generate big endian code.
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@item -relax
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@item --relax
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Alter jump instructions for long displacements.
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@item -small
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@item --small
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Align sections to 4 byte boundaries, not 16.
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@item -dsp
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@item --dsp
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Enable sh-dsp insns, and disable sh3e / sh4 insns.
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@item -renesas
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@item --renesas
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Disable optimization with section symbol for compatibility with
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Renesas assembler.
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@item -isa=sh4 | sh4a
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@item --allow-reg-prefix
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Allow '$' as a register name prefix.
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@item --isa=sh4 | sh4a
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Specify the sh4 or sh4a instruction set.
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@item -isa=dsp
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@item --isa=dsp
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Enable sh-dsp insns, and disable sh3e / sh4 insns.
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@item -isa=fp
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@item --isa=fp
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Enable sh2e, sh3e, sh4, and sh4a insn sets.
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@item -isa=all
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@item --isa=all
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Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
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@end table
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@ -1,3 +1,10 @@
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2005-10-06 Khem Raj <kraj@mvista.com>
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NIIBE Yutaka <gniibe@m17n.org>
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* gas/sh/basic.exp: Run reg-prefix test.
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* gas/sh/reg-prefix.s: New
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* gas/sh/reg-prefix.d: New
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2005-09-30 Catherine Moore <clm@cm00re.com>
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* gas/bfin: New testsuite for bfin.
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@ -162,8 +162,11 @@ if [istarget sh*-*-*] then {
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run_dump_test "tlsnopic"
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# Test -renesas.
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# Test --renesas.
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run_dump_test "renesas-1"
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# Test --allow-reg-prefix.
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run_dump_test "reg-prefix"
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}
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}
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@ -0,0 +1,9 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#as: --allow-reg-prefix
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#name: SH --allow-reg-prefix option
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# Test SH register names prefixed with $:
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.*: file format elf.*sh.*
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Disassembly of section .text:
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0x00000000 01 63 movli.l @r1,r0
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@ -0,0 +1,2 @@
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.text
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movli.l @r1,$r0
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