* config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
for "<foo>a". Issue error messages for unrecognised or corrrupt size extensions. * gas/msp430/bad.s: New test: Checks erroneous size extensions. * gas/msp430/bad.d: New test command file. * gas/msp430/bad.l: New file: Expected error messages. * gas/msp430/msp430.exp: Run the new test. * gas/msp430/msp430x.s: Add "<foo>.a" aliases of "<foo>a" instructions. * gas/msp430/msp430x.d: Update expected disassembly.
This commit is contained in:
parent
f424ae209c
commit
38d7754573
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@ -1,3 +1,9 @@
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2013-10-08 Nick Clifton <nickc@redhat.com>
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* config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
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for "<foo>a". Issue error messages for unrecognised or corrrupt
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size extensions.
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2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
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* config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
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@ -485,6 +485,10 @@ static struct mcu_type_s mcu_types[] =
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{"msp430p337", MSP_ISA_430},
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{"msp430p337", MSP_ISA_430},
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{"msp430tch5e", MSP_ISA_430},
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{"msp430tch5e", MSP_ISA_430},
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/* NB/ This section of the list should be kept in sync with the ones in:
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gcc/config/msp430/t-msp430
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gcc/config/msp430/msp430.c */
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{"msp430cg4616", MSP_ISA_430X},
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{"msp430cg4616", MSP_ISA_430X},
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{"msp430cg4617", MSP_ISA_430X},
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{"msp430cg4617", MSP_ISA_430X},
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{"msp430cg4618", MSP_ISA_430X},
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{"msp430cg4618", MSP_ISA_430X},
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@ -712,7 +716,7 @@ static struct mcu_type_s mcu_types[] =
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{"msp430", MSP_ISA_430},
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{"msp430", MSP_ISA_430},
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{"msp430X", MSP_ISA_430X},
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{"msp430X", MSP_ISA_430X},
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{"msp430Xv2", MSP_ISA_430Xv2},
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{"msp430Xv2", MSP_ISA_430Xv2},
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{NULL, 0}
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{NULL, 0}
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};
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};
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@ -1196,7 +1200,7 @@ md_parse_option (int c, char * arg)
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as_fatal (_("unrecognised argument to -mcpu option '%s'"), arg);
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as_fatal (_("unrecognised argument to -mcpu option '%s'"), arg);
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return 1;
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return 1;
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case OPTION_RELAX:
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case OPTION_RELAX:
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msp430_enable_relax = 1;
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msp430_enable_relax = 1;
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return 1;
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return 1;
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@ -2137,27 +2141,85 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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or
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or
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.b @r2+, 5(R1). */
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.b @r2+, 5(R1). */
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/* Check if byte or word operation. */
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byte_op = 0;
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if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
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addr_op = FALSE;
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if (*line == '.')
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{
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{
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bin |= BYTE_OPERATION;
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bfd_boolean check = FALSE;
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byte_op = 1;
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++ line;
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}
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else
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byte_op = 0;
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/* "Address" ops work on 20-bit values. */
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switch (TOLOWER (* line))
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if (*line == '.' && TOLOWER (*(line + 1)) == 'a')
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{
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case 'b':
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/* Byte operation. */
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bin |= BYTE_OPERATION;
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byte_op = 1;
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check = TRUE;
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break;
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case 'a':
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/* "Address" ops work on 20-bit values. */
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addr_op = TRUE;
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bin |= BYTE_OPERATION;
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check = TRUE;
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break;
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case 'w':
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/* Word operation - this is the default. */
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check = TRUE;
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break;
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case 0:
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case ' ':
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case '\n':
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case '\r':
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as_warn (_("no size modifier after period, .w assumed"));
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break;
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default:
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as_bad (_("unrecognised instruction size modifier .%c"),
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* line);
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return 0;
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}
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if (check)
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{
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++ line;
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}
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}
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if (*line && ! ISSPACE (*line))
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{
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{
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addr_op = TRUE;
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as_bad (_("junk found after instruction: %s.%s"),
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bin |= BYTE_OPERATION;
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opcode->name, line);
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return 0;
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}
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}
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else
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addr_op = FALSE;
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/* skip .[aAbwBW]. */
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/* Catch the case where the programmer has used a ".a" size modifier on an
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while (! ISSPACE (*line) && *line)
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instruction that does not support it. Look for an alternative extended
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line++;
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instruction that has the same name without the period. Eg: "add.a"
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becomes "adda". Although this not an officially supported way of
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specifing instruction aliases other MSP430 assemblers allow it. So we
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support it for compatibility purposes. */
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if (addr_op && opcode->fmt >= 0)
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{
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char * old_name = opcode->name;
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char real_name[32];
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sprintf (real_name, "%sa", old_name);
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opcode = hash_find (msp430_hash, real_name);
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if (opcode == NULL)
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{
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as_bad (_("instruction %s.a does not exist"), old_name);
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return 0;
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}
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#if 0 /* Enable for debugging. */
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as_warn ("treating %s.a as %s", old_name, real_name);
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#endif
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addr_op = FALSE;
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bin = opcode->bin_opcode;
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}
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if (opcode->fmt != -1
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if (opcode->fmt != -1
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&& opcode->insn_opnumb
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&& opcode->insn_opnumb
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@ -2252,7 +2314,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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insn_length = (extended_op ? 2 : 0) + 2 + (op1.ol * 2);
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insn_length = (extended_op ? 2 : 0) + 2 + (op1.ol * 2);
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frag = frag_more (insn_length);
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frag = frag_more (insn_length);
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where = frag - frag_now->fr_literal;
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where = frag - frag_now->fr_literal;
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if (extended_op)
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if (extended_op)
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{
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{
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if (!addr_op)
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if (!addr_op)
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@ -2263,7 +2325,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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as_bad (_("repeat instruction used with non-register mode instruction"));
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as_bad (_("repeat instruction used with non-register mode instruction"));
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extended &= ~ 0xf;
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extended &= ~ 0xf;
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}
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}
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if (op1.mode == OP_EXP)
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if (op1.mode == OP_EXP)
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{
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{
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if (op1.exp.X_op == O_constant)
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if (op1.exp.X_op == O_constant)
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@ -2276,7 +2338,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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fix_new_exp (frag_now, where, 6, &(op1.exp), FALSE,
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fix_new_exp (frag_now, where, 6, &(op1.exp), FALSE,
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BFD_RELOC_MSP430X_PCR20_EXT_SRC);
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BFD_RELOC_MSP430X_PCR20_EXT_SRC);
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}
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}
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/* Emit the extension word. */
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/* Emit the extension word. */
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bfd_putl16 (extended, frag);
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bfd_putl16 (extended, frag);
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frag += 2;
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frag += 2;
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@ -2344,7 +2406,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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if (target_is_430xv2 ()
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if (target_is_430xv2 ()
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&& op1.mode == OP_REG
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&& op1.mode == OP_REG
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&& op1.reg == 0
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&& op1.reg == 0
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&& (is_opcode ("rlax")
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&& (is_opcode ("rlax")
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|| is_opcode ("rlcx")
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|| is_opcode ("rlcx")
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|| is_opcode ("rla")
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|| is_opcode ("rla")
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@ -2353,7 +2415,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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as_bad (_("%s: attempt to rotate the PC register"), opcode->name);
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as_bad (_("%s: attempt to rotate the PC register"), opcode->name);
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return 0;
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return 0;
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}
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}
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if (extended_op)
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if (extended_op)
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{
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{
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if (!addr_op)
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if (!addr_op)
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@ -2364,7 +2426,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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as_bad (_("repeat instruction used with non-register mode instruction"));
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as_bad (_("repeat instruction used with non-register mode instruction"));
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extended &= ~ 0xf;
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extended &= ~ 0xf;
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}
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}
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if (op1.mode == OP_EXP)
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if (op1.mode == OP_EXP)
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{
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{
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if (op1.exp.X_op == O_constant)
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if (op1.exp.X_op == O_constant)
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@ -2483,7 +2545,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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else
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else
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{
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{
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where += 2;
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where += 2;
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bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
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bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
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if (op1.reg || (op1.reg == 0 && op1.am == 3))
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if (op1.reg || (op1.reg == 0 && op1.am == 3))
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@ -2554,7 +2616,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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bin |= 0x60 | op1.reg;
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bin |= 0x60 | op1.reg;
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else if (op1.am == 3)
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else if (op1.am == 3)
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bin |= 0x70 | op1.reg;
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bin |= 0x70 | op1.reg;
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bfd_putl16 ((bfd_vma) bin, frag);
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bfd_putl16 ((bfd_vma) bin, frag);
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if (op1.mode == OP_EXP)
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if (op1.mode == OP_EXP)
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@ -2756,7 +2818,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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where = frag - frag_now->fr_literal;
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where = frag - frag_now->fr_literal;
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bfd_putl16 ((bfd_vma) bin, frag);
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bfd_putl16 ((bfd_vma) bin, frag);
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dwarf2_emit_insn (op_length);
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dwarf2_emit_insn (op_length);
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}
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}
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break;
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break;
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}
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}
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@ -2835,7 +2897,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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dwarf2_emit_insn (op_length);
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dwarf2_emit_insn (op_length);
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break;
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break;
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}
|
}
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case 9: /* MOVA, BRA, RETA. */
|
case 9: /* MOVA, BRA, RETA. */
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imm_op = 0;
|
imm_op = 0;
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bin = opcode->bin_opcode;
|
bin = opcode->bin_opcode;
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|
@ -2871,7 +2933,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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res += msp430_dstoperand (&op2, l2, opcode->bin_opcode,
|
res += msp430_dstoperand (&op2, l2, opcode->bin_opcode,
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extended_op, TRUE);
|
extended_op, TRUE);
|
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}
|
}
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|
|
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if (res)
|
if (res)
|
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break; /* Error occurred. All warnings were done before. */
|
break; /* Error occurred. All warnings were done before. */
|
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}
|
}
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|
@ -2967,7 +3029,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||||
|
|
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frag = frag_more (insn_length);
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frag = frag_more (insn_length);
|
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where = frag - frag_now->fr_literal;
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where = frag - frag_now->fr_literal;
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|
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if (extended_op)
|
if (extended_op)
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{
|
{
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if (!addr_op)
|
if (!addr_op)
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|
@ -2992,7 +3054,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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fix_new_exp (frag_now, where, 6, &(op1.exp), FALSE,
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fix_new_exp (frag_now, where, 6, &(op1.exp), FALSE,
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BFD_RELOC_MSP430X_PCR20_EXT_SRC);
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BFD_RELOC_MSP430X_PCR20_EXT_SRC);
|
||||||
}
|
}
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||||||
|
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if (op2.mode == OP_EXP)
|
if (op2.mode == OP_EXP)
|
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{
|
{
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||||||
if (op2.exp.X_op == O_constant)
|
if (op2.exp.X_op == O_constant)
|
||||||
|
@ -3002,7 +3064,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
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||||||
fix_new_exp (frag_now, where, 8, &(op2.exp), FALSE,
|
fix_new_exp (frag_now, where, 8, &(op2.exp), FALSE,
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op2.reg ? BFD_RELOC_MSP430X_ABS20_EXT_ODST
|
op2.reg ? BFD_RELOC_MSP430X_ABS20_EXT_ODST
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: BFD_RELOC_MSP430X_PCR20_EXT_ODST);
|
: BFD_RELOC_MSP430X_PCR20_EXT_ODST);
|
||||||
|
|
||||||
else
|
else
|
||||||
fix_new_exp (frag_now, where, 6, &(op2.exp), FALSE,
|
fix_new_exp (frag_now, where, 6, &(op2.exp), FALSE,
|
||||||
op2.reg ? BFD_RELOC_MSP430X_ABS20_EXT_DST
|
op2.reg ? BFD_RELOC_MSP430X_ABS20_EXT_DST
|
||||||
|
@ -3104,7 +3166,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||||
|
|
||||||
if (target_is_430xv2 ()
|
if (target_is_430xv2 ()
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||||||
&& op1.mode == OP_REG
|
&& op1.mode == OP_REG
|
||||||
&& op1.reg == 0
|
&& op1.reg == 0
|
||||||
&& (is_opcode ("rrax")
|
&& (is_opcode ("rrax")
|
||||||
|| is_opcode ("rrcx")
|
|| is_opcode ("rrcx")
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||||||
|| is_opcode ("rra")
|
|| is_opcode ("rra")
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||||||
|
@ -3113,11 +3175,11 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||||
as_bad (_("%s: attempt to rotate the PC register"), opcode->name);
|
as_bad (_("%s: attempt to rotate the PC register"), opcode->name);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
insn_length = (extended_op ? 2 : 0) + 2 + (op1.ol * 2);
|
insn_length = (extended_op ? 2 : 0) + 2 + (op1.ol * 2);
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||||||
frag = frag_more (insn_length);
|
frag = frag_more (insn_length);
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||||||
where = frag - frag_now->fr_literal;
|
where = frag - frag_now->fr_literal;
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||||||
|
|
||||||
if (extended_op)
|
if (extended_op)
|
||||||
{
|
{
|
||||||
if (is_opcode ("swpbx") || is_opcode ("sxtx"))
|
if (is_opcode ("swpbx") || is_opcode ("sxtx"))
|
||||||
|
@ -3148,7 +3210,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||||
{
|
{
|
||||||
if (op1.exp.X_op == O_constant)
|
if (op1.exp.X_op == O_constant)
|
||||||
extended |= ((op1.exp.X_add_number >> 16) & 0xf) << 7;
|
extended |= ((op1.exp.X_add_number >> 16) & 0xf) << 7;
|
||||||
|
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||||||
else if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
|
else if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
|
||||||
fix_new_exp (frag_now, where, 6, &(op1.exp), FALSE,
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fix_new_exp (frag_now, where, 6, &(op1.exp), FALSE,
|
||||||
BFD_RELOC_MSP430X_ABS20_EXT_SRC);
|
BFD_RELOC_MSP430X_ABS20_EXT_SRC);
|
||||||
|
@ -3156,7 +3218,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line)
|
||||||
fix_new_exp (frag_now, where, 6, &(op1.exp), FALSE,
|
fix_new_exp (frag_now, where, 6, &(op1.exp), FALSE,
|
||||||
BFD_RELOC_MSP430X_PCR20_EXT_SRC);
|
BFD_RELOC_MSP430X_PCR20_EXT_SRC);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Emit the extension word. */
|
/* Emit the extension word. */
|
||||||
bfd_putl16 (extended, frag);
|
bfd_putl16 (extended, frag);
|
||||||
frag += 2;
|
frag += 2;
|
||||||
|
@ -3519,12 +3581,12 @@ md_apply_fix (fixS * fixp, valueT * valuep, segT seg)
|
||||||
|
|
||||||
fixp->fx_no_overflow = 1;
|
fixp->fx_no_overflow = 1;
|
||||||
|
|
||||||
/* If polymorphs are enabled and relax disabled.
|
/* If polymorphs are enabled and relax disabled.
|
||||||
do not kill any relocs and pass them to linker. */
|
do not kill any relocs and pass them to linker. */
|
||||||
if (msp430_enable_polys
|
if (msp430_enable_polys
|
||||||
&& !msp430_enable_relax)
|
&& !msp430_enable_relax)
|
||||||
{
|
{
|
||||||
if (!fixp->fx_addsy || (fixp->fx_addsy
|
if (!fixp->fx_addsy || (fixp->fx_addsy
|
||||||
&& S_GET_SEGMENT (fixp->fx_addsy) == absolute_section))
|
&& S_GET_SEGMENT (fixp->fx_addsy) == absolute_section))
|
||||||
fixp->fx_done = 1; /* It is ok to kill 'abs' reloc. */
|
fixp->fx_done = 1; /* It is ok to kill 'abs' reloc. */
|
||||||
else
|
else
|
||||||
|
@ -3593,13 +3655,13 @@ md_apply_fix (fixS * fixp, valueT * valuep, segT seg)
|
||||||
case BFD_RELOC_MSP430X_ABS20_EXT_SRC:
|
case BFD_RELOC_MSP430X_ABS20_EXT_SRC:
|
||||||
case BFD_RELOC_MSP430X_PCR20_EXT_SRC:
|
case BFD_RELOC_MSP430X_PCR20_EXT_SRC:
|
||||||
bfd_putl16 ((bfd_vma) (value & 0xffff), where + 4);
|
bfd_putl16 ((bfd_vma) (value & 0xffff), where + 4);
|
||||||
value >>= 16;
|
value >>= 16;
|
||||||
bfd_putl16 ((bfd_vma) (((value & 0xf) << 7) | insn), where);
|
bfd_putl16 ((bfd_vma) (((value & 0xf) << 7) | insn), where);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case BFD_RELOC_MSP430X_ABS20_ADR_SRC:
|
case BFD_RELOC_MSP430X_ABS20_ADR_SRC:
|
||||||
bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
|
bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
|
||||||
value >>= 16;
|
value >>= 16;
|
||||||
bfd_putl16 ((bfd_vma) (((value & 0xf) << 8) | insn), where);
|
bfd_putl16 ((bfd_vma) (((value & 0xf) << 8) | insn), where);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
@ -3633,7 +3695,7 @@ md_apply_fix (fixS * fixp, valueT * valuep, segT seg)
|
||||||
value >>= 16;
|
value >>= 16;
|
||||||
bfd_putl16 ((bfd_vma) ((value & 0xf) | insn), where);
|
bfd_putl16 ((bfd_vma) ((value & 0xf) | insn), where);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
as_fatal (_("line %d: unknown relocation type: 0x%x"),
|
as_fatal (_("line %d: unknown relocation type: 0x%x"),
|
||||||
fixp->fx_line, fixp->fx_r_type);
|
fixp->fx_line, fixp->fx_r_type);
|
||||||
|
@ -3656,7 +3718,7 @@ S_IS_GAS_LOCAL (symbolS * s)
|
||||||
return FALSE;
|
return FALSE;
|
||||||
name = S_GET_NAME (s);
|
name = S_GET_NAME (s);
|
||||||
len = strlen (name) - 1;
|
len = strlen (name) - 1;
|
||||||
|
|
||||||
return name[len] == 1 || name[len] == 2;
|
return name[len] == 1 || name[len] == 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3745,7 +3807,7 @@ tc_gen_reloc (asection * seg ATTRIBUTE_UNUSED, fixS * fixp)
|
||||||
*reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
|
*reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
|
||||||
}
|
}
|
||||||
|
|
||||||
reloc->addend = fixp->fx_offset;
|
reloc->addend = fixp->fx_offset;
|
||||||
if (asec == absolute_section)
|
if (asec == absolute_section)
|
||||||
{
|
{
|
||||||
reloc->addend += S_GET_VALUE (fixp->fx_addsy);
|
reloc->addend += S_GET_VALUE (fixp->fx_addsy);
|
||||||
|
@ -4045,7 +4107,7 @@ msp430_relax_frag (segT seg ATTRIBUTE_UNUSED, fragS * fragP,
|
||||||
by setting 'aim' to quite high value. */
|
by setting 'aim' to quite high value. */
|
||||||
aim = 0x7fff;
|
aim = 0x7fff;
|
||||||
}
|
}
|
||||||
|
|
||||||
this_state = fragP->fr_subtype;
|
this_state = fragP->fr_subtype;
|
||||||
start_type = this_type = table + this_state;
|
start_type = this_type = table + this_state;
|
||||||
|
|
||||||
|
@ -4095,7 +4157,7 @@ msp430_fix_adjustable (struct fix *fixp ATTRIBUTE_UNUSED)
|
||||||
if (fixp->fx_addsy
|
if (fixp->fx_addsy
|
||||||
&& ((S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE) == 0))
|
&& ((S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE) == 0))
|
||||||
return TRUE;
|
return TRUE;
|
||||||
|
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,3 +1,13 @@
|
||||||
|
2013-10-08 Nick Clifton <nickc@redhat.com>
|
||||||
|
|
||||||
|
* gas/msp430/bad.s: New test: Checks erroneous size extensions.
|
||||||
|
* gas/msp430/bad.d: New test command file.
|
||||||
|
* gas/msp430/bad.l: New file: Expected error messages.
|
||||||
|
* gas/msp430/msp430.exp: Run the new test.
|
||||||
|
* gas/msp430/msp430x.s: Add "<foo>.a" aliases of "<foo>a"
|
||||||
|
instructions.
|
||||||
|
* gas/msp430/msp430x.d: Update expected disassembly.
|
||||||
|
|
||||||
2013-10-07 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
|
2013-10-07 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
|
||||||
|
|
||||||
* gas/mips/micromips@virt64.d: Fix dmfgc0 and dmtgc0.
|
* gas/mips/micromips@virt64.d: Fix dmfgc0 and dmtgc0.
|
||||||
|
|
|
@ -0,0 +1,3 @@
|
||||||
|
#name: Diagnostics Quality
|
||||||
|
#source: bad.s
|
||||||
|
#error-output: bad.l
|
|
@ -0,0 +1,7 @@
|
||||||
|
[^:]*: Assembler messages:
|
||||||
|
[^:]*:6: Error: unrecognised instruction size modifier .z
|
||||||
|
[^:]*:7: Error: junk found after instruction: mov.bc r1,r2
|
||||||
|
[^:]*:8: Error: junk found after instruction: mov.cd r1,r2
|
||||||
|
[^:]*:9: Error: junk found after instruction: mov.cd r1,r2
|
||||||
|
[^:]*:10: Warning: no size modifier after period, .w assumed
|
||||||
|
[^:]*:11: Error: instruction bis.a does not exist
|
|
@ -0,0 +1,13 @@
|
||||||
|
.text
|
||||||
|
.cpu 430x
|
||||||
|
|
||||||
|
;;; Test for the assembler detecting spurious size modifiers.
|
||||||
|
|
||||||
|
mov.z r1, r2
|
||||||
|
mov.abc r1, r2
|
||||||
|
mov.bcd r1, r2
|
||||||
|
mov.wcd r1, r2
|
||||||
|
mov. r1, r2
|
||||||
|
bis.a #8, r2
|
||||||
|
|
||||||
|
;;; FIXME: Add more tests of assembler error detection here.
|
|
@ -21,4 +21,5 @@
|
||||||
if [expr [istarget "msp430-*-*"]] then {
|
if [expr [istarget "msp430-*-*"]] then {
|
||||||
run_dump_test "opcode"
|
run_dump_test "opcode"
|
||||||
run_dump_test "msp430x"
|
run_dump_test "msp430x"
|
||||||
|
run_dump_test "bad"
|
||||||
}
|
}
|
||||||
|
|
|
@ -214,3 +214,14 @@ Disassembly of section .text:
|
||||||
0+03c8 <[^>]*> 40 18 82 11 sxtx.w r2 ;
|
0+03c8 <[^>]*> 40 18 82 11 sxtx.w r2 ;
|
||||||
0+03cc <[^>]*> 04 18 45 11 rpt #5 \{ rrax.a r5 ;
|
0+03cc <[^>]*> 04 18 45 11 rpt #5 \{ rrax.a r5 ;
|
||||||
0+03d0 <[^>]*> 85 18 45 11 rpt r5 \{ rrax.a r5 ;
|
0+03d0 <[^>]*> 85 18 45 11 rpt r5 \{ rrax.a r5 ;
|
||||||
|
0+03d4 <[^>]*> e2 01 adda r1, r2 ;
|
||||||
|
0+03d6 <[^>]*> c0 01 mova r1, r0 ;
|
||||||
|
0+03d8 <[^>]*> 41 13 calla r1 ;
|
||||||
|
0+03da <[^>]*> 40 18 01 43 clrx.w r1 ;
|
||||||
|
0+03de <[^>]*> d2 01 cmpa r1, r2 ;
|
||||||
|
0+03e0 <[^>]*> 40 18 21 83 decdx.w r1 ;
|
||||||
|
0+03e4 <[^>]*> 40 18 21 53 incdx.w r1 ;
|
||||||
|
0+03e8 <[^>]*> c2 01 mova r1, r2 ;
|
||||||
|
0+03ea <[^>]*> 10 01 reta ;
|
||||||
|
0+03ec <[^>]*> f2 01 suba r1, r2 ;
|
||||||
|
0+03ee <[^>]*> 40 18 80 93 00 00 cmpx.w #0, 0x0000 ;r3 As==00, PC rel. 0x03f2
|
||||||
|
|
|
@ -259,3 +259,19 @@ foo:
|
||||||
rrax.a r5
|
rrax.a r5
|
||||||
rpt r5
|
rpt r5
|
||||||
rrax.a r5
|
rrax.a r5
|
||||||
|
|
||||||
|
;; The following are all aliases for similarly named instructions
|
||||||
|
;; without the period. Eg: add.a -> adda
|
||||||
|
add.a r1, r2
|
||||||
|
br.a r1
|
||||||
|
call.a r1
|
||||||
|
clr.a r1
|
||||||
|
cmp.a r1, r2
|
||||||
|
decd.a r1
|
||||||
|
incd.a r1
|
||||||
|
mov.a r1, r2
|
||||||
|
ret.a
|
||||||
|
sub.a r1, r2
|
||||||
|
tst.a fooz
|
||||||
|
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue