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x86: use correct register names 

VEX.W may be legitimately set (and is then ignored by the CPU) for
non-64-bit code. Don't print 64-bit register names in such a case, by
utilizing that REX_W would never be set for non-64-bit code, and that
it is being set from VEX.W by generic decoding.

A test for this is going to be introduced in the next patch of this
series.
This commit is contained in:
Jan Beulich 2017-11-15 08:52:05 +01:00 committed by Jan Beulich
parent 3a2430e05b
commit 390a67891e
5 changed files with 35 additions and 3 deletions
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6
gas/ChangeLog
View File

@ -1,3 +1,9 @@
2017-11-15 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/noextreg.s: Add tests for VEX-encoded GPR
insns with VEX.W set.
* testsuite/gas/i386/noextreg.d: Adjust expectations.
2017-11-15 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/noextreg.{s,d}: New.

6
gas/testsuite/gas/i386/noextreg.d
View File

@ -6,6 +6,12 @@
Disassembly of section .text:
0+ <ix86>:
[ ]*[a-f0-9]+: c4 e2 78 f2 00 andn \(%eax\),%eax,%eax
[ ]*[a-f0-9]+: c4 e2 f8 f2 00 andn \(%eax\),%eax,%eax
[ ]*[a-f0-9]+: 8f e9 78 01 20 tzmsk \(%eax\),%eax
[ ]*[a-f0-9]+: 8f e9 f8 01 20 tzmsk \(%eax\),%eax
[ ]*[a-f0-9]+: 8f e9 78 12 c0 llwpcb %eax
[ ]*[a-f0-9]+: 8f e9 f8 12 c0 llwpcb %eax
[ ]*[a-f0-9]+: c4 e3 79 68 00 00 vfmaddps %xmm0,\(%eax\),%xmm0,%xmm0
[ ]*[a-f0-9]+: c4 e3 79 68 00 0f vfmaddps %xmm0,\(%eax\),%xmm0,%xmm0
[ ]*[a-f0-9]+: c3 ret[ ]*

15
gas/testsuite/gas/i386/noextreg.s
View File

@ -1,6 +1,21 @@
.intel_syntax noprefix
.text
ix86:
andn eax, eax, [eax]
.code64
andn rax, rax, [rax]
.code32
tzmsk eax, [eax]
.code64
tzmsk rax, [rax]
.code32
llwpcb eax
.code64
llwpcb rax
.code32
vfmaddps xmm0, xmm0, [eax], xmm0
.byte 0xc4, 0xe3, 0x79, 0x68, 0x00, 0x0f # vfmaddps xmm0, xmm0, [eax], xmm0

5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2017-11-15 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (OP_VEX, OP_LWPCB_E, OP_LWP_E): Use rex to
determine GPR register set.
2017-11-15 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (VEXI4_Fixup, VexI4): Delete.

6
opcodes/i386-dis.c
View File

@ -17122,7 +17122,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
names = names_xmm;
break;
case dq_mode:
if (vex.w)
if (rex & REX_W)
names = names64;
else
names = names32;
@ -17758,7 +17758,7 @@ OP_LWPCB_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
MODRM_CHECK;
codep++;
if (vex.w)
if (rex & REX_W)
names = names64;
else
names = names32;
@ -17776,7 +17776,7 @@ OP_LWP_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
const char **names;
if (vex.w)
if (rex & REX_W)
names = names64;
else
names = names32;