* config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
(append_insn): Use it. (md_apply_fix): Whitespace formatting. (md_begin, append_insn, macro, macro2, mips16_immed, mips_align, mips16_extended_frag): Remove register specifier. (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric constants.
This commit is contained in:
parent
a31ea83d26
commit
3994f87e99
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@ -1,3 +1,13 @@
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2006-06-22 Thiemo Seufer <ths@mips.com>
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* config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
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(append_insn): Use it.
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(md_apply_fix): Whitespace formatting.
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(md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
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mips16_extended_frag): Remove register specifier.
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(md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
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constants.
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2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
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* config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
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@ -260,6 +260,11 @@ static int file_mips_isa = ISA_UNKNOWN;
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command line (e.g., by -march). */
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static int file_ase_mips16;
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#define ISA_SUPPORTS_MIPS16E (mips_opts.isa == ISA_MIPS32 \
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|| mips_opts.isa == ISA_MIPS32R2 \
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|| mips_opts.isa == ISA_MIPS64 \
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|| mips_opts.isa == ISA_MIPS64R2)
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/* True if -mips3d was passed or implied by arguments passed on the
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command line (e.g., by -march). */
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static int file_ase_mips3d;
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@ -1715,7 +1720,7 @@ reg_lookup (char **s, unsigned int types, unsigned int *regnop)
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void
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md_begin (void)
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{
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register const char *retval = NULL;
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const char *retval = NULL;
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int i = 0;
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int broken = 0;
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@ -2475,7 +2480,7 @@ static void
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append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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bfd_reloc_code_real_type *reloc_type)
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{
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register unsigned long prev_pinfo, pinfo;
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unsigned long prev_pinfo, pinfo;
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relax_stateT prev_insn_frag_type = 0;
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bfd_boolean relaxed_branch = FALSE;
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@ -3001,10 +3006,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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if (mips_opts.mips16
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&& (pinfo & INSN_UNCOND_BRANCH_DELAY)
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&& (pinfo & (MIPS16_INSN_READ_X | MIPS16_INSN_READ_31))
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&& (mips_opts.isa == ISA_MIPS32
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|| mips_opts.isa == ISA_MIPS32R2
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|| mips_opts.isa == ISA_MIPS64
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|| mips_opts.isa == ISA_MIPS64R2))
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&& ISA_SUPPORTS_MIPS16E)
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{
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/* Convert MIPS16 jr/jalr into a "compact" jump. */
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ip->insn_opcode |= 0x0080;
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@ -4455,7 +4457,7 @@ add_got_offset_hilo (int dest, expressionS *local, int tmp)
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static void
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macro (struct mips_cl_insn *ip)
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{
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register int treg, sreg, dreg, breg;
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int treg, sreg, dreg, breg;
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int tempreg;
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int mask;
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int used_at = 0;
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@ -7059,7 +7061,7 @@ macro (struct mips_cl_insn *ip)
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static void
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macro2 (struct mips_cl_insn *ip)
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{
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register int treg, sreg, dreg, breg;
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int treg, sreg, dreg, breg;
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int tempreg;
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int mask;
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int used_at;
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@ -10373,7 +10375,7 @@ mips16_immed (char *file, unsigned int line, int type, offsetT val,
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unsigned long *insn, bfd_boolean *use_extend,
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unsigned short *extend)
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{
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register const struct mips16_immed_operand *op;
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const struct mips16_immed_operand *op;
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int mintiny, maxtiny;
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bfd_boolean needext;
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@ -11695,7 +11697,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where);
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assert (! fixP->fx_pcrel || fixP->fx_r_type == BFD_RELOC_16_PCREL_S2);
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assert (!fixP->fx_pcrel || fixP->fx_r_type == BFD_RELOC_16_PCREL_S2);
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/* Don't treat parts of a composite relocation as done. There are two
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reasons for this:
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@ -11707,7 +11709,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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constants. The easiest way of dealing with the pathological
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exceptions is to generate a relocation against STN_UNDEF and
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leave everything up to the linker. */
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if (fixP->fx_addsy == NULL && ! fixP->fx_pcrel && fixP->fx_tcbit == 0)
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if (fixP->fx_addsy == NULL && !fixP->fx_pcrel && fixP->fx_tcbit == 0)
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fixP->fx_done = 1;
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switch (fixP->fx_r_type)
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@ -11931,8 +11933,8 @@ mips_align (int to, int fill, symbolS *label)
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static void
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s_align (int x ATTRIBUTE_UNUSED)
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{
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register int temp;
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register long temp_fill;
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int temp;
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long temp_fill;
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long max_alignment = 15;
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/*
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@ -13157,7 +13159,7 @@ static int
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mips16_extended_frag (fragS *fragp, asection *sec, long stretch)
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{
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int type;
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register const struct mips16_immed_operand *op;
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const struct mips16_immed_operand *op;
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offsetT val;
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int mintiny, maxtiny;
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segT symsec;
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@ -13627,7 +13629,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
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exp.X_add_number = fragp->fr_offset;
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fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal,
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4, &exp, 1, BFD_RELOC_16_PCREL_S2);
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4, &exp, TRUE, BFD_RELOC_16_PCREL_S2);
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fixp->fx_file = fragp->fr_file;
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fixp->fx_line = fragp->fr_line;
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@ -13744,7 +13746,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
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exp.X_add_number = fragp->fr_offset;
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fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal,
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4, &exp, 0, BFD_RELOC_MIPS_JMP);
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4, &exp, FALSE, BFD_RELOC_MIPS_JMP);
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fixp->fx_file = fragp->fr_file;
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fixp->fx_line = fragp->fr_line;
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@ -13766,7 +13768,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
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}
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fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal,
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4, &exp, 0, BFD_RELOC_MIPS_GOT16);
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4, &exp, FALSE, BFD_RELOC_MIPS_GOT16);
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fixp->fx_file = fragp->fr_file;
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fixp->fx_line = fragp->fr_line;
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insn = HAVE_64BIT_ADDRESSES ? 0x64210000 : 0x24210000;
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fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal,
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4, &exp, 0, BFD_RELOC_LO16);
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4, &exp, FALSE, BFD_RELOC_LO16);
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fixp->fx_file = fragp->fr_file;
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fixp->fx_line = fragp->fr_line;
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@ -13813,7 +13815,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
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if (RELAX_MIPS16_P (fragp->fr_subtype))
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{
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int type;
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register const struct mips16_immed_operand *op;
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const struct mips16_immed_operand *op;
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bfd_boolean small, ext;
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offsetT val;
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bfd_byte *buf;
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