2010-02-09 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New. (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES. (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
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@ -1,3 +1,9 @@
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2010-02-09 Sterling Augustine <sterling@tensilica.com>
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* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
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(next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
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(xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
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2010-02-08 Christophe Lyon <christophe.lyon@st.com>
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2010-02-08 Christophe Lyon <christophe.lyon@st.com>
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* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
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* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
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@ -4649,6 +4649,12 @@ next_frag_is_loop_target (const fragS *fragP)
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}
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}
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/* As specified in the relaxation table, when a loop instruction is
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relaxed, there are 24 bytes between the loop instruction itself and
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the first instruction in the loop. */
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#define RELAXED_LOOP_INSN_BYTES 24
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static addressT
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static addressT
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next_frag_pre_opcode_bytes (const fragS *fragp)
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next_frag_pre_opcode_bytes (const fragS *fragp)
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{
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{
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@ -4671,7 +4677,7 @@ next_frag_pre_opcode_bytes (const fragS *fragp)
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been relaxed. Note that we can assume that the LOOP
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been relaxed. Note that we can assume that the LOOP
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instruction is in slot 0 because loops aren't bundleable. */
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instruction is in slot 0 because loops aren't bundleable. */
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if (next_fragp->tc_frag_data.slot_subtypes[0] > RELAX_IMMED)
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if (next_fragp->tc_frag_data.slot_subtypes[0] > RELAX_IMMED)
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return get_expanded_loop_offset (next_opcode);
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return get_expanded_loop_offset (next_opcode) + RELAXED_LOOP_INSN_BYTES;
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return 0;
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return 0;
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}
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}
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@ -7401,9 +7407,36 @@ xtensa_mark_zcl_first_insns (void)
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|| fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE))
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|| fragP->fr_subtype == RELAX_CHECK_ALIGN_NEXT_OPCODE))
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{
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{
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/* Find the loop frag. */
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/* Find the loop frag. */
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fragS *targ_frag = next_non_empty_frag (fragP);
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fragS *loop_frag = next_non_empty_frag (fragP);
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/* Find the first insn frag. */
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/* Find the first insn frag. */
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targ_frag = next_non_empty_frag (targ_frag);
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fragS *targ_frag = next_non_empty_frag (loop_frag);
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/* Handle a corner case that comes up in hardware
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diagnostics. The original assembly looks like this:
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loop aX, LabelA
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<empty_frag>--not found by next_non_empty_frag
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loop aY, LabelB
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Depending on the start address, the assembler may or
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may not change it to look something like this:
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loop aX, LabelA
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nop--frag isn't empty anymore
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loop aY, LabelB
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So set up to check the alignment of the nop if it
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exists */
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while (loop_frag != targ_frag)
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{
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if (loop_frag->fr_type == rs_machine_dependent
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&& (loop_frag->fr_subtype == RELAX_ALIGN_NEXT_OPCODE
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|| loop_frag->fr_subtype
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== RELAX_CHECK_ALIGN_NEXT_OPCODE))
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targ_frag = loop_frag;
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else
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loop_frag = loop_frag->fr_next;
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}
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/* Of course, sometimes (mostly for toy test cases) a
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/* Of course, sometimes (mostly for toy test cases) a
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zero-cost loop instruction is the last in a section. */
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zero-cost loop instruction is the last in a section. */
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