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2009-12-09 Yoshinori Sato <ysato@users.sourceforge.jp> 

* compile.c(fetch_1): Fix pre-dec, pre-inc, post-dec and post-inc.
	Index registers not masked memory areas.
	Only simply increment or decrement.
	* compile.c(store_1): Ditto.
This commit is contained in:
Yoshinori Sato 2009-12-09 05:32:16 +00:00
parent 4f7872716e
commit 3a6c31f95c
2 changed files with 42 additions and 42 deletions
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6
sim/h8300/ChangeLog
View File

@ -1,3 +1,9 @@
2009-12-09 Yoshinori Sato <ysato@users.sourceforge.jp>
* compile.c(fetch_1): Fix pre-dec, pre-inc, post-dec and post-inc.
Index registers not masked memory areas.
Only simply increment or decrement.
* compile.c(store_1): Ditto.
2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* config.in: Regenerate.

78
sim/h8300/compile.c
View File

@ -1386,105 +1386,93 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
break;
case X (OP_POSTINC, SB): /* Register indirect w/post-incr: byte. */
t = GET_L_REG (rn);
t &= h8_get_mask (sd);
r = GET_MEMORY_B (t);
r = GET_MEMORY_B (t & h8_get_mask (sd));
if (!twice)
t += 1;
t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTINC, SW): /* Register indirect w/post-incr: word. */
t = GET_L_REG (rn);
t &= h8_get_mask (sd);
r = GET_MEMORY_W (t);
r = GET_MEMORY_W (t & h8_get_mask (sd));
if (!twice)
t += 2;
t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTINC, SL): /* Register indirect w/post-incr: long. */
t = GET_L_REG (rn);
t &= h8_get_mask (sd);
r = GET_MEMORY_L (t);
r = GET_MEMORY_L (t & h8_get_mask (sd));
if (!twice)
t += 4;
t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTDEC, SB): /* Register indirect w/post-decr: byte. */
t = GET_L_REG (rn);
t &= h8_get_mask (sd);
r = GET_MEMORY_B (t);
r = GET_MEMORY_B (t & h8_get_mask (sd));
if (!twice)
t -= 1;
t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTDEC, SW): /* Register indirect w/post-decr: word. */
t = GET_L_REG (rn);
t &= h8_get_mask (sd);
r = GET_MEMORY_W (t);
r = GET_MEMORY_W (t & h8_get_mask (sd));
if (!twice)
t -= 2;
t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_POSTDEC, SL): /* Register indirect w/post-decr: long. */
t = GET_L_REG (rn);
t &= h8_get_mask (sd);
r = GET_MEMORY_L (t);
r = GET_MEMORY_L (t & h8_get_mask (sd));
if (!twice)
t -= 4;
t = t & h8_get_mask (sd);
SET_L_REG (rn, t);
*val = r;
break;
case X (OP_PREDEC, SB): /* Register indirect w/pre-decr: byte. */
t = GET_L_REG (rn) - 1;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
*val = GET_MEMORY_B (t);
break;
case X (OP_PREDEC, SW): /* Register indirect w/pre-decr: word. */
t = GET_L_REG (rn) - 2;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
*val = GET_MEMORY_W (t);
break;
case X (OP_PREDEC, SL): /* Register indirect w/pre-decr: long. */
t = GET_L_REG (rn) - 4;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
*val = GET_MEMORY_L (t);
break;
case X (OP_PREINC, SB): /* Register indirect w/pre-incr: byte. */
t = GET_L_REG (rn) + 1;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
*val = GET_MEMORY_B (t);
break;
case X (OP_PREINC, SW): /* Register indirect w/pre-incr: long. */
t = GET_L_REG (rn) + 2;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
*val = GET_MEMORY_W (t);
break;
case X (OP_PREINC, SL): /* Register indirect w/pre-incr: long. */
t = GET_L_REG (rn) + 4;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
*val = GET_MEMORY_L (t);
break;
@ -1621,8 +1609,8 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
t = GET_L_REG (rn);
if (!twice)
t -= 1;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
SET_MEMORY_B (t, n);
break;
@ -1630,8 +1618,8 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
t = GET_L_REG (rn);
if (!twice)
t -= 2;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
SET_MEMORY_W (t, n);
break;
@ -1639,8 +1627,8 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
t = GET_L_REG (rn);
if (!twice)
t -= 4;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
SET_MEMORY_L (t, n);
break;
@ -1648,8 +1636,8 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
t = GET_L_REG (rn);
if (!twice)
t += 1;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
SET_MEMORY_B (t, n);
break;
@ -1657,8 +1645,8 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
t = GET_L_REG (rn);
if (!twice)
t += 2;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
SET_MEMORY_W (t, n);
break;
@ -1666,45 +1654,51 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
t = GET_L_REG (rn);
if (!twice)
t += 4;
t &= h8_get_mask (sd);
SET_L_REG (rn, t);
t &= h8_get_mask (sd);
SET_MEMORY_L (t, n);
break;
case X (OP_POSTDEC, SB): /* Register indirect w/post-decr, byte. */
t = GET_L_REG (rn) & h8_get_mask (sd);
SET_MEMORY_B (t, n);
t = GET_L_REG (rn);
SET_L_REG (rn, t - 1);
t &= h8_get_mask (sd);
SET_MEMORY_B (t, n);
break;
case X (OP_POSTDEC, SW): /* Register indirect w/post-decr, word. */
t = GET_L_REG (rn) & h8_get_mask (sd);
SET_MEMORY_W (t, n);
t = GET_L_REG (rn);
SET_L_REG (rn, t - 2);
t &= h8_get_mask (sd);
SET_MEMORY_W (t, n);
break;
case X (OP_POSTDEC, SL): /* Register indirect w/post-decr, long. */
t = GET_L_REG (rn) & h8_get_mask (sd);
SET_MEMORY_L (t, n);
t = GET_L_REG (rn);
SET_L_REG (rn, t - 4);
t &= h8_get_mask (sd);
SET_MEMORY_L (t, n);
break;
case X (OP_POSTINC, SB): /* Register indirect w/post-incr, byte. */
t = GET_L_REG (rn) & h8_get_mask (sd);
SET_MEMORY_B (t, n);
t = GET_L_REG (rn);
SET_L_REG (rn, t + 1);
t &= h8_get_mask (sd);
SET_MEMORY_B (t, n);
break;
case X (OP_POSTINC, SW): /* Register indirect w/post-incr, word. */
t = GET_L_REG (rn) & h8_get_mask (sd);
SET_MEMORY_W (t, n);
t = GET_L_REG (rn);
SET_L_REG (rn, t + 2);
t &= h8_get_mask (sd);
SET_MEMORY_W (t, n);
break;
case X (OP_POSTINC, SL): /* Register indirect w/post-incr, long. */
t = GET_L_REG (rn) & h8_get_mask (sd);
SET_MEMORY_L (t, n);
t = GET_L_REG (rn);
SET_L_REG (rn, t + 4);
t &= h8_get_mask (sd);
SET_MEMORY_L (t, n);
break;
case X (OP_DISP, SB): /* Register indirect w/displacement, byte. */