RISC-V: Don't allow unaligned breakpoints.
Some hardware doesn't support unaligned accesses, and a bare metal target may not have an unaligned access trap handler. So if the PC is 2-byte aligned, then use a 2-byte breakpoint to avoid unaligned accesses. Tested on native RV64GC Linux with gdb testsuite and cross on spike simulator and openocd with riscv-tests/debug. gdb/ * riscv-tdep.c (riscv_breakpoint_kind_from_pc): New local unaligned_p. Set if pcptr if unaligned. Return 2 if unaligned_p true. Update debugging messages.
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2018-11-01 Jim Wilson <jimw@sifive.com>
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* riscv-tdep.c (riscv_breakpoint_kind_from_pc): New local unaligned_p.
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Set if pcptr if unaligned. Return 2 if unaligned_p true. Update
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debugging messages.
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2018-11-01 Joel Brobecker <brobecker@adacore.com>
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* ada-lang.c (ada_watch_location_expression): New function.
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@ -415,18 +415,34 @@ riscv_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
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{
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if (use_compressed_breakpoints == AUTO_BOOLEAN_AUTO)
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{
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bool unaligned_p = false;
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gdb_byte buf[1];
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/* Some targets don't support unaligned reads. The address can only
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be unaligned if the C extension is supported. So it is safe to
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use a compressed breakpoint in this case. */
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if (*pcptr & 0x2)
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unaligned_p = true;
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else
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{
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/* Read the opcode byte to determine the instruction length. */
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read_code (*pcptr, buf, 1);
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}
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if (riscv_debug_breakpoints)
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fprintf_unfiltered
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(gdb_stdlog,
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"Using %s for breakpoint at %s (instruction length %d)\n",
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riscv_insn_length (buf[0]) == 2 ? "C.EBREAK" : "EBREAK",
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paddress (gdbarch, *pcptr), riscv_insn_length (buf[0]));
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if (riscv_insn_length (buf[0]) == 2)
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{
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const char *bp = (unaligned_p || riscv_insn_length (buf[0]) == 2
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? "C.EBREAK" : "EBREAK");
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fprintf_unfiltered (gdb_stdlog, "Using %s for breakpoint at %s ",
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bp, paddress (gdbarch, *pcptr));
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if (unaligned_p)
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fprintf_unfiltered (gdb_stdlog, "(unaligned address)\n");
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else
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fprintf_unfiltered (gdb_stdlog, "(instruction length %d)\n",
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riscv_insn_length (buf[0]));
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}
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if (unaligned_p || riscv_insn_length (buf[0]) == 2)
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return 2;
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else
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return 4;
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