2007-10-23 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
* mips-tdep.c (LL_OPCODE, LLD_OPCODE, SC_OPCODE, SCD_OPCODE): Define. (deal_with_atomic_sequence): New. (mips_software_single_step): Use it.
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@ -1,3 +1,9 @@
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2007-10-23 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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* mips-tdep.c (LL_OPCODE, LLD_OPCODE, SC_OPCODE, SCD_OPCODE): Define.
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(deal_with_atomic_sequence): New.
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(mips_software_single_step): Use it.
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2007-10-23 Daniel Jacobowitz <dan@codesourcery.com>
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2007-10-23 Daniel Jacobowitz <dan@codesourcery.com>
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PR gdb/2336
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PR gdb/2336
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108
gdb/mips-tdep.c
108
gdb/mips-tdep.c
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@ -2297,6 +2297,111 @@ mips_addr_bits_remove (CORE_ADDR addr)
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return addr;
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return addr;
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}
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}
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/* Instructions used during single-stepping of atomic sequences. */
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#define LL_OPCODE 0x30
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#define LLD_OPCODE 0x34
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#define SC_OPCODE 0x38
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#define SCD_OPCODE 0x3c
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/* Checks for an atomic sequence of instructions beginning with a LL/LLD
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instruction and ending with a SC/SCD instruction. If such a sequence
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is found, attempt to step through it. A breakpoint is placed at the end of
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the sequence. */
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static int
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deal_with_atomic_sequence (CORE_ADDR pc)
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{
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CORE_ADDR breaks[2] = {-1, -1};
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CORE_ADDR loc = pc;
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CORE_ADDR branch_bp; /* Breakpoint at branch instruction's destination. */
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unsigned long insn;
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int insn_count;
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int index;
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int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
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const int atomic_sequence_length = 16; /* Instruction sequence length. */
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if (pc & 0x01)
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return 0;
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insn = mips_fetch_instruction (loc);
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/* Assume all atomic sequences start with a ll/lld instruction. */
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if (itype_op (insn) != LL_OPCODE && itype_op (insn) != LLD_OPCODE)
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return 0;
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/* Assume that no atomic sequence is longer than "atomic_sequence_length"
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instructions. */
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for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
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{
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int is_branch = 0;
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loc += MIPS_INSN32_SIZE;
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insn = mips_fetch_instruction (loc);
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/* Assume that there is at most one branch in the atomic
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sequence. If a branch is found, put a breakpoint in its
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destination address. */
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switch (itype_op (insn))
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{
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case 0: /* SPECIAL */
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if (rtype_funct (insn) >> 1 == 4) /* JR, JALR */
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return 0; /* fallback to the standard single-step code. */
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break;
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case 1: /* REGIMM */
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is_branch = ((itype_rt (insn) & 0xc0) == 0); /* B{LT,GE}Z* */
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break;
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case 2: /* J */
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case 3: /* JAL */
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return 0; /* fallback to the standard single-step code. */
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case 4: /* BEQ */
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case 5: /* BNE */
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case 6: /* BLEZ */
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case 7: /* BGTZ */
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case 20: /* BEQL */
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case 21: /* BNEL */
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case 22: /* BLEZL */
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case 23: /* BGTTL */
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is_branch = 1;
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break;
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case 17: /* COP1 */
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case 18: /* COP2 */
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case 19: /* COP3 */
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is_branch = (itype_rs (insn) == 8); /* BCzF, BCzFL, BCzT, BCzTL */
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break;
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}
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if (is_branch)
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{
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branch_bp = loc + mips32_relative_offset (insn) + 4;
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if (last_breakpoint >= 1)
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return 0; /* More than one branch found, fallback to the
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standard single-step code. */
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breaks[1] = branch_bp;
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last_breakpoint++;
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}
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if (itype_op (insn) == SC_OPCODE || itype_op (insn) == SCD_OPCODE)
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break;
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}
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/* Assume that the atomic sequence ends with a sc/scd instruction. */
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if (itype_op (insn) != SC_OPCODE && itype_op (insn) != SCD_OPCODE)
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return 0;
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loc += MIPS_INSN32_SIZE;
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/* Insert a breakpoint right after the end of the atomic sequence. */
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breaks[0] = loc;
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/* Check for duplicated breakpoints. Check also for a breakpoint
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placed (branch instruction's destination) in the atomic sequence */
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if (last_breakpoint && pc <= breaks[1] && breaks[1] <= breaks[0])
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last_breakpoint = 0;
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/* Effectively inserts the breakpoints. */
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for (index = 0; index <= last_breakpoint; index++)
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insert_single_step_breakpoint (breaks[index]);
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return 1;
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}
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/* mips_software_single_step() is called just before we want to resume
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/* mips_software_single_step() is called just before we want to resume
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the inferior, if we want to single-step it but there is no hardware
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the inferior, if we want to single-step it but there is no hardware
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or kernel single-step support (MIPS on GNU/Linux for example). We find
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or kernel single-step support (MIPS on GNU/Linux for example). We find
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@ -2308,6 +2413,9 @@ mips_software_single_step (struct frame_info *frame)
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CORE_ADDR pc, next_pc;
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CORE_ADDR pc, next_pc;
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pc = get_frame_pc (frame);
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pc = get_frame_pc (frame);
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if (deal_with_atomic_sequence (pc))
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return 1;
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next_pc = mips_next_pc (frame, pc);
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next_pc = mips_next_pc (frame, pc);
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insert_single_step_breakpoint (next_pc);
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insert_single_step_breakpoint (next_pc);
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