OpenE2K
/
binutils-gdb
12
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

* config/tc-arm.c (md_begin): Remove ARM_PLT32 reloc associated 

with the (PLT) instruction suffix when operating in eabi mode.
	* doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
	suffix.

	* gas/arm/pic.d: Update expected output.
This commit is contained in:
Nick Clifton 2011-11-02 11:13:59 +00:00
parent 89e208dbfe
commit 3da1d841a1
5 changed files with 28 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
gas/ChangeLog
View File

@ -1,3 +1,10 @@
2011-11-02 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (md_begin): Remove ARM_PLT32 reloc associated
with the (PLT) instruction suffix when operating in eabi mode.
* doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
suffix.
2011-11-01 DJ Delorie <dj@redhat.com> 2011-11-01 DJ Delorie <dj@redhat.com>
* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.

15
gas/config/tc-arm.c
View File

@ -32,7 +32,7 @@
#include "safe-ctype.h" #include "safe-ctype.h"
#include "subsegs.h" #include "subsegs.h"
#include "obstack.h" #include "obstack.h"
#include "libiberty.h"
#include "opcode/arm.h" #include "opcode/arm.h"
#ifdef OBJ_ELF #ifdef OBJ_ELF
@ -2054,6 +2054,7 @@ parse_neon_el_struct_list (char **str, unsigned *pbase,
arm_reloc_hsh contains no entries, so this function can only arm_reloc_hsh contains no entries, so this function can only
succeed if there is no () after the word. Returns -1 on error, succeed if there is no () after the word. Returns -1 on error,
BFD_RELOC_UNUSED if there wasn't any suffix. */ BFD_RELOC_UNUSED if there wasn't any suffix. */
static int static int
parse_reloc (char **str) parse_reloc (char **str)
{ {
@ -22420,8 +22421,16 @@ md_begin (void)
hash_insert (arm_barrier_opt_hsh, barrier_opt_names[i].template_name, hash_insert (arm_barrier_opt_hsh, barrier_opt_names[i].template_name,
(void *) (barrier_opt_names + i)); (void *) (barrier_opt_names + i));
#ifdef OBJ_ELF #ifdef OBJ_ELF
for (i = 0; i < sizeof (reloc_names) / sizeof (struct reloc_entry); i++) for (i = 0; i < ARRAY_SIZE (reloc_names); i++)
hash_insert (arm_reloc_hsh, reloc_names[i].name, (void *) (reloc_names + i)); {
struct reloc_entry * entry = reloc_names + i;
if (arm_is_eabi() && entry->reloc == BFD_RELOC_ARM_PLT32)
/* This makes encode_branch() use the EABI versions of this relocation. */
entry->reloc = BFD_RELOC_UNUSED;
hash_insert (arm_reloc_hsh, entry->name, (void *) entry);
}
#endif #endif
set_constant_flonums (); set_constant_flonums ();

6
gas/doc/c-arm.texi
View File

@ -493,8 +493,10 @@ and
@code{TPOFF}. @code{TPOFF}.
For compatibility with older toolchains the assembler also accepts For compatibility with older toolchains the assembler also accepts
@code{(PLT)} after branch targets. This will generate the deprecated @code{(PLT)} after branch targets. On legacy targets this will
@samp{R_ARM_PLT32} relocation. generate the deprecated @samp{R_ARM_PLT32} relocation. On EABI
targets it will encode either the @samp{R_ARM_CALL} or
@samp{R_ARM_JUMP24} relocation, as appropriate.
@cindex MOVW and MOVT relocations, ARM @cindex MOVW and MOVT relocations, ARM
Relocations for @samp{MOVW} and @samp{MOVT} instructions can be generated Relocations for @samp{MOVW} and @samp{MOVT} instructions can be generated

4
gas/testsuite/ChangeLog
View File

@ -1,3 +1,7 @@
2011-11-02 Nick Clifton <nickc@redhat.com>
* gas/arm/pic.d: Update expected output.
2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
* gas/epiphany: New directory. * gas/epiphany: New directory.

2
gas/testsuite/gas/arm/pic.d
View File

@ -13,7 +13,7 @@ Disassembly of section .text:
00+0 <[^>]*> eb...... bl 00+. <[^>]*> 00+0 <[^>]*> eb...... bl 00+. <[^>]*>
0: R_ARM_(PC24|CALL) foo.* 0: R_ARM_(PC24|CALL) foo.*
00+4 <[^>]*> eb...... bl 0[0123456789abcdef]+ <[^>]*> 00+4 <[^>]*> eb...... bl 0[0123456789abcdef]+ <[^>]*>
4: R_ARM_PLT32 foo 4: R_ARM_(PLT32|CALL) foo
\.\.\. \.\.\.
8: R_ARM_ABS32 sym 8: R_ARM_ABS32 sym
c: R_ARM_GOT32 sym c: R_ARM_GOT32 sym