gas/testsuite/
2008-09-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse2avx.s: Remove pclmulXXX tests. Add tests for Intel syntax. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/sse2avx.d: Updated. * gas/i386/x86-64-sse2avx.d: Likewise. opcodes/ 2008-09-11 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd]. * i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu
parent
d053aef827
commit
3e12678445
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@ -1,3 +1,12 @@
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2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/sse2avx.s: Remove pclmulXXX tests. Add tests for
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Intel syntax.
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* gas/i386/x86-64-sse2avx.s: Likewise.
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* gas/i386/sse2avx.d: Updated.
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* gas/i386/x86-64-sse2avx.d: Likewise.
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2008-09-09 Peter Bergner <bergner@vnet.ibm.com>
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* gas/ppc/common.s: New test.
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@ -150,14 +150,574 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: c5 c9 e0 31 vpavgb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e3 f4 vpavgw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e3 31 vpavgw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: 66 0f 3a 44 f4 00 pclmullqlqdq %xmm4,%xmm6
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[ ]*[a-f0-9]+: 66 0f 3a 44 31 00 pclmullqlqdq \(%ecx\),%xmm6
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[ ]*[a-f0-9]+: 66 0f 3a 44 f4 01 pclmulhqlqdq %xmm4,%xmm6
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[ ]*[a-f0-9]+: 66 0f 3a 44 31 01 pclmulhqlqdq \(%ecx\),%xmm6
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[ ]*[a-f0-9]+: 66 0f 3a 44 f4 10 pclmullqhqdq %xmm4,%xmm6
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[ ]*[a-f0-9]+: 66 0f 3a 44 31 10 pclmullqhqdq \(%ecx\),%xmm6
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[ ]*[a-f0-9]+: 66 0f 3a 44 f4 11 pclmulhqhqdq %xmm4,%xmm6
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[ ]*[a-f0-9]+: 66 0f 3a 44 31 11 pclmulhqhqdq \(%ecx\),%xmm6
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[ ]*[a-f0-9]+: c5 c9 74 f4 vpcmpeqb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 74 31 vpcmpeqb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 75 f4 vpcmpeqw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 75 31 vpcmpeqw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 76 f4 vpcmpeqd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 76 31 vpcmpeqd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 29 f4 vpcmpeqq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 29 31 vpcmpeqq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 64 f4 vpcmpgtb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 64 31 vpcmpgtb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 65 f4 vpcmpgtw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 65 31 vpcmpgtw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 66 f4 vpcmpgtd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 66 31 vpcmpgtd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 37 f4 vpcmpgtq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 37 31 vpcmpgtq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 01 f4 vphaddw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 01 31 vphaddw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 02 f4 vphaddd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 02 31 vphaddd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 03 f4 vphaddsw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 03 31 vphaddsw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 05 f4 vphsubw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 05 31 vphsubw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 06 f4 vphsubd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 06 31 vphsubd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 07 f4 vphsubsw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 07 31 vphsubsw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f5 f4 vpmaddwd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f5 31 vpmaddwd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 04 f4 vpmaddubsw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 04 31 vpmaddubsw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3c f4 vpmaxsb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3c 31 vpmaxsb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 ee f4 vpmaxsw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 ee 31 vpmaxsw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3d f4 vpmaxsd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3d 31 vpmaxsd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 de f4 vpmaxub %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 de 31 vpmaxub \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3e f4 vpmaxuw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3e 31 vpmaxuw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3f f4 vpmaxud %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3f 31 vpmaxud \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 38 f4 vpminsb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 38 31 vpminsb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 ea f4 vpminsw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 ea 31 vpminsw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 39 f4 vpminsd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 39 31 vpminsd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 da f4 vpminub %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 da 31 vpminub \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3a f4 vpminuw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3a 31 vpminuw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3b f4 vpminud %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 3b 31 vpminud \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e4 f4 vpmulhuw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e4 31 vpmulhuw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 0b f4 vpmulhrsw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 0b 31 vpmulhrsw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e5 f4 vpmulhw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e5 31 vpmulhw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d5 f4 vpmullw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d5 31 vpmullw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 40 f4 vpmulld %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 40 31 vpmulld \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f4 f4 vpmuludq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f4 31 vpmuludq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 28 f4 vpmuldq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 28 31 vpmuldq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 eb f4 vpor %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 eb 31 vpor \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f6 f4 vpsadbw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f6 31 vpsadbw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 00 f4 vpshufb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 00 31 vpshufb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 08 f4 vpsignb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 08 31 vpsignb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 09 f4 vpsignw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 09 31 vpsignw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 0a f4 vpsignd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 0a 31 vpsignd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f1 f4 vpsllw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f1 31 vpsllw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f2 f4 vpslld %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f2 31 vpslld \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f3 f4 vpsllq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f3 31 vpsllq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e1 f4 vpsraw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e1 31 vpsraw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e2 f4 vpsrad %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e2 31 vpsrad \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d1 f4 vpsrlw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d1 31 vpsrlw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d2 f4 vpsrld %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d2 31 vpsrld \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d3 f4 vpsrlq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d3 31 vpsrlq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f8 f4 vpsubb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f8 31 vpsubb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f9 f4 vpsubw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 f9 31 vpsubw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 fa f4 vpsubd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 fa 31 vpsubd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 fb f4 vpsubq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 fb 31 vpsubq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e8 f4 vpsubsb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e8 31 vpsubsb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e9 f4 vpsubsw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 e9 31 vpsubsw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d8 f4 vpsubusb %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d8 31 vpsubusb \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d9 f4 vpsubusw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 d9 31 vpsubusw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 68 f4 vpunpckhbw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 68 31 vpunpckhbw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 69 f4 vpunpckhwd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 69 31 vpunpckhwd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 6a f4 vpunpckhdq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 6a 31 vpunpckhdq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 6d f4 vpunpckhqdq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 6d 31 vpunpckhqdq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 60 f4 vpunpcklbw %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 60 31 vpunpcklbw \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 61 f4 vpunpcklwd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 61 31 vpunpcklwd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 62 f4 vpunpckldq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 62 31 vpunpckldq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 6c f4 vpunpcklqdq %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 6c 31 vpunpcklqdq \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 ef f4 vpxor %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 ef 31 vpxor \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 5c f4 vsubpd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 5c 31 vsubpd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 5c f4 vsubps %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 5c 31 vsubps \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 15 f4 vunpckhpd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 15 31 vunpckhpd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 15 f4 vunpckhps %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 15 31 vunpckhps \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 14 f4 vunpcklpd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 14 31 vunpcklpd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 14 f4 vunpcklps %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 14 31 vunpcklps \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 57 f4 vxorpd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 57 31 vxorpd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 57 f4 vxorps %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 57 31 vxorps \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 dc f4 vaesenc %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 dc 31 vaesenc \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 dd f4 vaesenclast %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 dd 31 vaesenclast \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 de f4 vaesdec %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 de 31 vaesdec \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 df f4 vaesdeclast %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c4 e2 49 df 31 vaesdeclast \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 c2 f4 00 vcmpeqpd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 c2 31 00 vcmpeqpd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 c2 f4 00 vcmpeqps %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 c2 31 00 vcmpeqps \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 c2 f4 01 vcmpltpd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 c2 31 01 vcmpltpd \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 c2 f4 01 vcmpltps %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c8 c2 31 01 vcmpltps \(%ecx\),%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 c2 f4 02 vcmplepd %xmm4,%xmm6,%xmm6
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[ ]*[a-f0-9]+: c5 c9 c2 31 02 vcmplepd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 02 vcmpleps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 02 vcmpleps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 03 vcmpunordpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 03 vcmpunordpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 03 vcmpunordps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 03 vcmpunordps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 04 vcmpneqpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 04 vcmpneqpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 04 vcmpneqps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 04 vcmpneqps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 05 vcmpnltpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 05 vcmpnltpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 05 vcmpnltps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 05 vcmpnltps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 06 vcmpnlepd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 06 vcmpnlepd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 06 vcmpnleps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 06 vcmpnleps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 07 vcmpordpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 07 vcmpordpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 07 vcmpordps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 07 vcmpordps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 df f4 64 vaeskeygenassist \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 df 31 64 vaeskeygenassist \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 61 f4 64 vpcmpestri \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 61 31 64 vpcmpestri \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 60 f4 64 vpcmpestrm \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 60 31 64 vpcmpestrm \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 63 f4 64 vpcmpistri \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 63 31 64 vpcmpistri \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 62 f4 64 vpcmpistrm \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 62 31 64 vpcmpistrm \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 70 f4 64 vpshufd \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 70 31 64 vpshufd \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 70 f4 64 vpshufhw \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 70 31 64 vpshufhw \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fb 70 f4 64 vpshuflw \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fb 70 31 64 vpshuflw \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 09 f4 64 vroundpd \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 09 31 64 vroundpd \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 08 f4 64 vroundps \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 08 31 64 vroundps \$0x64,\(%ecx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0d f4 64 vblendpd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0d 31 64 vblendpd \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0c f4 64 vblendps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0c 31 64 vblendps \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 64 vcmppd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 64 vcmppd \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 64 vcmpps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 64 vcmpps \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 41 f4 64 vdppd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 41 31 64 vdppd \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 40 f4 64 vdpps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 40 31 64 vdpps \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 42 f4 64 vmpsadbw \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 42 31 64 vmpsadbw \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0f f4 64 vpalignr \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0f 31 64 vpalignr \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0e f4 64 vpblendw \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0e 31 64 vpblendw \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c6 f4 64 vshufpd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c6 31 64 vshufpd \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c6 f4 64 vshufps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c6 31 64 vshufps \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4b f4 00 vblendvpd %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4b 31 00 vblendvpd %xmm0,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4b f4 00 vblendvpd %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4b 31 00 vblendvpd %xmm0,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4a f4 00 vblendvps %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4a 31 00 vblendvps %xmm0,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4a f4 00 vblendvps %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4a 31 00 vblendvps %xmm0,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4c f4 00 vpblendvb %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4c 31 00 vpblendvb %xmm0,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4c f4 00 vpblendvb %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4c 31 00 vpblendvb %xmm0,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 2f f4 vcomisd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 2f 21 vcomisd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa e6 f4 vcvtdq2pd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 5a f4 vcvtps2pd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 5a 21 vcvtps2pd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fb 12 f4 vmovddup %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fb 12 21 vmovddup \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 20 f4 vpmovsxbw %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 20 21 vpmovsxbw \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 23 f4 vpmovsxwd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 23 21 vpmovsxwd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 25 f4 vpmovsxdq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 25 21 vpmovsxdq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 30 f4 vpmovzxbw %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 30 21 vpmovzxbw \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 33 f4 vpmovzxwd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 33 21 vpmovzxwd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 35 f4 vpmovzxdq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 35 21 vpmovzxdq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 2e f4 vucomisd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 2e 21 vucomisd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fb 10 21 vmovsd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 13 21 vmovlpd %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 13 21 vmovlps %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 17 21 vmovhpd %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 17 21 vmovhps %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 fb 11 21 vmovsd %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fb 2d cc vcvtsd2si %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 fb 2d 09 vcvtsd2si \(%ecx\),%ecx
|
||||
[ ]*[a-f0-9]+: c5 fb 2c cc vcvttsd2si %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 fb 2c 09 vcvttsd2si \(%ecx\),%ecx
|
||||
[ ]*[a-f0-9]+: c5 d9 12 21 vmovlpd \(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d8 12 21 vmovlps \(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 16 21 vmovhpd \(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d8 16 21 vmovhps \(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 64 vcmpsd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 64 vcmpsd \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0b f4 64 vroundsd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0b 31 64 vroundsd \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 58 f4 vaddsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 58 31 vaddsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5a f4 vcvtsd2ss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5a 31 vcvtsd2ss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5e f4 vdivsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5e 31 vdivsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5f f4 vmaxsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5f 31 vmaxsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5d f4 vminsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5d 31 vminsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 59 f4 vmulsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 59 31 vmulsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 51 f4 vsqrtsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 51 31 vsqrtsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5c f4 vsubsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5c 31 vsubsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 00 vcmpeqsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 00 vcmpeqsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 01 vcmpltsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 01 vcmpltsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 02 vcmplesd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 02 vcmplesd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 03 vcmpunordsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 03 vcmpunordsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 04 vcmpneqsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 04 vcmpneqsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 05 vcmpnltsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 05 vcmpnltsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 06 vcmpnlesd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 06 vcmpnlesd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 07 vcmpordsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 07 vcmpordsd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 58 f4 vaddss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 58 31 vaddss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5a f4 vcvtss2sd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5a 31 vcvtss2sd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5e f4 vdivss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5e 31 vdivss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5f f4 vmaxss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5f 31 vmaxss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5d f4 vminss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5d 31 vminss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 59 f4 vmulss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 59 31 vmulss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 53 f4 vrcpss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 53 31 vrcpss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 52 f4 vrsqrtss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 52 31 vrsqrtss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 51 f4 vsqrtss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 51 31 vsqrtss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5c f4 vsubss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5c 31 vsubss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 00 vcmpeqss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 00 vcmpeqss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 01 vcmpltss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 01 vcmpltss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 02 vcmpless %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 02 vcmpless \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 03 vcmpunordss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 03 vcmpunordss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 04 vcmpneqss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 04 vcmpneqss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 05 vcmpnltss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 05 vcmpnltss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 06 vcmpnless %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 06 vcmpnless \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 07 vcmpordss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 07 vcmpordss \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 2f f4 vcomiss %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 2f 21 vcomiss \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 21 f4 vpmovsxbd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 21 21 vpmovsxbd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 24 f4 vpmovsxwq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 24 21 vpmovsxwq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 31 f4 vpmovzxbd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 31 21 vpmovzxbd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 34 f4 vpmovzxwq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 34 21 vpmovzxwq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 2e f4 vucomiss %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 2e 21 vucomiss \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 10 21 vmovss \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 11 21 vmovss %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 7e e1 vmovd %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f9 7e 21 vmovd %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 6e e1 vmovd %ecx,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 6e 21 vmovd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 2d cc vcvtss2si %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 fa 2d 09 vcvtss2si \(%ecx\),%ecx
|
||||
[ ]*[a-f0-9]+: c5 fa 2c cc vcvttss2si %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 fa 2c 09 vcvttss2si \(%ecx\),%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 64 vextractps \$0x64,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 e1 64 vpextrd \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 21 64 vpextrd \$0x64,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 64 vextractps \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 64 vextractps \$0x64,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 db 2a e1 vcvtsi2sd %ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 db 2a 21 vcvtsi2sdl \(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 da 2a e1 vcvtsi2ss %ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 da 2a 21 vcvtsi2ssl \(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 64 vcmpss \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 64 vcmpss \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 21 f4 64 vinsertps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 21 31 64 vinsertps \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0a f4 64 vroundss \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0a 31 64 vroundss \$0x64,\(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 22 f4 vpmovsxbq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 22 21 vpmovsxbq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 32 f4 vpmovzxbq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 32 21 vpmovzxbq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 64 vpextrw \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 15 21 64 vpextrw \$0x64,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 15 21 64 vpextrw \$0x64,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 d9 c4 e1 64 vpinsrw \$0x64,%ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 c4 21 64 vpinsrw \$0x64,\(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 64 vpextrb \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 64 vpextrb \$0x64,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 e1 64 vpinsrb \$0x64,%ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 21 64 vpinsrb \$0x64,\(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 64 vpextrb \$0x64,%xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 e1 64 vpinsrb \$0x64,%ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 21 64 vpinsrb \$0x64,\(%ecx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f8 50 cc vmovmskps %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f9 d7 cc vpmovmskb %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 c8 12 f4 vmovhlps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 16 f4 vmovlhps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 10 f4 vmovsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 10 f4 vmovss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 d9 72 f4 64 vpslld \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 73 fc 64 vpslldq \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 73 f4 64 vpsllq \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 71 f4 64 vpsllw \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 72 e4 64 vpsrad \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 71 e4 64 vpsraw \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 72 d4 64 vpsrld \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 73 dc 64 vpsrldq \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 73 d4 64 vpsrlq \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 71 d4 64 vpsrlw \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 64 vpextrw \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f8 ae 11 vldmxcsr \(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 ae 19 vstmxcsr \(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 5b f4 vcvtdq2ps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 5b 21 vcvtdq2ps \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fb e6 f4 vcvtpd2dq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fb e6 21 vcvtpd2dqx \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 5a f4 vcvtpd2ps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 5a 21 vcvtpd2psx \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 5b f4 vcvtps2dq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 5b 21 vcvtps2dq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 e6 f4 vcvttpd2dq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 e6 21 vcvttpd2dqx \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 5b f4 vcvttps2dq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 5b 21 vcvttps2dq \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 28 f4 vmovapd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 28 21 vmovapd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 28 f4 vmovaps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 28 21 vmovaps \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 6f f4 vmovdqa %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 6f 21 vmovdqa \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 6f f4 vmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 6f 21 vmovdqu \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 16 f4 vmovshdup %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 16 21 vmovshdup \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 12 f4 vmovsldup %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 12 21 vmovsldup \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 10 f4 vmovupd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 10 21 vmovupd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 10 f4 vmovups %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 10 21 vmovups \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1c f4 vpabsb %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1c 21 vpabsb \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1d f4 vpabsw %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1d 21 vpabsw \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1e f4 vpabsd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1e 21 vpabsd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 41 f4 vphminposuw %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 41 21 vphminposuw \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 17 f4 vptest %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 17 21 vptest \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 53 f4 vrcpps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 53 21 vrcpps \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 52 f4 vrsqrtps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 52 21 vrsqrtps \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 51 f4 vsqrtpd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 51 21 vsqrtpd \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 51 f4 vsqrtps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 51 21 vsqrtps \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 db f4 vaesimc %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 db 21 vaesimc \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 28 f4 vmovapd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 29 21 vmovapd %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 28 f4 vmovaps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 29 21 vmovaps %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 6f f4 vmovdqa %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 7f 21 vmovdqa %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 fa 6f f4 vmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7f 21 vmovdqu %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 10 f4 vmovupd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 11 21 vmovupd %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 10 f4 vmovups %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 11 21 vmovups %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 fb f0 21 vlddqu \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 2a 21 vmovntdqa \(%ecx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 e7 21 vmovntdq %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 2b 21 vmovntpd %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 2b 21 vmovntps %xmm4,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: c5 c9 58 f4 vaddpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 58 31 vaddpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 58 f4 vaddps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 58 31 vaddps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d0 f4 vaddsubpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d0 31 vaddsubpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb d0 f4 vaddsubps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb d0 31 vaddsubps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 55 f4 vandnpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 55 31 vandnpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 55 f4 vandnps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 55 31 vandnps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 54 f4 vandpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 54 31 vandpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 54 f4 vandps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 54 31 vandps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5e f4 vdivpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5e 31 vdivpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5e f4 vdivps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5e 31 vdivps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 7c f4 vhaddpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 7c 31 vhaddpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 7c f4 vhaddps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 7c 31 vhaddps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 7d f4 vhsubpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 7d 31 vhsubpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 7d f4 vhsubps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 7d 31 vhsubps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5f f4 vmaxpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5f 31 vmaxpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5f f4 vmaxps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5f 31 vmaxps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5d f4 vminpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5d 31 vminpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5d f4 vminps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5d 31 vminps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 59 f4 vmulpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 59 31 vmulpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 59 f4 vmulps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 59 31 vmulps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 56 f4 vorpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 56 31 vorpd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 56 f4 vorps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 56 31 vorps \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 63 f4 vpacksswb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 63 31 vpacksswb \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6b f4 vpackssdw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6b 31 vpackssdw \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 67 f4 vpackuswb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 67 31 vpackuswb \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 2b f4 vpackusdw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 2b 31 vpackusdw \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fc f4 vpaddb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fc 31 vpaddb \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fd f4 vpaddw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fd 31 vpaddw \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fe f4 vpaddd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fe 31 vpaddd \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d4 f4 vpaddq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d4 31 vpaddq \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ec f4 vpaddsb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ec 31 vpaddsb \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ed f4 vpaddsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ed 31 vpaddsw \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 dc f4 vpaddusb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 dc 31 vpaddusb \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 dd f4 vpaddusw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 dd 31 vpaddusw \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 db f4 vpand %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 db 31 vpand \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 df f4 vpandn %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 df 31 vpandn \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e0 f4 vpavgb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e0 31 vpavgb \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e3 f4 vpavgw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e3 31 vpavgw \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 74 f4 vpcmpeqb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 74 31 vpcmpeqb \(%ecx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 75 f4 vpcmpeqw %xmm4,%xmm6,%xmm6
|
||||
|
|
|
|||
|
|
@ -157,14 +157,6 @@ _start:
|
|||
pavgb (%ecx),%xmm6
|
||||
pavgw %xmm4,%xmm6
|
||||
pavgw (%ecx),%xmm6
|
||||
pclmullqlqdq %xmm4,%xmm6
|
||||
pclmullqlqdq (%ecx),%xmm6
|
||||
pclmulhqlqdq %xmm4,%xmm6
|
||||
pclmulhqlqdq (%ecx),%xmm6
|
||||
pclmullqhqdq %xmm4,%xmm6
|
||||
pclmullqhqdq (%ecx),%xmm6
|
||||
pclmulhqhqdq %xmm4,%xmm6
|
||||
pclmulhqhqdq (%ecx),%xmm6
|
||||
pcmpeqb %xmm4,%xmm6
|
||||
pcmpeqb (%ecx),%xmm6
|
||||
pcmpeqw %xmm4,%xmm6
|
||||
|
|
@ -660,3 +652,654 @@ _start:
|
|||
# Tests for op imm8, xmm, regl
|
||||
pextrw $100,%xmm4,%ecx
|
||||
|
||||
|
||||
.intel_syntax noprefix
|
||||
# Tests for op mem64
|
||||
ldmxcsr DWORD PTR [ecx]
|
||||
stmxcsr DWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm/mem128, xmm
|
||||
cvtdq2ps xmm6,xmm4
|
||||
cvtdq2ps xmm4,XMMWORD PTR [ecx]
|
||||
cvtpd2dq xmm6,xmm4
|
||||
cvtpd2dq xmm4,XMMWORD PTR [ecx]
|
||||
cvtpd2ps xmm6,xmm4
|
||||
cvtpd2ps xmm4,XMMWORD PTR [ecx]
|
||||
cvtps2dq xmm6,xmm4
|
||||
cvtps2dq xmm4,XMMWORD PTR [ecx]
|
||||
cvttpd2dq xmm6,xmm4
|
||||
cvttpd2dq xmm4,XMMWORD PTR [ecx]
|
||||
cvttps2dq xmm6,xmm4
|
||||
cvttps2dq xmm4,XMMWORD PTR [ecx]
|
||||
movapd xmm6,xmm4
|
||||
movapd xmm4,XMMWORD PTR [ecx]
|
||||
movaps xmm6,xmm4
|
||||
movaps xmm4,XMMWORD PTR [ecx]
|
||||
movdqa xmm6,xmm4
|
||||
movdqa xmm4,XMMWORD PTR [ecx]
|
||||
movdqu xmm6,xmm4
|
||||
movdqu xmm4,XMMWORD PTR [ecx]
|
||||
movshdup xmm6,xmm4
|
||||
movshdup xmm4,XMMWORD PTR [ecx]
|
||||
movsldup xmm6,xmm4
|
||||
movsldup xmm4,XMMWORD PTR [ecx]
|
||||
movupd xmm6,xmm4
|
||||
movupd xmm4,XMMWORD PTR [ecx]
|
||||
movups xmm6,xmm4
|
||||
movups xmm4,XMMWORD PTR [ecx]
|
||||
pabsb xmm6,xmm4
|
||||
pabsb xmm4,XMMWORD PTR [ecx]
|
||||
pabsw xmm6,xmm4
|
||||
pabsw xmm4,XMMWORD PTR [ecx]
|
||||
pabsd xmm6,xmm4
|
||||
pabsd xmm4,XMMWORD PTR [ecx]
|
||||
phminposuw xmm6,xmm4
|
||||
phminposuw xmm4,XMMWORD PTR [ecx]
|
||||
ptest xmm6,xmm4
|
||||
ptest xmm4,XMMWORD PTR [ecx]
|
||||
rcpps xmm6,xmm4
|
||||
rcpps xmm4,XMMWORD PTR [ecx]
|
||||
rsqrtps xmm6,xmm4
|
||||
rsqrtps xmm4,XMMWORD PTR [ecx]
|
||||
sqrtpd xmm6,xmm4
|
||||
sqrtpd xmm4,XMMWORD PTR [ecx]
|
||||
sqrtps xmm6,xmm4
|
||||
sqrtps xmm4,XMMWORD PTR [ecx]
|
||||
aesimc xmm6,xmm4
|
||||
aesimc xmm4,XMMWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm, xmm/mem128
|
||||
movapd xmm6,xmm4
|
||||
movapd XMMWORD PTR [ecx],xmm4
|
||||
movaps xmm6,xmm4
|
||||
movaps XMMWORD PTR [ecx],xmm4
|
||||
movdqa xmm6,xmm4
|
||||
movdqa XMMWORD PTR [ecx],xmm4
|
||||
movdqu xmm6,xmm4
|
||||
movdqu XMMWORD PTR [ecx],xmm4
|
||||
movupd xmm6,xmm4
|
||||
movupd XMMWORD PTR [ecx],xmm4
|
||||
movups xmm6,xmm4
|
||||
movups XMMWORD PTR [ecx],xmm4
|
||||
|
||||
# Tests for op mem128, xmm
|
||||
lddqu xmm4,XMMWORD PTR [ecx]
|
||||
movntdqa xmm4,XMMWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm, mem128
|
||||
movntdq XMMWORD PTR [ecx],xmm4
|
||||
movntpd XMMWORD PTR [ecx],xmm4
|
||||
movntps XMMWORD PTR [ecx],xmm4
|
||||
|
||||
# Tests for op xmm/mem128, xmm[, xmm]
|
||||
addpd xmm6,xmm4
|
||||
addpd xmm6,XMMWORD PTR [ecx]
|
||||
addps xmm6,xmm4
|
||||
addps xmm6,XMMWORD PTR [ecx]
|
||||
addsubpd xmm6,xmm4
|
||||
addsubpd xmm6,XMMWORD PTR [ecx]
|
||||
addsubps xmm6,xmm4
|
||||
addsubps xmm6,XMMWORD PTR [ecx]
|
||||
andnpd xmm6,xmm4
|
||||
andnpd xmm6,XMMWORD PTR [ecx]
|
||||
andnps xmm6,xmm4
|
||||
andnps xmm6,XMMWORD PTR [ecx]
|
||||
andpd xmm6,xmm4
|
||||
andpd xmm6,XMMWORD PTR [ecx]
|
||||
andps xmm6,xmm4
|
||||
andps xmm6,XMMWORD PTR [ecx]
|
||||
divpd xmm6,xmm4
|
||||
divpd xmm6,XMMWORD PTR [ecx]
|
||||
divps xmm6,xmm4
|
||||
divps xmm6,XMMWORD PTR [ecx]
|
||||
haddpd xmm6,xmm4
|
||||
haddpd xmm6,XMMWORD PTR [ecx]
|
||||
haddps xmm6,xmm4
|
||||
haddps xmm6,XMMWORD PTR [ecx]
|
||||
hsubpd xmm6,xmm4
|
||||
hsubpd xmm6,XMMWORD PTR [ecx]
|
||||
hsubps xmm6,xmm4
|
||||
hsubps xmm6,XMMWORD PTR [ecx]
|
||||
maxpd xmm6,xmm4
|
||||
maxpd xmm6,XMMWORD PTR [ecx]
|
||||
maxps xmm6,xmm4
|
||||
maxps xmm6,XMMWORD PTR [ecx]
|
||||
minpd xmm6,xmm4
|
||||
minpd xmm6,XMMWORD PTR [ecx]
|
||||
minps xmm6,xmm4
|
||||
minps xmm6,XMMWORD PTR [ecx]
|
||||
mulpd xmm6,xmm4
|
||||
mulpd xmm6,XMMWORD PTR [ecx]
|
||||
mulps xmm6,xmm4
|
||||
mulps xmm6,XMMWORD PTR [ecx]
|
||||
orpd xmm6,xmm4
|
||||
orpd xmm6,XMMWORD PTR [ecx]
|
||||
orps xmm6,xmm4
|
||||
orps xmm6,XMMWORD PTR [ecx]
|
||||
packsswb xmm6,xmm4
|
||||
packsswb xmm6,XMMWORD PTR [ecx]
|
||||
packssdw xmm6,xmm4
|
||||
packssdw xmm6,XMMWORD PTR [ecx]
|
||||
packuswb xmm6,xmm4
|
||||
packuswb xmm6,XMMWORD PTR [ecx]
|
||||
packusdw xmm6,xmm4
|
||||
packusdw xmm6,XMMWORD PTR [ecx]
|
||||
paddb xmm6,xmm4
|
||||
paddb xmm6,XMMWORD PTR [ecx]
|
||||
paddw xmm6,xmm4
|
||||
paddw xmm6,XMMWORD PTR [ecx]
|
||||
paddd xmm6,xmm4
|
||||
paddd xmm6,XMMWORD PTR [ecx]
|
||||
paddq xmm6,xmm4
|
||||
paddq xmm6,XMMWORD PTR [ecx]
|
||||
paddsb xmm6,xmm4
|
||||
paddsb xmm6,XMMWORD PTR [ecx]
|
||||
paddsw xmm6,xmm4
|
||||
paddsw xmm6,XMMWORD PTR [ecx]
|
||||
paddusb xmm6,xmm4
|
||||
paddusb xmm6,XMMWORD PTR [ecx]
|
||||
paddusw xmm6,xmm4
|
||||
paddusw xmm6,XMMWORD PTR [ecx]
|
||||
pand xmm6,xmm4
|
||||
pand xmm6,XMMWORD PTR [ecx]
|
||||
pandn xmm6,xmm4
|
||||
pandn xmm6,XMMWORD PTR [ecx]
|
||||
pavgb xmm6,xmm4
|
||||
pavgb xmm6,XMMWORD PTR [ecx]
|
||||
pavgw xmm6,xmm4
|
||||
pavgw xmm6,XMMWORD PTR [ecx]
|
||||
pcmpeqb xmm6,xmm4
|
||||
pcmpeqb xmm6,XMMWORD PTR [ecx]
|
||||
pcmpeqw xmm6,xmm4
|
||||
pcmpeqw xmm6,XMMWORD PTR [ecx]
|
||||
pcmpeqd xmm6,xmm4
|
||||
pcmpeqd xmm6,XMMWORD PTR [ecx]
|
||||
pcmpeqq xmm6,xmm4
|
||||
pcmpeqq xmm6,XMMWORD PTR [ecx]
|
||||
pcmpgtb xmm6,xmm4
|
||||
pcmpgtb xmm6,XMMWORD PTR [ecx]
|
||||
pcmpgtw xmm6,xmm4
|
||||
pcmpgtw xmm6,XMMWORD PTR [ecx]
|
||||
pcmpgtd xmm6,xmm4
|
||||
pcmpgtd xmm6,XMMWORD PTR [ecx]
|
||||
pcmpgtq xmm6,xmm4
|
||||
pcmpgtq xmm6,XMMWORD PTR [ecx]
|
||||
phaddw xmm6,xmm4
|
||||
phaddw xmm6,XMMWORD PTR [ecx]
|
||||
phaddd xmm6,xmm4
|
||||
phaddd xmm6,XMMWORD PTR [ecx]
|
||||
phaddsw xmm6,xmm4
|
||||
phaddsw xmm6,XMMWORD PTR [ecx]
|
||||
phsubw xmm6,xmm4
|
||||
phsubw xmm6,XMMWORD PTR [ecx]
|
||||
phsubd xmm6,xmm4
|
||||
phsubd xmm6,XMMWORD PTR [ecx]
|
||||
phsubsw xmm6,xmm4
|
||||
phsubsw xmm6,XMMWORD PTR [ecx]
|
||||
pmaddwd xmm6,xmm4
|
||||
pmaddwd xmm6,XMMWORD PTR [ecx]
|
||||
pmaddubsw xmm6,xmm4
|
||||
pmaddubsw xmm6,XMMWORD PTR [ecx]
|
||||
pmaxsb xmm6,xmm4
|
||||
pmaxsb xmm6,XMMWORD PTR [ecx]
|
||||
pmaxsw xmm6,xmm4
|
||||
pmaxsw xmm6,XMMWORD PTR [ecx]
|
||||
pmaxsd xmm6,xmm4
|
||||
pmaxsd xmm6,XMMWORD PTR [ecx]
|
||||
pmaxub xmm6,xmm4
|
||||
pmaxub xmm6,XMMWORD PTR [ecx]
|
||||
pmaxuw xmm6,xmm4
|
||||
pmaxuw xmm6,XMMWORD PTR [ecx]
|
||||
pmaxud xmm6,xmm4
|
||||
pmaxud xmm6,XMMWORD PTR [ecx]
|
||||
pminsb xmm6,xmm4
|
||||
pminsb xmm6,XMMWORD PTR [ecx]
|
||||
pminsw xmm6,xmm4
|
||||
pminsw xmm6,XMMWORD PTR [ecx]
|
||||
pminsd xmm6,xmm4
|
||||
pminsd xmm6,XMMWORD PTR [ecx]
|
||||
pminub xmm6,xmm4
|
||||
pminub xmm6,XMMWORD PTR [ecx]
|
||||
pminuw xmm6,xmm4
|
||||
pminuw xmm6,XMMWORD PTR [ecx]
|
||||
pminud xmm6,xmm4
|
||||
pminud xmm6,XMMWORD PTR [ecx]
|
||||
pmulhuw xmm6,xmm4
|
||||
pmulhuw xmm6,XMMWORD PTR [ecx]
|
||||
pmulhrsw xmm6,xmm4
|
||||
pmulhrsw xmm6,XMMWORD PTR [ecx]
|
||||
pmulhw xmm6,xmm4
|
||||
pmulhw xmm6,XMMWORD PTR [ecx]
|
||||
pmullw xmm6,xmm4
|
||||
pmullw xmm6,XMMWORD PTR [ecx]
|
||||
pmulld xmm6,xmm4
|
||||
pmulld xmm6,XMMWORD PTR [ecx]
|
||||
pmuludq xmm6,xmm4
|
||||
pmuludq xmm6,XMMWORD PTR [ecx]
|
||||
pmuldq xmm6,xmm4
|
||||
pmuldq xmm6,XMMWORD PTR [ecx]
|
||||
por xmm6,xmm4
|
||||
por xmm6,XMMWORD PTR [ecx]
|
||||
psadbw xmm6,xmm4
|
||||
psadbw xmm6,XMMWORD PTR [ecx]
|
||||
pshufb xmm6,xmm4
|
||||
pshufb xmm6,XMMWORD PTR [ecx]
|
||||
psignb xmm6,xmm4
|
||||
psignb xmm6,XMMWORD PTR [ecx]
|
||||
psignw xmm6,xmm4
|
||||
psignw xmm6,XMMWORD PTR [ecx]
|
||||
psignd xmm6,xmm4
|
||||
psignd xmm6,XMMWORD PTR [ecx]
|
||||
psllw xmm6,xmm4
|
||||
psllw xmm6,XMMWORD PTR [ecx]
|
||||
pslld xmm6,xmm4
|
||||
pslld xmm6,XMMWORD PTR [ecx]
|
||||
psllq xmm6,xmm4
|
||||
psllq xmm6,XMMWORD PTR [ecx]
|
||||
psraw xmm6,xmm4
|
||||
psraw xmm6,XMMWORD PTR [ecx]
|
||||
psrad xmm6,xmm4
|
||||
psrad xmm6,XMMWORD PTR [ecx]
|
||||
psrlw xmm6,xmm4
|
||||
psrlw xmm6,XMMWORD PTR [ecx]
|
||||
psrld xmm6,xmm4
|
||||
psrld xmm6,XMMWORD PTR [ecx]
|
||||
psrlq xmm6,xmm4
|
||||
psrlq xmm6,XMMWORD PTR [ecx]
|
||||
psubb xmm6,xmm4
|
||||
psubb xmm6,XMMWORD PTR [ecx]
|
||||
psubw xmm6,xmm4
|
||||
psubw xmm6,XMMWORD PTR [ecx]
|
||||
psubd xmm6,xmm4
|
||||
psubd xmm6,XMMWORD PTR [ecx]
|
||||
psubq xmm6,xmm4
|
||||
psubq xmm6,XMMWORD PTR [ecx]
|
||||
psubsb xmm6,xmm4
|
||||
psubsb xmm6,XMMWORD PTR [ecx]
|
||||
psubsw xmm6,xmm4
|
||||
psubsw xmm6,XMMWORD PTR [ecx]
|
||||
psubusb xmm6,xmm4
|
||||
psubusb xmm6,XMMWORD PTR [ecx]
|
||||
psubusw xmm6,xmm4
|
||||
psubusw xmm6,XMMWORD PTR [ecx]
|
||||
punpckhbw xmm6,xmm4
|
||||
punpckhbw xmm6,XMMWORD PTR [ecx]
|
||||
punpckhwd xmm6,xmm4
|
||||
punpckhwd xmm6,XMMWORD PTR [ecx]
|
||||
punpckhdq xmm6,xmm4
|
||||
punpckhdq xmm6,XMMWORD PTR [ecx]
|
||||
punpckhqdq xmm6,xmm4
|
||||
punpckhqdq xmm6,XMMWORD PTR [ecx]
|
||||
punpcklbw xmm6,xmm4
|
||||
punpcklbw xmm6,XMMWORD PTR [ecx]
|
||||
punpcklwd xmm6,xmm4
|
||||
punpcklwd xmm6,XMMWORD PTR [ecx]
|
||||
punpckldq xmm6,xmm4
|
||||
punpckldq xmm6,XMMWORD PTR [ecx]
|
||||
punpcklqdq xmm6,xmm4
|
||||
punpcklqdq xmm6,XMMWORD PTR [ecx]
|
||||
pxor xmm6,xmm4
|
||||
pxor xmm6,XMMWORD PTR [ecx]
|
||||
subpd xmm6,xmm4
|
||||
subpd xmm6,XMMWORD PTR [ecx]
|
||||
subps xmm6,xmm4
|
||||
subps xmm6,XMMWORD PTR [ecx]
|
||||
unpckhpd xmm6,xmm4
|
||||
unpckhpd xmm6,XMMWORD PTR [ecx]
|
||||
unpckhps xmm6,xmm4
|
||||
unpckhps xmm6,XMMWORD PTR [ecx]
|
||||
unpcklpd xmm6,xmm4
|
||||
unpcklpd xmm6,XMMWORD PTR [ecx]
|
||||
unpcklps xmm6,xmm4
|
||||
unpcklps xmm6,XMMWORD PTR [ecx]
|
||||
xorpd xmm6,xmm4
|
||||
xorpd xmm6,XMMWORD PTR [ecx]
|
||||
xorps xmm6,xmm4
|
||||
xorps xmm6,XMMWORD PTR [ecx]
|
||||
aesenc xmm6,xmm4
|
||||
aesenc xmm6,XMMWORD PTR [ecx]
|
||||
aesenclast xmm6,xmm4
|
||||
aesenclast xmm6,XMMWORD PTR [ecx]
|
||||
aesdec xmm6,xmm4
|
||||
aesdec xmm6,XMMWORD PTR [ecx]
|
||||
aesdeclast xmm6,xmm4
|
||||
aesdeclast xmm6,XMMWORD PTR [ecx]
|
||||
cmpeqpd xmm6,xmm4
|
||||
cmpeqpd xmm6,XMMWORD PTR [ecx]
|
||||
cmpeqps xmm6,xmm4
|
||||
cmpeqps xmm6,XMMWORD PTR [ecx]
|
||||
cmpltpd xmm6,xmm4
|
||||
cmpltpd xmm6,XMMWORD PTR [ecx]
|
||||
cmpltps xmm6,xmm4
|
||||
cmpltps xmm6,XMMWORD PTR [ecx]
|
||||
cmplepd xmm6,xmm4
|
||||
cmplepd xmm6,XMMWORD PTR [ecx]
|
||||
cmpleps xmm6,xmm4
|
||||
cmpleps xmm6,XMMWORD PTR [ecx]
|
||||
cmpunordpd xmm6,xmm4
|
||||
cmpunordpd xmm6,XMMWORD PTR [ecx]
|
||||
cmpunordps xmm6,xmm4
|
||||
cmpunordps xmm6,XMMWORD PTR [ecx]
|
||||
cmpneqpd xmm6,xmm4
|
||||
cmpneqpd xmm6,XMMWORD PTR [ecx]
|
||||
cmpneqps xmm6,xmm4
|
||||
cmpneqps xmm6,XMMWORD PTR [ecx]
|
||||
cmpnltpd xmm6,xmm4
|
||||
cmpnltpd xmm6,XMMWORD PTR [ecx]
|
||||
cmpnltps xmm6,xmm4
|
||||
cmpnltps xmm6,XMMWORD PTR [ecx]
|
||||
cmpnlepd xmm6,xmm4
|
||||
cmpnlepd xmm6,XMMWORD PTR [ecx]
|
||||
cmpnleps xmm6,xmm4
|
||||
cmpnleps xmm6,XMMWORD PTR [ecx]
|
||||
cmpordpd xmm6,xmm4
|
||||
cmpordpd xmm6,XMMWORD PTR [ecx]
|
||||
cmpordps xmm6,xmm4
|
||||
cmpordps xmm6,XMMWORD PTR [ecx]
|
||||
|
||||
# Tests for op imm8, xmm/mem128, xmm
|
||||
aeskeygenassist xmm6,xmm4,100
|
||||
aeskeygenassist xmm6,XMMWORD PTR [ecx],100
|
||||
pcmpestri xmm6,xmm4,100
|
||||
pcmpestri xmm6,XMMWORD PTR [ecx],100
|
||||
pcmpestrm xmm6,xmm4,100
|
||||
pcmpestrm xmm6,XMMWORD PTR [ecx],100
|
||||
pcmpistri xmm6,xmm4,100
|
||||
pcmpistri xmm6,XMMWORD PTR [ecx],100
|
||||
pcmpistrm xmm6,xmm4,100
|
||||
pcmpistrm xmm6,XMMWORD PTR [ecx],100
|
||||
pshufd xmm6,xmm4,100
|
||||
pshufd xmm6,XMMWORD PTR [ecx],100
|
||||
pshufhw xmm6,xmm4,100
|
||||
pshufhw xmm6,XMMWORD PTR [ecx],100
|
||||
pshuflw xmm6,xmm4,100
|
||||
pshuflw xmm6,XMMWORD PTR [ecx],100
|
||||
roundpd xmm6,xmm4,100
|
||||
roundpd xmm6,XMMWORD PTR [ecx],100
|
||||
roundps xmm6,xmm4,100
|
||||
roundps xmm6,XMMWORD PTR [ecx],100
|
||||
|
||||
# Tests for op imm8, xmm/mem128, xmm[, xmm]
|
||||
blendpd xmm6,xmm4,100
|
||||
blendpd xmm6,XMMWORD PTR [ecx],100
|
||||
blendps xmm6,xmm4,100
|
||||
blendps xmm6,XMMWORD PTR [ecx],100
|
||||
cmppd xmm6,xmm4,100
|
||||
cmppd xmm6,XMMWORD PTR [ecx],100
|
||||
cmpps xmm6,xmm4,100
|
||||
cmpps xmm6,XMMWORD PTR [ecx],100
|
||||
dppd xmm6,xmm4,100
|
||||
dppd xmm6,XMMWORD PTR [ecx],100
|
||||
dpps xmm6,xmm4,100
|
||||
dpps xmm6,XMMWORD PTR [ecx],100
|
||||
mpsadbw xmm6,xmm4,100
|
||||
mpsadbw xmm6,XMMWORD PTR [ecx],100
|
||||
palignr xmm6,xmm4,100
|
||||
palignr xmm6,XMMWORD PTR [ecx],100
|
||||
pblendw xmm6,xmm4,100
|
||||
pblendw xmm6,XMMWORD PTR [ecx],100
|
||||
shufpd xmm6,xmm4,100
|
||||
shufpd xmm6,XMMWORD PTR [ecx],100
|
||||
shufps xmm6,xmm4,100
|
||||
shufps xmm6,XMMWORD PTR [ecx],100
|
||||
|
||||
# Tests for op xmm0, xmm/mem128, xmm[, xmm]
|
||||
blendvpd xmm6,xmm4,xmm0
|
||||
blendvpd xmm6,XMMWORD PTR [ecx],xmm0
|
||||
blendvpd xmm6,xmm4
|
||||
blendvpd xmm6,XMMWORD PTR [ecx]
|
||||
blendvps xmm6,xmm4,xmm0
|
||||
blendvps xmm6,XMMWORD PTR [ecx],xmm0
|
||||
blendvps xmm6,xmm4
|
||||
blendvps xmm6,XMMWORD PTR [ecx]
|
||||
pblendvb xmm6,xmm4,xmm0
|
||||
pblendvb xmm6,XMMWORD PTR [ecx],xmm0
|
||||
pblendvb xmm6,xmm4
|
||||
pblendvb xmm6,XMMWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm/mem64, xmm
|
||||
comisd xmm6,xmm4
|
||||
comisd xmm4,QWORD PTR [ecx]
|
||||
cvtdq2pd xmm6,xmm4
|
||||
cvtdq2pd xmm4,QWORD PTR [ecx]
|
||||
cvtps2pd xmm6,xmm4
|
||||
cvtps2pd xmm4,QWORD PTR [ecx]
|
||||
movddup xmm6,xmm4
|
||||
movddup xmm4,QWORD PTR [ecx]
|
||||
pmovsxbw xmm6,xmm4
|
||||
pmovsxbw xmm4,QWORD PTR [ecx]
|
||||
pmovsxwd xmm6,xmm4
|
||||
pmovsxwd xmm4,QWORD PTR [ecx]
|
||||
pmovsxdq xmm6,xmm4
|
||||
pmovsxdq xmm4,QWORD PTR [ecx]
|
||||
pmovzxbw xmm6,xmm4
|
||||
pmovzxbw xmm4,QWORD PTR [ecx]
|
||||
pmovzxwd xmm6,xmm4
|
||||
pmovzxwd xmm4,QWORD PTR [ecx]
|
||||
pmovzxdq xmm6,xmm4
|
||||
pmovzxdq xmm4,QWORD PTR [ecx]
|
||||
ucomisd xmm6,xmm4
|
||||
ucomisd xmm4,QWORD PTR [ecx]
|
||||
|
||||
# Tests for op mem64, xmm
|
||||
movsd xmm4,QWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm, mem64
|
||||
movlpd QWORD PTR [ecx],xmm4
|
||||
movlps QWORD PTR [ecx],xmm4
|
||||
movhpd QWORD PTR [ecx],xmm4
|
||||
movhps QWORD PTR [ecx],xmm4
|
||||
movsd QWORD PTR [ecx],xmm4
|
||||
|
||||
# Tests for op xmm, regq/mem64
|
||||
# Tests for op regq/mem64, xmm
|
||||
movq QWORD PTR [ecx],xmm4
|
||||
movq xmm4,QWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm/mem64, regl
|
||||
cvtsd2si ecx,xmm4
|
||||
cvtsd2si ecx,QWORD PTR [ecx]
|
||||
cvttsd2si ecx,xmm4
|
||||
cvttsd2si ecx,QWORD PTR [ecx]
|
||||
|
||||
# Tests for op mem64, xmm[, xmm]
|
||||
movlpd xmm4,QWORD PTR [ecx]
|
||||
movlps xmm4,QWORD PTR [ecx]
|
||||
movhpd xmm4,QWORD PTR [ecx]
|
||||
movhps xmm4,QWORD PTR [ecx]
|
||||
|
||||
# Tests for op imm8, xmm/mem64, xmm[, xmm]
|
||||
cmpsd xmm6,xmm4,100
|
||||
cmpsd xmm6,QWORD PTR [ecx],100
|
||||
roundsd xmm6,xmm4,100
|
||||
roundsd xmm6,QWORD PTR [ecx],100
|
||||
|
||||
# Tests for op xmm/mem64, xmm[, xmm]
|
||||
addsd xmm6,xmm4
|
||||
addsd xmm6,QWORD PTR [ecx]
|
||||
cvtsd2ss xmm6,xmm4
|
||||
cvtsd2ss xmm6,QWORD PTR [ecx]
|
||||
divsd xmm6,xmm4
|
||||
divsd xmm6,QWORD PTR [ecx]
|
||||
maxsd xmm6,xmm4
|
||||
maxsd xmm6,QWORD PTR [ecx]
|
||||
minsd xmm6,xmm4
|
||||
minsd xmm6,QWORD PTR [ecx]
|
||||
mulsd xmm6,xmm4
|
||||
mulsd xmm6,QWORD PTR [ecx]
|
||||
sqrtsd xmm6,xmm4
|
||||
sqrtsd xmm6,QWORD PTR [ecx]
|
||||
subsd xmm6,xmm4
|
||||
subsd xmm6,QWORD PTR [ecx]
|
||||
cmpeqsd xmm6,xmm4
|
||||
cmpeqsd xmm6,QWORD PTR [ecx]
|
||||
cmpltsd xmm6,xmm4
|
||||
cmpltsd xmm6,QWORD PTR [ecx]
|
||||
cmplesd xmm6,xmm4
|
||||
cmplesd xmm6,QWORD PTR [ecx]
|
||||
cmpunordsd xmm6,xmm4
|
||||
cmpunordsd xmm6,QWORD PTR [ecx]
|
||||
cmpneqsd xmm6,xmm4
|
||||
cmpneqsd xmm6,QWORD PTR [ecx]
|
||||
cmpnltsd xmm6,xmm4
|
||||
cmpnltsd xmm6,QWORD PTR [ecx]
|
||||
cmpnlesd xmm6,xmm4
|
||||
cmpnlesd xmm6,QWORD PTR [ecx]
|
||||
cmpordsd xmm6,xmm4
|
||||
cmpordsd xmm6,QWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm/mem32, xmm[, xmm]
|
||||
addss xmm6,xmm4
|
||||
addss xmm6,DWORD PTR [ecx]
|
||||
cvtss2sd xmm6,xmm4
|
||||
cvtss2sd xmm6,DWORD PTR [ecx]
|
||||
divss xmm6,xmm4
|
||||
divss xmm6,DWORD PTR [ecx]
|
||||
maxss xmm6,xmm4
|
||||
maxss xmm6,DWORD PTR [ecx]
|
||||
minss xmm6,xmm4
|
||||
minss xmm6,DWORD PTR [ecx]
|
||||
mulss xmm6,xmm4
|
||||
mulss xmm6,DWORD PTR [ecx]
|
||||
rcpss xmm6,xmm4
|
||||
rcpss xmm6,DWORD PTR [ecx]
|
||||
rsqrtss xmm6,xmm4
|
||||
rsqrtss xmm6,DWORD PTR [ecx]
|
||||
sqrtss xmm6,xmm4
|
||||
sqrtss xmm6,DWORD PTR [ecx]
|
||||
subss xmm6,xmm4
|
||||
subss xmm6,DWORD PTR [ecx]
|
||||
cmpeqss xmm6,xmm4
|
||||
cmpeqss xmm6,DWORD PTR [ecx]
|
||||
cmpltss xmm6,xmm4
|
||||
cmpltss xmm6,DWORD PTR [ecx]
|
||||
cmpless xmm6,xmm4
|
||||
cmpless xmm6,DWORD PTR [ecx]
|
||||
cmpunordss xmm6,xmm4
|
||||
cmpunordss xmm6,DWORD PTR [ecx]
|
||||
cmpneqss xmm6,xmm4
|
||||
cmpneqss xmm6,DWORD PTR [ecx]
|
||||
cmpnltss xmm6,xmm4
|
||||
cmpnltss xmm6,DWORD PTR [ecx]
|
||||
cmpnless xmm6,xmm4
|
||||
cmpnless xmm6,DWORD PTR [ecx]
|
||||
cmpordss xmm6,xmm4
|
||||
cmpordss xmm6,DWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm/mem32, xmm
|
||||
comiss xmm6,xmm4
|
||||
comiss xmm4,DWORD PTR [ecx]
|
||||
pmovsxbd xmm6,xmm4
|
||||
pmovsxbd xmm4,DWORD PTR [ecx]
|
||||
pmovsxwq xmm6,xmm4
|
||||
pmovsxwq xmm4,DWORD PTR [ecx]
|
||||
pmovzxbd xmm6,xmm4
|
||||
pmovzxbd xmm4,DWORD PTR [ecx]
|
||||
pmovzxwq xmm6,xmm4
|
||||
pmovzxwq xmm4,DWORD PTR [ecx]
|
||||
ucomiss xmm6,xmm4
|
||||
ucomiss xmm4,DWORD PTR [ecx]
|
||||
|
||||
# Tests for op mem32, xmm
|
||||
movss xmm4,DWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm, mem32
|
||||
movss DWORD PTR [ecx],xmm4
|
||||
|
||||
# Tests for op xmm, regl/mem32
|
||||
# Tests for op regl/mem32, xmm
|
||||
movd ecx,xmm4
|
||||
movd DWORD PTR [ecx],xmm4
|
||||
movd xmm4,ecx
|
||||
movd xmm4,DWORD PTR [ecx]
|
||||
|
||||
# Tests for op xmm/mem32, regl
|
||||
cvtss2si ecx,xmm4
|
||||
cvtss2si ecx,DWORD PTR [ecx]
|
||||
cvttss2si ecx,xmm4
|
||||
cvttss2si ecx,DWORD PTR [ecx]
|
||||
|
||||
# Tests for op imm8, xmm, regq/mem32
|
||||
extractps DWORD PTR [ecx],xmm4,100
|
||||
# Tests for op imm8, xmm, regl/mem32
|
||||
pextrd ecx,xmm4,100
|
||||
pextrd DWORD PTR [ecx],xmm4,100
|
||||
extractps ecx,xmm4,100
|
||||
extractps DWORD PTR [ecx],xmm4,100
|
||||
|
||||
# Tests for op regl/mem32, xmm[, xmm]
|
||||
cvtsi2sd xmm4,ecx
|
||||
cvtsi2sd xmm4,DWORD PTR [ecx]
|
||||
cvtsi2ss xmm4,ecx
|
||||
cvtsi2ss xmm4,DWORD PTR [ecx]
|
||||
|
||||
# Tests for op imm8, xmm/mem32, xmm[, xmm]
|
||||
cmpss xmm6,xmm4,100
|
||||
cmpss xmm6,DWORD PTR [ecx],100
|
||||
insertps xmm6,xmm4,100
|
||||
insertps xmm6,DWORD PTR [ecx],100
|
||||
roundss xmm6,xmm4,100
|
||||
roundss xmm6,DWORD PTR [ecx],100
|
||||
|
||||
# Tests for op xmm/m16, xmm
|
||||
pmovsxbq xmm6,xmm4
|
||||
pmovsxbq xmm4,WORD PTR [ecx]
|
||||
pmovzxbq xmm6,xmm4
|
||||
pmovzxbq xmm4,WORD PTR [ecx]
|
||||
|
||||
# Tests for op imm8, xmm, regl/mem16
|
||||
pextrw ecx,xmm4,100
|
||||
pextrw WORD PTR [ecx],xmm4,100
|
||||
|
||||
# Tests for op imm8, xmm, regq/mem16
|
||||
pextrw WORD PTR [ecx],xmm4,100
|
||||
|
||||
# Tests for op imm8, regl/mem16, xmm[, xmm]
|
||||
pinsrw xmm4,ecx,100
|
||||
pinsrw xmm4,WORD PTR [ecx],100
|
||||
|
||||
|
||||
# Tests for op imm8, xmm, regl/mem8
|
||||
pextrb ecx,xmm4,100
|
||||
pextrb BYTE PTR [ecx],xmm4,100
|
||||
|
||||
# Tests for op imm8, regl/mem8, xmm[, xmm]
|
||||
pinsrb xmm4,ecx,100
|
||||
pinsrb xmm4,BYTE PTR [ecx],100
|
||||
|
||||
# Tests for op imm8, xmm, regq/mem8
|
||||
pextrb BYTE PTR [ecx],xmm4,100
|
||||
|
||||
# Tests for op imm8, regl/mem8, xmm[, xmm]
|
||||
pinsrb xmm4,ecx,100
|
||||
pinsrb xmm4,BYTE PTR [ecx],100
|
||||
|
||||
# Tests for op xmm, xmm
|
||||
maskmovdqu xmm6,xmm4
|
||||
movq xmm6,xmm4
|
||||
|
||||
# Tests for op xmm, regl
|
||||
movmskpd ecx,xmm4
|
||||
movmskps ecx,xmm4
|
||||
pmovmskb ecx,xmm4
|
||||
# Tests for op xmm, xmm[, xmm]
|
||||
movhlps xmm6,xmm4
|
||||
movlhps xmm6,xmm4
|
||||
movsd xmm6,xmm4
|
||||
movss xmm6,xmm4
|
||||
|
||||
# Tests for op imm8, xmm[, xmm]
|
||||
pslld xmm4,100
|
||||
pslldq xmm4,100
|
||||
psllq xmm4,100
|
||||
psllw xmm4,100
|
||||
psrad xmm4,100
|
||||
psraw xmm4,100
|
||||
psrld xmm4,100
|
||||
psrldq xmm4,100
|
||||
psrlq xmm4,100
|
||||
psrlw xmm4,100
|
||||
|
||||
# Tests for op imm8, xmm, regl
|
||||
pextrw ecx,xmm4,100
|
||||
|
||||
|
|
|
|||
|
|
@ -150,14 +150,603 @@ Disassembly of section .text:
|
|||
[ ]*[a-f0-9]+: c5 c9 e0 31 vpavgb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e3 f4 vpavgw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e3 31 vpavgw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 44 f4 00 pclmullqlqdq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 44 31 00 pclmullqlqdq \(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 44 f4 01 pclmulhqlqdq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 44 31 01 pclmulhqlqdq \(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 44 f4 10 pclmullqhqdq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 44 31 10 pclmullqhqdq \(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 44 f4 11 pclmulhqhqdq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 44 31 11 pclmulhqhqdq \(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 74 f4 vpcmpeqb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 74 31 vpcmpeqb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 75 f4 vpcmpeqw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 75 31 vpcmpeqw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 76 f4 vpcmpeqd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 76 31 vpcmpeqd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 29 f4 vpcmpeqq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 29 31 vpcmpeqq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 64 f4 vpcmpgtb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 64 31 vpcmpgtb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 65 f4 vpcmpgtw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 65 31 vpcmpgtw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 66 f4 vpcmpgtd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 66 31 vpcmpgtd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 37 f4 vpcmpgtq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 37 31 vpcmpgtq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 01 f4 vphaddw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 01 31 vphaddw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 02 f4 vphaddd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 02 31 vphaddd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 03 f4 vphaddsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 03 31 vphaddsw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 05 f4 vphsubw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 05 31 vphsubw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 06 f4 vphsubd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 06 31 vphsubd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 07 f4 vphsubsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 07 31 vphsubsw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f5 f4 vpmaddwd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f5 31 vpmaddwd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 04 f4 vpmaddubsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 04 31 vpmaddubsw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3c f4 vpmaxsb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3c 31 vpmaxsb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ee f4 vpmaxsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ee 31 vpmaxsw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3d f4 vpmaxsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3d 31 vpmaxsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 de f4 vpmaxub %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 de 31 vpmaxub \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3e f4 vpmaxuw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3e 31 vpmaxuw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3f f4 vpmaxud %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3f 31 vpmaxud \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 38 f4 vpminsb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 38 31 vpminsb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ea f4 vpminsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ea 31 vpminsw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 39 f4 vpminsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 39 31 vpminsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 da f4 vpminub %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 da 31 vpminub \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3a f4 vpminuw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3a 31 vpminuw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3b f4 vpminud %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 3b 31 vpminud \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e4 f4 vpmulhuw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e4 31 vpmulhuw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 0b f4 vpmulhrsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 0b 31 vpmulhrsw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e5 f4 vpmulhw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e5 31 vpmulhw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d5 f4 vpmullw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d5 31 vpmullw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 40 f4 vpmulld %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 40 31 vpmulld \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f4 f4 vpmuludq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f4 31 vpmuludq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 28 f4 vpmuldq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 28 31 vpmuldq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 eb f4 vpor %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 eb 31 vpor \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f6 f4 vpsadbw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f6 31 vpsadbw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 00 f4 vpshufb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 00 31 vpshufb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 08 f4 vpsignb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 08 31 vpsignb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 09 f4 vpsignw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 09 31 vpsignw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 0a f4 vpsignd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 0a 31 vpsignd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f1 f4 vpsllw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f1 31 vpsllw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f2 f4 vpslld %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f2 31 vpslld \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f3 f4 vpsllq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f3 31 vpsllq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e1 f4 vpsraw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e1 31 vpsraw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e2 f4 vpsrad %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e2 31 vpsrad \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d1 f4 vpsrlw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d1 31 vpsrlw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d2 f4 vpsrld %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d2 31 vpsrld \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d3 f4 vpsrlq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d3 31 vpsrlq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f8 f4 vpsubb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f8 31 vpsubb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f9 f4 vpsubw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 f9 31 vpsubw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fa f4 vpsubd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fa 31 vpsubd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fb f4 vpsubq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fb 31 vpsubq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e8 f4 vpsubsb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e8 31 vpsubsb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e9 f4 vpsubsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e9 31 vpsubsw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d8 f4 vpsubusb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d8 31 vpsubusb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d9 f4 vpsubusw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d9 31 vpsubusw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 68 f4 vpunpckhbw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 68 31 vpunpckhbw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 69 f4 vpunpckhwd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 69 31 vpunpckhwd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6a f4 vpunpckhdq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6a 31 vpunpckhdq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6d f4 vpunpckhqdq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6d 31 vpunpckhqdq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 60 f4 vpunpcklbw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 60 31 vpunpcklbw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 61 f4 vpunpcklwd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 61 31 vpunpcklwd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 62 f4 vpunpckldq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 62 31 vpunpckldq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6c f4 vpunpcklqdq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6c 31 vpunpcklqdq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ef f4 vpxor %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ef 31 vpxor \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5c f4 vsubpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5c 31 vsubpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5c f4 vsubps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5c 31 vsubps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 15 f4 vunpckhpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 15 31 vunpckhpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 15 f4 vunpckhps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 15 31 vunpckhps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 14 f4 vunpcklpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 14 31 vunpcklpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 14 f4 vunpcklps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 14 31 vunpcklps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 57 f4 vxorpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 57 31 vxorpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 57 f4 vxorps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 57 31 vxorps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 dc f4 vaesenc %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 dc 31 vaesenc \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 dd f4 vaesenclast %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 dd 31 vaesenclast \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 de f4 vaesdec %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 de 31 vaesdec \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 df f4 vaesdeclast %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 df 31 vaesdeclast \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 00 vcmpeqpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 00 vcmpeqpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 00 vcmpeqps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 00 vcmpeqps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 01 vcmpltpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 01 vcmpltpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 01 vcmpltps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 01 vcmpltps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 02 vcmplepd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 02 vcmplepd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 02 vcmpleps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 02 vcmpleps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 03 vcmpunordpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 03 vcmpunordpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 03 vcmpunordps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 03 vcmpunordps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 04 vcmpneqpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 04 vcmpneqpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 04 vcmpneqps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 04 vcmpneqps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 05 vcmpnltpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 05 vcmpnltpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 05 vcmpnltps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 05 vcmpnltps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 06 vcmpnlepd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 06 vcmpnlepd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 06 vcmpnleps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 06 vcmpnleps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 07 vcmpordpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 07 vcmpordpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 07 vcmpordps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 07 vcmpordps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 df f4 64 vaeskeygenassist \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 df 31 64 vaeskeygenassist \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 61 f4 64 vpcmpestri \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 61 31 64 vpcmpestri \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 60 f4 64 vpcmpestrm \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 60 31 64 vpcmpestrm \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 63 f4 64 vpcmpistri \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 63 31 64 vpcmpistri \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 62 f4 64 vpcmpistrm \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 62 31 64 vpcmpistrm \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 70 f4 64 vpshufd \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 70 31 64 vpshufd \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 70 f4 64 vpshufhw \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 70 31 64 vpshufhw \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fb 70 f4 64 vpshuflw \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fb 70 31 64 vpshuflw \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 09 f4 64 vroundpd \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 09 31 64 vroundpd \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 08 f4 64 vroundps \$0x64,%xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 79 08 31 64 vroundps \$0x64,\(%rcx\),%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0d f4 64 vblendpd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0d 31 64 vblendpd \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0c f4 64 vblendps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0c 31 64 vblendps \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 f4 64 vcmppd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c2 31 64 vcmppd \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 f4 64 vcmpps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c2 31 64 vcmpps \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 41 f4 64 vdppd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 41 31 64 vdppd \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 40 f4 64 vdpps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 40 31 64 vdpps \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 42 f4 64 vmpsadbw \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 42 31 64 vmpsadbw \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0f f4 64 vpalignr \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0f 31 64 vpalignr \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0e f4 64 vpblendw \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0e 31 64 vpblendw \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c6 f4 64 vshufpd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 c6 31 64 vshufpd \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c6 f4 64 vshufps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 c6 31 64 vshufps \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4b f4 00 vblendvpd %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4b 31 00 vblendvpd %xmm0,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4b f4 00 vblendvpd %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4b 31 00 vblendvpd %xmm0,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4a f4 00 vblendvps %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4a 31 00 vblendvps %xmm0,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4a f4 00 vblendvps %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4a 31 00 vblendvps %xmm0,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4c f4 00 vpblendvb %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4c 31 00 vpblendvb %xmm0,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4c f4 00 vpblendvb %xmm0,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 4c 31 00 vpblendvb %xmm0,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 2f f4 vcomisd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 2f 21 vcomisd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa e6 f4 vcvtdq2pd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 5a f4 vcvtps2pd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 5a 21 vcvtps2pd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fb 12 f4 vmovddup %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fb 12 21 vmovddup \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 20 f4 vpmovsxbw %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 20 21 vpmovsxbw \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 23 f4 vpmovsxwd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 23 21 vpmovsxwd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 25 f4 vpmovsxdq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 25 21 vpmovsxdq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 30 f4 vpmovzxbw %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 30 21 vpmovzxbw \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 33 f4 vpmovzxwd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 33 21 vpmovzxwd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 35 f4 vpmovzxdq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 35 21 vpmovzxdq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 2e f4 vucomisd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 2e 21 vucomisd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fb 10 21 vmovsd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 13 21 vmovlpd %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 13 21 vmovlps %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 17 21 vmovhpd %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 17 21 vmovhps %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 fb 11 21 vmovsd %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e1 f9 7e e1 vmovq %xmm4,%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 f9 6e e1 vmovq %rcx,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e1 f9 7e e1 vmovq %xmm4,%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 f9 6e e1 vmovq %rcx,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fb 2d cc vcvtsd2si %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 fb 2d 09 vcvtsd2si \(%rcx\),%ecx
|
||||
[ ]*[a-f0-9]+: c5 fb 2c cc vcvttsd2si %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 fb 2c 09 vcvttsd2si \(%rcx\),%ecx
|
||||
[ ]*[a-f0-9]+: c4 e1 fb 2d cc vcvtsd2si %xmm4,%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 fb 2d 09 vcvtsd2si \(%rcx\),%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 fb 2c cc vcvttsd2si %xmm4,%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 fb 2c 09 vcvttsd2si \(%rcx\),%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 db 2a e1 vcvtsi2sd %rcx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e1 db 2a 21 vcvtsi2sdq \(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e1 da 2a e1 vcvtsi2ss %rcx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e1 da 2a 21 vcvtsi2ssq \(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 d9 22 e1 64 vpinsrq \$0x64,%rcx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 d9 22 21 64 vpinsrq \$0x64,\(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 f9 16 e1 64 vpextrq \$0x64,%xmm4,%rcx
|
||||
[ ]*[a-f0-9]+: c4 e3 f9 16 21 64 vpextrq \$0x64,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 d9 12 21 vmovlpd \(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d8 12 21 vmovlps \(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 16 21 vmovhpd \(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d8 16 21 vmovhps \(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 64 vcmpsd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 64 vcmpsd \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0b f4 64 vroundsd \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0b 31 64 vroundsd \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 58 f4 vaddsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 58 31 vaddsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5a f4 vcvtsd2ss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5a 31 vcvtsd2ss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5e f4 vdivsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5e 31 vdivsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5f f4 vmaxsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5f 31 vmaxsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5d f4 vminsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5d 31 vminsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 59 f4 vmulsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 59 31 vmulsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 51 f4 vsqrtsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 51 31 vsqrtsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5c f4 vsubsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 5c 31 vsubsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 00 vcmpeqsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 00 vcmpeqsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 01 vcmpltsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 01 vcmpltsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 02 vcmplesd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 02 vcmplesd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 03 vcmpunordsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 03 vcmpunordsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 04 vcmpneqsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 04 vcmpneqsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 05 vcmpnltsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 05 vcmpnltsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 06 vcmpnlesd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 06 vcmpnlesd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 f4 07 vcmpordsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb c2 31 07 vcmpordsd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 58 f4 vaddss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 58 31 vaddss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5a f4 vcvtss2sd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5a 31 vcvtss2sd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5e f4 vdivss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5e 31 vdivss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5f f4 vmaxss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5f 31 vmaxss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5d f4 vminss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5d 31 vminss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 59 f4 vmulss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 59 31 vmulss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 53 f4 vrcpss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 53 31 vrcpss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 52 f4 vrsqrtss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 52 31 vrsqrtss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 51 f4 vsqrtss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 51 31 vsqrtss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5c f4 vsubss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 5c 31 vsubss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 00 vcmpeqss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 00 vcmpeqss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 01 vcmpltss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 01 vcmpltss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 02 vcmpless %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 02 vcmpless \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 03 vcmpunordss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 03 vcmpunordss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 04 vcmpneqss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 04 vcmpneqss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 05 vcmpnltss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 05 vcmpnltss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 06 vcmpnless %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 06 vcmpnless \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 07 vcmpordss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 07 vcmpordss \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 2f f4 vcomiss %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 2f 21 vcomiss \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 21 f4 vpmovsxbd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 21 21 vpmovsxbd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 24 f4 vpmovsxwq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 24 21 vpmovsxwq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 31 f4 vpmovzxbd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 31 21 vpmovzxbd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 34 f4 vpmovzxwq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 34 21 vpmovzxwq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 2e f4 vucomiss %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 2e 21 vucomiss \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 10 21 vmovss \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 11 21 vmovss %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 7e e1 vmovd %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f9 7e 21 vmovd %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 6e e1 vmovd %ecx,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 6e 21 vmovd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 2d cc vcvtss2si %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 fa 2d 09 vcvtss2si \(%rcx\),%ecx
|
||||
[ ]*[a-f0-9]+: c5 fa 2c cc vcvttss2si %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 fa 2c 09 vcvttss2si \(%rcx\),%ecx
|
||||
[ ]*[a-f0-9]+: c4 e1 fa 2d cc vcvtss2si %xmm4,%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 fa 2d 09 vcvtss2si \(%rcx\),%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 fa 2c cc vcvttss2si %xmm4,%rcx
|
||||
[ ]*[a-f0-9]+: c4 e1 fa 2c 09 vcvttss2si \(%rcx\),%rcx
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f8 50 cc vmovmskps %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f9 d7 cc vpmovmskb %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 64 vextractps \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 64 vextractps \$0x64,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 e1 64 vpextrd \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 16 21 64 vpextrd \$0x64,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 e1 64 vextractps \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 17 21 64 vextractps \$0x64,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 db 2a e1 vcvtsi2sd %ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 db 2a 21 vcvtsi2sdl \(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 da 2a e1 vcvtsi2ss %ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 da 2a 21 vcvtsi2ssl \(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 ca c2 f4 64 vcmpss \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca c2 31 64 vcmpss \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 21 f4 64 vinsertps \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 21 31 64 vinsertps \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0a f4 64 vroundss \$0x64,%xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e3 49 0a 31 64 vroundss \$0x64,\(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 22 f4 vpmovsxbq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 22 21 vpmovsxbq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 32 f4 vpmovzxbq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 32 21 vpmovzxbq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 64 vpextrw \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 15 21 64 vpextrw \$0x64,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 64 vpextrw \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 15 21 64 vpextrw \$0x64,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 d9 c4 e1 64 vpinsrw \$0x64,%ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 c4 21 64 vpinsrw \$0x64,\(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 c4 e1 64 vpinsrw \$0x64,%ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 c4 21 64 vpinsrw \$0x64,\(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 64 vpextrb \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 64 vpextrb \$0x64,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 e1 64 vpinsrb \$0x64,%ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 21 64 vpinsrb \$0x64,\(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 64 vpextrw \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 e1 64 vpextrb \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c4 e3 79 14 21 64 vpextrb \$0x64,%xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 e1 64 vpinsrb \$0x64,%ecx,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e3 59 20 21 64 vpinsrb \$0x64,\(%rcx\),%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 f7 f4 vmaskmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 50 cc vmovmskpd %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f8 50 cc vmovmskps %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f9 d7 cc vpmovmskb %xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 c8 12 f4 vmovhlps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 16 f4 vmovlhps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 10 f4 vmovsd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 ca 10 f4 vmovss %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 d9 72 f4 64 vpslld \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 73 fc 64 vpslldq \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 73 f4 64 vpsllq \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 71 f4 64 vpsllw \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 72 e4 64 vpsrad \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 71 e4 64 vpsraw \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 72 d4 64 vpsrld \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 73 dc 64 vpsrldq \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 73 d4 64 vpsrlq \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 d9 71 d4 64 vpsrlw \$0x64,%xmm4,%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 c5 cc 64 vpextrw \$0x64,%xmm4,%ecx
|
||||
[ ]*[a-f0-9]+: c5 f8 ae 11 vldmxcsr \(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 ae 19 vstmxcsr \(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 5b f4 vcvtdq2ps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 5b 21 vcvtdq2ps \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fb e6 f4 vcvtpd2dq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fb e6 21 vcvtpd2dqx \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 5a f4 vcvtpd2ps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 5a 21 vcvtpd2psx \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 5b f4 vcvtps2dq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 5b 21 vcvtps2dq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 e6 f4 vcvttpd2dq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 e6 21 vcvttpd2dqx \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 5b f4 vcvttps2dq %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 5b 21 vcvttps2dq \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 28 f4 vmovapd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 28 21 vmovapd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 28 f4 vmovaps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 28 21 vmovaps \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 6f f4 vmovdqa %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 6f 21 vmovdqa \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 6f f4 vmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 6f 21 vmovdqu \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 16 f4 vmovshdup %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 16 21 vmovshdup \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 fa 12 f4 vmovsldup %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 12 21 vmovsldup \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 10 f4 vmovupd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 10 21 vmovupd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 10 f4 vmovups %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 10 21 vmovups \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1c f4 vpabsb %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1c 21 vpabsb \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1d f4 vpabsw %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1d 21 vpabsw \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1e f4 vpabsd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 1e 21 vpabsd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 41 f4 vphminposuw %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 41 21 vphminposuw \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 17 f4 vptest %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 17 21 vptest \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 53 f4 vrcpps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 53 21 vrcpps \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 52 f4 vrsqrtps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 52 21 vrsqrtps \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 51 f4 vsqrtpd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 51 21 vsqrtpd \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f8 51 f4 vsqrtps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 51 21 vsqrtps \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 db f4 vaesimc %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 79 db 21 vaesimc \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 28 f4 vmovapd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 29 21 vmovapd %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 28 f4 vmovaps %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 29 21 vmovaps %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 6f f4 vmovdqa %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 7f 21 vmovdqa %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 fa 6f f4 vmovdqu %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 fa 7f 21 vmovdqu %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 10 f4 vmovupd %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f9 11 21 vmovupd %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 10 f4 vmovups %xmm4,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 f8 11 21 vmovups %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 fb f0 21 vlddqu \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c4 e2 79 2a 21 vmovntdqa \(%rcx\),%xmm4
|
||||
[ ]*[a-f0-9]+: c5 f9 e7 21 vmovntdq %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f9 2b 21 vmovntpd %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 f8 2b 21 vmovntps %xmm4,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: c5 c9 58 f4 vaddpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 58 31 vaddpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 58 f4 vaddps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 58 31 vaddps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d0 f4 vaddsubpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d0 31 vaddsubpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb d0 f4 vaddsubps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb d0 31 vaddsubps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 55 f4 vandnpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 55 31 vandnpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 55 f4 vandnps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 55 31 vandnps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 54 f4 vandpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 54 31 vandpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 54 f4 vandps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 54 31 vandps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5e f4 vdivpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5e 31 vdivpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5e f4 vdivps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5e 31 vdivps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 7c f4 vhaddpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 7c 31 vhaddpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 7c f4 vhaddps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 7c 31 vhaddps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 7d f4 vhsubpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 7d 31 vhsubpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 7d f4 vhsubps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 cb 7d 31 vhsubps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5f f4 vmaxpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5f 31 vmaxpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5f f4 vmaxps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5f 31 vmaxps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5d f4 vminpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 5d 31 vminpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5d f4 vminps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 5d 31 vminps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 59 f4 vmulpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 59 31 vmulpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 59 f4 vmulps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 59 31 vmulps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 56 f4 vorpd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 56 31 vorpd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 56 f4 vorps %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c8 56 31 vorps \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 63 f4 vpacksswb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 63 31 vpacksswb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6b f4 vpackssdw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 6b 31 vpackssdw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 67 f4 vpackuswb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 67 31 vpackuswb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 2b f4 vpackusdw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c4 e2 49 2b 31 vpackusdw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fc f4 vpaddb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fc 31 vpaddb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fd f4 vpaddw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fd 31 vpaddw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fe f4 vpaddd %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 fe 31 vpaddd \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d4 f4 vpaddq %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 d4 31 vpaddq \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ec f4 vpaddsb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ec 31 vpaddsb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ed f4 vpaddsw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 ed 31 vpaddsw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 dc f4 vpaddusb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 dc 31 vpaddusb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 dd f4 vpaddusw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 dd 31 vpaddusw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 db f4 vpand %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 db 31 vpand \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 df f4 vpandn %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 df 31 vpandn \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e0 f4 vpavgb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e0 31 vpavgb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e3 f4 vpavgw %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 e3 31 vpavgw \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 74 f4 vpcmpeqb %xmm4,%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 74 31 vpcmpeqb \(%rcx\),%xmm6,%xmm6
|
||||
[ ]*[a-f0-9]+: c5 c9 75 f4 vpcmpeqw %xmm4,%xmm6,%xmm6
|
||||
|
|
|
|||
|
|
@ -157,14 +157,6 @@ _start:
|
|||
pavgb (%rcx),%xmm6
|
||||
pavgw %xmm4,%xmm6
|
||||
pavgw (%rcx),%xmm6
|
||||
pclmullqlqdq %xmm4,%xmm6
|
||||
pclmullqlqdq (%rcx),%xmm6
|
||||
pclmulhqlqdq %xmm4,%xmm6
|
||||
pclmulhqlqdq (%rcx),%xmm6
|
||||
pclmullqhqdq %xmm4,%xmm6
|
||||
pclmullqhqdq (%rcx),%xmm6
|
||||
pclmulhqhqdq %xmm4,%xmm6
|
||||
pclmulhqhqdq (%rcx),%xmm6
|
||||
pcmpeqb %xmm4,%xmm6
|
||||
pcmpeqb (%rcx),%xmm6
|
||||
pcmpeqw %xmm4,%xmm6
|
||||
|
|
@ -703,3 +695,697 @@ _start:
|
|||
# Tests for op imm8, xmm, regl
|
||||
pextrw $100,%xmm4,%ecx
|
||||
|
||||
|
||||
.intel_syntax noprefix
|
||||
# Tests for op mem64
|
||||
ldmxcsr DWORD PTR [rcx]
|
||||
stmxcsr DWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm/mem128, xmm
|
||||
cvtdq2ps xmm6,xmm4
|
||||
cvtdq2ps xmm4,XMMWORD PTR [rcx]
|
||||
cvtpd2dq xmm6,xmm4
|
||||
cvtpd2dq xmm4,XMMWORD PTR [rcx]
|
||||
cvtpd2ps xmm6,xmm4
|
||||
cvtpd2ps xmm4,XMMWORD PTR [rcx]
|
||||
cvtps2dq xmm6,xmm4
|
||||
cvtps2dq xmm4,XMMWORD PTR [rcx]
|
||||
cvttpd2dq xmm6,xmm4
|
||||
cvttpd2dq xmm4,XMMWORD PTR [rcx]
|
||||
cvttps2dq xmm6,xmm4
|
||||
cvttps2dq xmm4,XMMWORD PTR [rcx]
|
||||
movapd xmm6,xmm4
|
||||
movapd xmm4,XMMWORD PTR [rcx]
|
||||
movaps xmm6,xmm4
|
||||
movaps xmm4,XMMWORD PTR [rcx]
|
||||
movdqa xmm6,xmm4
|
||||
movdqa xmm4,XMMWORD PTR [rcx]
|
||||
movdqu xmm6,xmm4
|
||||
movdqu xmm4,XMMWORD PTR [rcx]
|
||||
movshdup xmm6,xmm4
|
||||
movshdup xmm4,XMMWORD PTR [rcx]
|
||||
movsldup xmm6,xmm4
|
||||
movsldup xmm4,XMMWORD PTR [rcx]
|
||||
movupd xmm6,xmm4
|
||||
movupd xmm4,XMMWORD PTR [rcx]
|
||||
movups xmm6,xmm4
|
||||
movups xmm4,XMMWORD PTR [rcx]
|
||||
pabsb xmm6,xmm4
|
||||
pabsb xmm4,XMMWORD PTR [rcx]
|
||||
pabsw xmm6,xmm4
|
||||
pabsw xmm4,XMMWORD PTR [rcx]
|
||||
pabsd xmm6,xmm4
|
||||
pabsd xmm4,XMMWORD PTR [rcx]
|
||||
phminposuw xmm6,xmm4
|
||||
phminposuw xmm4,XMMWORD PTR [rcx]
|
||||
ptest xmm6,xmm4
|
||||
ptest xmm4,XMMWORD PTR [rcx]
|
||||
rcpps xmm6,xmm4
|
||||
rcpps xmm4,XMMWORD PTR [rcx]
|
||||
rsqrtps xmm6,xmm4
|
||||
rsqrtps xmm4,XMMWORD PTR [rcx]
|
||||
sqrtpd xmm6,xmm4
|
||||
sqrtpd xmm4,XMMWORD PTR [rcx]
|
||||
sqrtps xmm6,xmm4
|
||||
sqrtps xmm4,XMMWORD PTR [rcx]
|
||||
aesimc xmm6,xmm4
|
||||
aesimc xmm4,XMMWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm, xmm/mem128
|
||||
movapd xmm6,xmm4
|
||||
movapd XMMWORD PTR [rcx],xmm4
|
||||
movaps xmm6,xmm4
|
||||
movaps XMMWORD PTR [rcx],xmm4
|
||||
movdqa xmm6,xmm4
|
||||
movdqa XMMWORD PTR [rcx],xmm4
|
||||
movdqu xmm6,xmm4
|
||||
movdqu XMMWORD PTR [rcx],xmm4
|
||||
movupd xmm6,xmm4
|
||||
movupd XMMWORD PTR [rcx],xmm4
|
||||
movups xmm6,xmm4
|
||||
movups XMMWORD PTR [rcx],xmm4
|
||||
|
||||
# Tests for op mem128, xmm
|
||||
lddqu xmm4,XMMWORD PTR [rcx]
|
||||
movntdqa xmm4,XMMWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm, mem128
|
||||
movntdq XMMWORD PTR [rcx],xmm4
|
||||
movntpd XMMWORD PTR [rcx],xmm4
|
||||
movntps XMMWORD PTR [rcx],xmm4
|
||||
|
||||
# Tests for op xmm/mem128, xmm[, xmm]
|
||||
addpd xmm6,xmm4
|
||||
addpd xmm6,XMMWORD PTR [rcx]
|
||||
addps xmm6,xmm4
|
||||
addps xmm6,XMMWORD PTR [rcx]
|
||||
addsubpd xmm6,xmm4
|
||||
addsubpd xmm6,XMMWORD PTR [rcx]
|
||||
addsubps xmm6,xmm4
|
||||
addsubps xmm6,XMMWORD PTR [rcx]
|
||||
andnpd xmm6,xmm4
|
||||
andnpd xmm6,XMMWORD PTR [rcx]
|
||||
andnps xmm6,xmm4
|
||||
andnps xmm6,XMMWORD PTR [rcx]
|
||||
andpd xmm6,xmm4
|
||||
andpd xmm6,XMMWORD PTR [rcx]
|
||||
andps xmm6,xmm4
|
||||
andps xmm6,XMMWORD PTR [rcx]
|
||||
divpd xmm6,xmm4
|
||||
divpd xmm6,XMMWORD PTR [rcx]
|
||||
divps xmm6,xmm4
|
||||
divps xmm6,XMMWORD PTR [rcx]
|
||||
haddpd xmm6,xmm4
|
||||
haddpd xmm6,XMMWORD PTR [rcx]
|
||||
haddps xmm6,xmm4
|
||||
haddps xmm6,XMMWORD PTR [rcx]
|
||||
hsubpd xmm6,xmm4
|
||||
hsubpd xmm6,XMMWORD PTR [rcx]
|
||||
hsubps xmm6,xmm4
|
||||
hsubps xmm6,XMMWORD PTR [rcx]
|
||||
maxpd xmm6,xmm4
|
||||
maxpd xmm6,XMMWORD PTR [rcx]
|
||||
maxps xmm6,xmm4
|
||||
maxps xmm6,XMMWORD PTR [rcx]
|
||||
minpd xmm6,xmm4
|
||||
minpd xmm6,XMMWORD PTR [rcx]
|
||||
minps xmm6,xmm4
|
||||
minps xmm6,XMMWORD PTR [rcx]
|
||||
mulpd xmm6,xmm4
|
||||
mulpd xmm6,XMMWORD PTR [rcx]
|
||||
mulps xmm6,xmm4
|
||||
mulps xmm6,XMMWORD PTR [rcx]
|
||||
orpd xmm6,xmm4
|
||||
orpd xmm6,XMMWORD PTR [rcx]
|
||||
orps xmm6,xmm4
|
||||
orps xmm6,XMMWORD PTR [rcx]
|
||||
packsswb xmm6,xmm4
|
||||
packsswb xmm6,XMMWORD PTR [rcx]
|
||||
packssdw xmm6,xmm4
|
||||
packssdw xmm6,XMMWORD PTR [rcx]
|
||||
packuswb xmm6,xmm4
|
||||
packuswb xmm6,XMMWORD PTR [rcx]
|
||||
packusdw xmm6,xmm4
|
||||
packusdw xmm6,XMMWORD PTR [rcx]
|
||||
paddb xmm6,xmm4
|
||||
paddb xmm6,XMMWORD PTR [rcx]
|
||||
paddw xmm6,xmm4
|
||||
paddw xmm6,XMMWORD PTR [rcx]
|
||||
paddd xmm6,xmm4
|
||||
paddd xmm6,XMMWORD PTR [rcx]
|
||||
paddq xmm6,xmm4
|
||||
paddq xmm6,XMMWORD PTR [rcx]
|
||||
paddsb xmm6,xmm4
|
||||
paddsb xmm6,XMMWORD PTR [rcx]
|
||||
paddsw xmm6,xmm4
|
||||
paddsw xmm6,XMMWORD PTR [rcx]
|
||||
paddusb xmm6,xmm4
|
||||
paddusb xmm6,XMMWORD PTR [rcx]
|
||||
paddusw xmm6,xmm4
|
||||
paddusw xmm6,XMMWORD PTR [rcx]
|
||||
pand xmm6,xmm4
|
||||
pand xmm6,XMMWORD PTR [rcx]
|
||||
pandn xmm6,xmm4
|
||||
pandn xmm6,XMMWORD PTR [rcx]
|
||||
pavgb xmm6,xmm4
|
||||
pavgb xmm6,XMMWORD PTR [rcx]
|
||||
pavgw xmm6,xmm4
|
||||
pavgw xmm6,XMMWORD PTR [rcx]
|
||||
pcmpeqb xmm6,xmm4
|
||||
pcmpeqb xmm6,XMMWORD PTR [rcx]
|
||||
pcmpeqw xmm6,xmm4
|
||||
pcmpeqw xmm6,XMMWORD PTR [rcx]
|
||||
pcmpeqd xmm6,xmm4
|
||||
pcmpeqd xmm6,XMMWORD PTR [rcx]
|
||||
pcmpeqq xmm6,xmm4
|
||||
pcmpeqq xmm6,XMMWORD PTR [rcx]
|
||||
pcmpgtb xmm6,xmm4
|
||||
pcmpgtb xmm6,XMMWORD PTR [rcx]
|
||||
pcmpgtw xmm6,xmm4
|
||||
pcmpgtw xmm6,XMMWORD PTR [rcx]
|
||||
pcmpgtd xmm6,xmm4
|
||||
pcmpgtd xmm6,XMMWORD PTR [rcx]
|
||||
pcmpgtq xmm6,xmm4
|
||||
pcmpgtq xmm6,XMMWORD PTR [rcx]
|
||||
phaddw xmm6,xmm4
|
||||
phaddw xmm6,XMMWORD PTR [rcx]
|
||||
phaddd xmm6,xmm4
|
||||
phaddd xmm6,XMMWORD PTR [rcx]
|
||||
phaddsw xmm6,xmm4
|
||||
phaddsw xmm6,XMMWORD PTR [rcx]
|
||||
phsubw xmm6,xmm4
|
||||
phsubw xmm6,XMMWORD PTR [rcx]
|
||||
phsubd xmm6,xmm4
|
||||
phsubd xmm6,XMMWORD PTR [rcx]
|
||||
phsubsw xmm6,xmm4
|
||||
phsubsw xmm6,XMMWORD PTR [rcx]
|
||||
pmaddwd xmm6,xmm4
|
||||
pmaddwd xmm6,XMMWORD PTR [rcx]
|
||||
pmaddubsw xmm6,xmm4
|
||||
pmaddubsw xmm6,XMMWORD PTR [rcx]
|
||||
pmaxsb xmm6,xmm4
|
||||
pmaxsb xmm6,XMMWORD PTR [rcx]
|
||||
pmaxsw xmm6,xmm4
|
||||
pmaxsw xmm6,XMMWORD PTR [rcx]
|
||||
pmaxsd xmm6,xmm4
|
||||
pmaxsd xmm6,XMMWORD PTR [rcx]
|
||||
pmaxub xmm6,xmm4
|
||||
pmaxub xmm6,XMMWORD PTR [rcx]
|
||||
pmaxuw xmm6,xmm4
|
||||
pmaxuw xmm6,XMMWORD PTR [rcx]
|
||||
pmaxud xmm6,xmm4
|
||||
pmaxud xmm6,XMMWORD PTR [rcx]
|
||||
pminsb xmm6,xmm4
|
||||
pminsb xmm6,XMMWORD PTR [rcx]
|
||||
pminsw xmm6,xmm4
|
||||
pminsw xmm6,XMMWORD PTR [rcx]
|
||||
pminsd xmm6,xmm4
|
||||
pminsd xmm6,XMMWORD PTR [rcx]
|
||||
pminub xmm6,xmm4
|
||||
pminub xmm6,XMMWORD PTR [rcx]
|
||||
pminuw xmm6,xmm4
|
||||
pminuw xmm6,XMMWORD PTR [rcx]
|
||||
pminud xmm6,xmm4
|
||||
pminud xmm6,XMMWORD PTR [rcx]
|
||||
pmulhuw xmm6,xmm4
|
||||
pmulhuw xmm6,XMMWORD PTR [rcx]
|
||||
pmulhrsw xmm6,xmm4
|
||||
pmulhrsw xmm6,XMMWORD PTR [rcx]
|
||||
pmulhw xmm6,xmm4
|
||||
pmulhw xmm6,XMMWORD PTR [rcx]
|
||||
pmullw xmm6,xmm4
|
||||
pmullw xmm6,XMMWORD PTR [rcx]
|
||||
pmulld xmm6,xmm4
|
||||
pmulld xmm6,XMMWORD PTR [rcx]
|
||||
pmuludq xmm6,xmm4
|
||||
pmuludq xmm6,XMMWORD PTR [rcx]
|
||||
pmuldq xmm6,xmm4
|
||||
pmuldq xmm6,XMMWORD PTR [rcx]
|
||||
por xmm6,xmm4
|
||||
por xmm6,XMMWORD PTR [rcx]
|
||||
psadbw xmm6,xmm4
|
||||
psadbw xmm6,XMMWORD PTR [rcx]
|
||||
pshufb xmm6,xmm4
|
||||
pshufb xmm6,XMMWORD PTR [rcx]
|
||||
psignb xmm6,xmm4
|
||||
psignb xmm6,XMMWORD PTR [rcx]
|
||||
psignw xmm6,xmm4
|
||||
psignw xmm6,XMMWORD PTR [rcx]
|
||||
psignd xmm6,xmm4
|
||||
psignd xmm6,XMMWORD PTR [rcx]
|
||||
psllw xmm6,xmm4
|
||||
psllw xmm6,XMMWORD PTR [rcx]
|
||||
pslld xmm6,xmm4
|
||||
pslld xmm6,XMMWORD PTR [rcx]
|
||||
psllq xmm6,xmm4
|
||||
psllq xmm6,XMMWORD PTR [rcx]
|
||||
psraw xmm6,xmm4
|
||||
psraw xmm6,XMMWORD PTR [rcx]
|
||||
psrad xmm6,xmm4
|
||||
psrad xmm6,XMMWORD PTR [rcx]
|
||||
psrlw xmm6,xmm4
|
||||
psrlw xmm6,XMMWORD PTR [rcx]
|
||||
psrld xmm6,xmm4
|
||||
psrld xmm6,XMMWORD PTR [rcx]
|
||||
psrlq xmm6,xmm4
|
||||
psrlq xmm6,XMMWORD PTR [rcx]
|
||||
psubb xmm6,xmm4
|
||||
psubb xmm6,XMMWORD PTR [rcx]
|
||||
psubw xmm6,xmm4
|
||||
psubw xmm6,XMMWORD PTR [rcx]
|
||||
psubd xmm6,xmm4
|
||||
psubd xmm6,XMMWORD PTR [rcx]
|
||||
psubq xmm6,xmm4
|
||||
psubq xmm6,XMMWORD PTR [rcx]
|
||||
psubsb xmm6,xmm4
|
||||
psubsb xmm6,XMMWORD PTR [rcx]
|
||||
psubsw xmm6,xmm4
|
||||
psubsw xmm6,XMMWORD PTR [rcx]
|
||||
psubusb xmm6,xmm4
|
||||
psubusb xmm6,XMMWORD PTR [rcx]
|
||||
psubusw xmm6,xmm4
|
||||
psubusw xmm6,XMMWORD PTR [rcx]
|
||||
punpckhbw xmm6,xmm4
|
||||
punpckhbw xmm6,XMMWORD PTR [rcx]
|
||||
punpckhwd xmm6,xmm4
|
||||
punpckhwd xmm6,XMMWORD PTR [rcx]
|
||||
punpckhdq xmm6,xmm4
|
||||
punpckhdq xmm6,XMMWORD PTR [rcx]
|
||||
punpckhqdq xmm6,xmm4
|
||||
punpckhqdq xmm6,XMMWORD PTR [rcx]
|
||||
punpcklbw xmm6,xmm4
|
||||
punpcklbw xmm6,XMMWORD PTR [rcx]
|
||||
punpcklwd xmm6,xmm4
|
||||
punpcklwd xmm6,XMMWORD PTR [rcx]
|
||||
punpckldq xmm6,xmm4
|
||||
punpckldq xmm6,XMMWORD PTR [rcx]
|
||||
punpcklqdq xmm6,xmm4
|
||||
punpcklqdq xmm6,XMMWORD PTR [rcx]
|
||||
pxor xmm6,xmm4
|
||||
pxor xmm6,XMMWORD PTR [rcx]
|
||||
subpd xmm6,xmm4
|
||||
subpd xmm6,XMMWORD PTR [rcx]
|
||||
subps xmm6,xmm4
|
||||
subps xmm6,XMMWORD PTR [rcx]
|
||||
unpckhpd xmm6,xmm4
|
||||
unpckhpd xmm6,XMMWORD PTR [rcx]
|
||||
unpckhps xmm6,xmm4
|
||||
unpckhps xmm6,XMMWORD PTR [rcx]
|
||||
unpcklpd xmm6,xmm4
|
||||
unpcklpd xmm6,XMMWORD PTR [rcx]
|
||||
unpcklps xmm6,xmm4
|
||||
unpcklps xmm6,XMMWORD PTR [rcx]
|
||||
xorpd xmm6,xmm4
|
||||
xorpd xmm6,XMMWORD PTR [rcx]
|
||||
xorps xmm6,xmm4
|
||||
xorps xmm6,XMMWORD PTR [rcx]
|
||||
aesenc xmm6,xmm4
|
||||
aesenc xmm6,XMMWORD PTR [rcx]
|
||||
aesenclast xmm6,xmm4
|
||||
aesenclast xmm6,XMMWORD PTR [rcx]
|
||||
aesdec xmm6,xmm4
|
||||
aesdec xmm6,XMMWORD PTR [rcx]
|
||||
aesdeclast xmm6,xmm4
|
||||
aesdeclast xmm6,XMMWORD PTR [rcx]
|
||||
cmpeqpd xmm6,xmm4
|
||||
cmpeqpd xmm6,XMMWORD PTR [rcx]
|
||||
cmpeqps xmm6,xmm4
|
||||
cmpeqps xmm6,XMMWORD PTR [rcx]
|
||||
cmpltpd xmm6,xmm4
|
||||
cmpltpd xmm6,XMMWORD PTR [rcx]
|
||||
cmpltps xmm6,xmm4
|
||||
cmpltps xmm6,XMMWORD PTR [rcx]
|
||||
cmplepd xmm6,xmm4
|
||||
cmplepd xmm6,XMMWORD PTR [rcx]
|
||||
cmpleps xmm6,xmm4
|
||||
cmpleps xmm6,XMMWORD PTR [rcx]
|
||||
cmpunordpd xmm6,xmm4
|
||||
cmpunordpd xmm6,XMMWORD PTR [rcx]
|
||||
cmpunordps xmm6,xmm4
|
||||
cmpunordps xmm6,XMMWORD PTR [rcx]
|
||||
cmpneqpd xmm6,xmm4
|
||||
cmpneqpd xmm6,XMMWORD PTR [rcx]
|
||||
cmpneqps xmm6,xmm4
|
||||
cmpneqps xmm6,XMMWORD PTR [rcx]
|
||||
cmpnltpd xmm6,xmm4
|
||||
cmpnltpd xmm6,XMMWORD PTR [rcx]
|
||||
cmpnltps xmm6,xmm4
|
||||
cmpnltps xmm6,XMMWORD PTR [rcx]
|
||||
cmpnlepd xmm6,xmm4
|
||||
cmpnlepd xmm6,XMMWORD PTR [rcx]
|
||||
cmpnleps xmm6,xmm4
|
||||
cmpnleps xmm6,XMMWORD PTR [rcx]
|
||||
cmpordpd xmm6,xmm4
|
||||
cmpordpd xmm6,XMMWORD PTR [rcx]
|
||||
cmpordps xmm6,xmm4
|
||||
cmpordps xmm6,XMMWORD PTR [rcx]
|
||||
|
||||
# Tests for op imm8, xmm/mem128, xmm
|
||||
aeskeygenassist xmm6,xmm4,100
|
||||
aeskeygenassist xmm6,XMMWORD PTR [rcx],100
|
||||
pcmpestri xmm6,xmm4,100
|
||||
pcmpestri xmm6,XMMWORD PTR [rcx],100
|
||||
pcmpestrm xmm6,xmm4,100
|
||||
pcmpestrm xmm6,XMMWORD PTR [rcx],100
|
||||
pcmpistri xmm6,xmm4,100
|
||||
pcmpistri xmm6,XMMWORD PTR [rcx],100
|
||||
pcmpistrm xmm6,xmm4,100
|
||||
pcmpistrm xmm6,XMMWORD PTR [rcx],100
|
||||
pshufd xmm6,xmm4,100
|
||||
pshufd xmm6,XMMWORD PTR [rcx],100
|
||||
pshufhw xmm6,xmm4,100
|
||||
pshufhw xmm6,XMMWORD PTR [rcx],100
|
||||
pshuflw xmm6,xmm4,100
|
||||
pshuflw xmm6,XMMWORD PTR [rcx],100
|
||||
roundpd xmm6,xmm4,100
|
||||
roundpd xmm6,XMMWORD PTR [rcx],100
|
||||
roundps xmm6,xmm4,100
|
||||
roundps xmm6,XMMWORD PTR [rcx],100
|
||||
|
||||
# Tests for op imm8, xmm/mem128, xmm[, xmm]
|
||||
blendpd xmm6,xmm4,100
|
||||
blendpd xmm6,XMMWORD PTR [rcx],100
|
||||
blendps xmm6,xmm4,100
|
||||
blendps xmm6,XMMWORD PTR [rcx],100
|
||||
cmppd xmm6,xmm4,100
|
||||
cmppd xmm6,XMMWORD PTR [rcx],100
|
||||
cmpps xmm6,xmm4,100
|
||||
cmpps xmm6,XMMWORD PTR [rcx],100
|
||||
dppd xmm6,xmm4,100
|
||||
dppd xmm6,XMMWORD PTR [rcx],100
|
||||
dpps xmm6,xmm4,100
|
||||
dpps xmm6,XMMWORD PTR [rcx],100
|
||||
mpsadbw xmm6,xmm4,100
|
||||
mpsadbw xmm6,XMMWORD PTR [rcx],100
|
||||
palignr xmm6,xmm4,100
|
||||
palignr xmm6,XMMWORD PTR [rcx],100
|
||||
pblendw xmm6,xmm4,100
|
||||
pblendw xmm6,XMMWORD PTR [rcx],100
|
||||
shufpd xmm6,xmm4,100
|
||||
shufpd xmm6,XMMWORD PTR [rcx],100
|
||||
shufps xmm6,xmm4,100
|
||||
shufps xmm6,XMMWORD PTR [rcx],100
|
||||
|
||||
# Tests for op xmm0, xmm/mem128, xmm[, xmm]
|
||||
blendvpd xmm6,xmm4,xmm0
|
||||
blendvpd xmm6,XMMWORD PTR [rcx],xmm0
|
||||
blendvpd xmm6,xmm4
|
||||
blendvpd xmm6,XMMWORD PTR [rcx]
|
||||
blendvps xmm6,xmm4,xmm0
|
||||
blendvps xmm6,XMMWORD PTR [rcx],xmm0
|
||||
blendvps xmm6,xmm4
|
||||
blendvps xmm6,XMMWORD PTR [rcx]
|
||||
pblendvb xmm6,xmm4,xmm0
|
||||
pblendvb xmm6,XMMWORD PTR [rcx],xmm0
|
||||
pblendvb xmm6,xmm4
|
||||
pblendvb xmm6,XMMWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm/mem64, xmm
|
||||
comisd xmm6,xmm4
|
||||
comisd xmm4,QWORD PTR [rcx]
|
||||
cvtdq2pd xmm6,xmm4
|
||||
cvtdq2pd xmm4,QWORD PTR [rcx]
|
||||
cvtps2pd xmm6,xmm4
|
||||
cvtps2pd xmm4,QWORD PTR [rcx]
|
||||
movddup xmm6,xmm4
|
||||
movddup xmm4,QWORD PTR [rcx]
|
||||
pmovsxbw xmm6,xmm4
|
||||
pmovsxbw xmm4,QWORD PTR [rcx]
|
||||
pmovsxwd xmm6,xmm4
|
||||
pmovsxwd xmm4,QWORD PTR [rcx]
|
||||
pmovsxdq xmm6,xmm4
|
||||
pmovsxdq xmm4,QWORD PTR [rcx]
|
||||
pmovzxbw xmm6,xmm4
|
||||
pmovzxbw xmm4,QWORD PTR [rcx]
|
||||
pmovzxwd xmm6,xmm4
|
||||
pmovzxwd xmm4,QWORD PTR [rcx]
|
||||
pmovzxdq xmm6,xmm4
|
||||
pmovzxdq xmm4,QWORD PTR [rcx]
|
||||
ucomisd xmm6,xmm4
|
||||
ucomisd xmm4,QWORD PTR [rcx]
|
||||
|
||||
# Tests for op mem64, xmm
|
||||
movsd xmm4,QWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm, mem64
|
||||
movlpd QWORD PTR [rcx],xmm4
|
||||
movlps QWORD PTR [rcx],xmm4
|
||||
movhpd QWORD PTR [rcx],xmm4
|
||||
movhps QWORD PTR [rcx],xmm4
|
||||
movsd QWORD PTR [rcx],xmm4
|
||||
|
||||
# Tests for op xmm, regq/mem64
|
||||
# Tests for op regq/mem64, xmm
|
||||
movd rcx,xmm4
|
||||
movd xmm4,rcx
|
||||
movq rcx,xmm4
|
||||
movq xmm4,rcx
|
||||
movq QWORD PTR [rcx],xmm4
|
||||
movq xmm4,QWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm/mem64, regl
|
||||
cvtsd2si ecx,xmm4
|
||||
cvtsd2si ecx,QWORD PTR [rcx]
|
||||
cvttsd2si ecx,xmm4
|
||||
cvttsd2si ecx,QWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm/mem64, regq
|
||||
cvtsd2si rcx,xmm4
|
||||
cvtsd2si rcx,QWORD PTR [rcx]
|
||||
cvttsd2si rcx,xmm4
|
||||
cvttsd2si rcx,QWORD PTR [rcx]
|
||||
|
||||
# Tests for op regq/mem64, xmm[, xmm]
|
||||
cvtsi2sdq xmm4,rcx
|
||||
cvtsi2sdq xmm4,QWORD PTR [rcx]
|
||||
cvtsi2ssq xmm4,rcx
|
||||
cvtsi2ssq xmm4,QWORD PTR [rcx]
|
||||
|
||||
# Tests for op imm8, regq/mem64, xmm[, xmm]
|
||||
pinsrq xmm4,rcx,100
|
||||
pinsrq xmm4,QWORD PTR [rcx],100
|
||||
|
||||
# Testsf for op imm8, xmm, regq/mem64
|
||||
pextrq rcx,xmm4,100
|
||||
pextrq QWORD PTR [rcx],xmm4,100
|
||||
|
||||
# Tests for op mem64, xmm[, xmm]
|
||||
movlpd xmm4,QWORD PTR [rcx]
|
||||
movlps xmm4,QWORD PTR [rcx]
|
||||
movhpd xmm4,QWORD PTR [rcx]
|
||||
movhps xmm4,QWORD PTR [rcx]
|
||||
|
||||
# Tests for op imm8, xmm/mem64, xmm[, xmm]
|
||||
cmpsd xmm6,xmm4,100
|
||||
cmpsd xmm6,QWORD PTR [rcx],100
|
||||
roundsd xmm6,xmm4,100
|
||||
roundsd xmm6,QWORD PTR [rcx],100
|
||||
|
||||
# Tests for op xmm/mem64, xmm[, xmm]
|
||||
addsd xmm6,xmm4
|
||||
addsd xmm6,QWORD PTR [rcx]
|
||||
cvtsd2ss xmm6,xmm4
|
||||
cvtsd2ss xmm6,QWORD PTR [rcx]
|
||||
divsd xmm6,xmm4
|
||||
divsd xmm6,QWORD PTR [rcx]
|
||||
maxsd xmm6,xmm4
|
||||
maxsd xmm6,QWORD PTR [rcx]
|
||||
minsd xmm6,xmm4
|
||||
minsd xmm6,QWORD PTR [rcx]
|
||||
mulsd xmm6,xmm4
|
||||
mulsd xmm6,QWORD PTR [rcx]
|
||||
sqrtsd xmm6,xmm4
|
||||
sqrtsd xmm6,QWORD PTR [rcx]
|
||||
subsd xmm6,xmm4
|
||||
subsd xmm6,QWORD PTR [rcx]
|
||||
cmpeqsd xmm6,xmm4
|
||||
cmpeqsd xmm6,QWORD PTR [rcx]
|
||||
cmpltsd xmm6,xmm4
|
||||
cmpltsd xmm6,QWORD PTR [rcx]
|
||||
cmplesd xmm6,xmm4
|
||||
cmplesd xmm6,QWORD PTR [rcx]
|
||||
cmpunordsd xmm6,xmm4
|
||||
cmpunordsd xmm6,QWORD PTR [rcx]
|
||||
cmpneqsd xmm6,xmm4
|
||||
cmpneqsd xmm6,QWORD PTR [rcx]
|
||||
cmpnltsd xmm6,xmm4
|
||||
cmpnltsd xmm6,QWORD PTR [rcx]
|
||||
cmpnlesd xmm6,xmm4
|
||||
cmpnlesd xmm6,QWORD PTR [rcx]
|
||||
cmpordsd xmm6,xmm4
|
||||
cmpordsd xmm6,QWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm/mem32, xmm[, xmm]
|
||||
addss xmm6,xmm4
|
||||
addss xmm6,DWORD PTR [rcx]
|
||||
cvtss2sd xmm6,xmm4
|
||||
cvtss2sd xmm6,DWORD PTR [rcx]
|
||||
divss xmm6,xmm4
|
||||
divss xmm6,DWORD PTR [rcx]
|
||||
maxss xmm6,xmm4
|
||||
maxss xmm6,DWORD PTR [rcx]
|
||||
minss xmm6,xmm4
|
||||
minss xmm6,DWORD PTR [rcx]
|
||||
mulss xmm6,xmm4
|
||||
mulss xmm6,DWORD PTR [rcx]
|
||||
rcpss xmm6,xmm4
|
||||
rcpss xmm6,DWORD PTR [rcx]
|
||||
rsqrtss xmm6,xmm4
|
||||
rsqrtss xmm6,DWORD PTR [rcx]
|
||||
sqrtss xmm6,xmm4
|
||||
sqrtss xmm6,DWORD PTR [rcx]
|
||||
subss xmm6,xmm4
|
||||
subss xmm6,DWORD PTR [rcx]
|
||||
cmpeqss xmm6,xmm4
|
||||
cmpeqss xmm6,DWORD PTR [rcx]
|
||||
cmpltss xmm6,xmm4
|
||||
cmpltss xmm6,DWORD PTR [rcx]
|
||||
cmpless xmm6,xmm4
|
||||
cmpless xmm6,DWORD PTR [rcx]
|
||||
cmpunordss xmm6,xmm4
|
||||
cmpunordss xmm6,DWORD PTR [rcx]
|
||||
cmpneqss xmm6,xmm4
|
||||
cmpneqss xmm6,DWORD PTR [rcx]
|
||||
cmpnltss xmm6,xmm4
|
||||
cmpnltss xmm6,DWORD PTR [rcx]
|
||||
cmpnless xmm6,xmm4
|
||||
cmpnless xmm6,DWORD PTR [rcx]
|
||||
cmpordss xmm6,xmm4
|
||||
cmpordss xmm6,DWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm/mem32, xmm
|
||||
comiss xmm6,xmm4
|
||||
comiss xmm4,DWORD PTR [rcx]
|
||||
pmovsxbd xmm6,xmm4
|
||||
pmovsxbd xmm4,DWORD PTR [rcx]
|
||||
pmovsxwq xmm6,xmm4
|
||||
pmovsxwq xmm4,DWORD PTR [rcx]
|
||||
pmovzxbd xmm6,xmm4
|
||||
pmovzxbd xmm4,DWORD PTR [rcx]
|
||||
pmovzxwq xmm6,xmm4
|
||||
pmovzxwq xmm4,DWORD PTR [rcx]
|
||||
ucomiss xmm6,xmm4
|
||||
ucomiss xmm4,DWORD PTR [rcx]
|
||||
|
||||
# Tests for op mem32, xmm
|
||||
movss xmm4,DWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm, mem32
|
||||
movss DWORD PTR [rcx],xmm4
|
||||
|
||||
# Tests for op xmm, regl/mem32
|
||||
# Tests for op regl/mem32, xmm
|
||||
movd ecx,xmm4
|
||||
movd DWORD PTR [rcx],xmm4
|
||||
movd xmm4,ecx
|
||||
movd xmm4,DWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm/mem32, regl
|
||||
cvtss2si ecx,xmm4
|
||||
cvtss2si ecx,DWORD PTR [rcx]
|
||||
cvttss2si ecx,xmm4
|
||||
cvttss2si ecx,DWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm/mem32, regq
|
||||
cvtss2si rcx,xmm4
|
||||
cvtss2si rcx,DWORD PTR [rcx]
|
||||
cvttss2si rcx,xmm4
|
||||
cvttss2si rcx,DWORD PTR [rcx]
|
||||
|
||||
# Tests for op xmm, regq
|
||||
movmskpd rcx,xmm4
|
||||
movmskps rcx,xmm4
|
||||
pmovmskb rcx,xmm4
|
||||
|
||||
# Tests for op imm8, xmm, regq/mem32
|
||||
extractps rcx,xmm4,100
|
||||
extractps DWORD PTR [rcx],xmm4,100
|
||||
# Tests for op imm8, xmm, regl/mem32
|
||||
pextrd ecx,xmm4,100
|
||||
pextrd DWORD PTR [rcx],xmm4,100
|
||||
extractps ecx,xmm4,100
|
||||
extractps DWORD PTR [rcx],xmm4,100
|
||||
|
||||
# Tests for op regl/mem32, xmm[, xmm]
|
||||
cvtsi2sd xmm4,ecx
|
||||
cvtsi2sd xmm4,DWORD PTR [rcx]
|
||||
cvtsi2ss xmm4,ecx
|
||||
cvtsi2ss xmm4,DWORD PTR [rcx]
|
||||
|
||||
# Tests for op imm8, xmm/mem32, xmm[, xmm]
|
||||
cmpss xmm6,xmm4,100
|
||||
cmpss xmm6,DWORD PTR [rcx],100
|
||||
insertps xmm6,xmm4,100
|
||||
insertps xmm6,DWORD PTR [rcx],100
|
||||
roundss xmm6,xmm4,100
|
||||
roundss xmm6,DWORD PTR [rcx],100
|
||||
|
||||
# Tests for op xmm/m16, xmm
|
||||
pmovsxbq xmm6,xmm4
|
||||
pmovsxbq xmm4,WORD PTR [rcx]
|
||||
pmovzxbq xmm6,xmm4
|
||||
pmovzxbq xmm4,WORD PTR [rcx]
|
||||
|
||||
# Tests for op imm8, xmm, regl/mem16
|
||||
pextrw ecx,xmm4,100
|
||||
pextrw WORD PTR [rcx],xmm4,100
|
||||
|
||||
# Tests for op imm8, xmm, regq/mem16
|
||||
pextrw rcx,xmm4,100
|
||||
pextrw WORD PTR [rcx],xmm4,100
|
||||
|
||||
# Tests for op imm8, regl/mem16, xmm[, xmm]
|
||||
pinsrw xmm4,ecx,100
|
||||
pinsrw xmm4,WORD PTR [rcx],100
|
||||
|
||||
|
||||
pinsrw xmm4,rcx,100
|
||||
pinsrw xmm4,WORD PTR [rcx],100
|
||||
|
||||
# Tests for op imm8, xmm, regl/mem8
|
||||
pextrb ecx,xmm4,100
|
||||
pextrb BYTE PTR [rcx],xmm4,100
|
||||
|
||||
# Tests for op imm8, regl/mem8, xmm[, xmm]
|
||||
pinsrb xmm4,ecx,100
|
||||
pinsrb xmm4,BYTE PTR [rcx],100
|
||||
|
||||
# Tests for op imm8, xmm, regq
|
||||
pextrw rcx,xmm4,100
|
||||
# Tests for op imm8, xmm, regq/mem8
|
||||
pextrb rcx,xmm4,100
|
||||
pextrb BYTE PTR [rcx],xmm4,100
|
||||
|
||||
# Tests for op imm8, regl/mem8, xmm[, xmm]
|
||||
pinsrb xmm4,ecx,100
|
||||
pinsrb xmm4,BYTE PTR [rcx],100
|
||||
|
||||
# Tests for op xmm, xmm
|
||||
maskmovdqu xmm6,xmm4
|
||||
movq xmm6,xmm4
|
||||
|
||||
# Tests for op xmm, regl
|
||||
movmskpd ecx,xmm4
|
||||
movmskps ecx,xmm4
|
||||
pmovmskb ecx,xmm4
|
||||
# Tests for op xmm, xmm[, xmm]
|
||||
movhlps xmm6,xmm4
|
||||
movlhps xmm6,xmm4
|
||||
movsd xmm6,xmm4
|
||||
movss xmm6,xmm4
|
||||
|
||||
# Tests for op imm8, xmm[, xmm]
|
||||
pslld xmm4,100
|
||||
pslldq xmm4,100
|
||||
psllq xmm4,100
|
||||
psllw xmm4,100
|
||||
psrad xmm4,100
|
||||
psraw xmm4,100
|
||||
psrld xmm4,100
|
||||
psrldq xmm4,100
|
||||
psrlq xmm4,100
|
||||
psrlw xmm4,100
|
||||
|
||||
# Tests for op imm8, xmm, regl
|
||||
pextrw ecx,xmm4,100
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
* i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
|
||||
* i386-tbl.h: Regenerated.
|
||||
|
||||
2008-08-28 Jan Beulich <jbeulich@novell.com>
|
||||
|
||||
* i386-dis.c (dis386): Adjust far return mnemonics.
|
||||
|
|
|
|||
|
|
@ -1140,31 +1140,31 @@ cmpeqss, 2, 0xf30fc2, 0x0, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|N
|
|||
cmpleps, 2, 0xc2, 0x2, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpleps, 2, 0xfc2, 0x2, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpless, 2, 0xf3c2, 0x2, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpless, 2, 0xf30fc2, 0x2, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpless, 2, 0xf30fc2, 0x2, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltps, 2, 0xc2, 0x1, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltps, 2, 0xfc2, 0x1, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltss, 2, 0xf3c2, 0x1, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltss, 2, 0xf30fc2, 0x1, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltss, 2, 0xf30fc2, 0x1, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqps, 2, 0xc2, 0x4, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqps, 2, 0xfc2, 0x4, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqss, 2, 0xf3c2, 0x4, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqss, 2, 0xf30fc2, 0x4, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqss, 2, 0xf30fc2, 0x4, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnleps, 2, 0xc2, 0x6, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnleps, 2, 0xfc2, 0x6, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnless, 2, 0xf3c2, 0x6, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnless, 2, 0xf30fc2, 0x6, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnless, 2, 0xf30fc2, 0x6, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltps, 2, 0xc2, 0x5, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltps, 2, 0xfc2, 0x5, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltss, 2, 0xf3c2, 0x5, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltss, 2, 0xf30fc2, 0x5, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltss, 2, 0xf30fc2, 0x5, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordps, 2, 0xc2, 0x7, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordps, 2, 0xfc2, 0x7, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordss, 2, 0xf3c2, 0x7, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordss, 2, 0xf30fc2, 0x7, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordss, 2, 0xf30fc2, 0x7, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordps, 2, 0xc2, 0x3, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordps, 2, 0xfc2, 0x3, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordss, 2, 0xf3c2, 0x3, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordss, 2, 0xf30fc2, 0x3, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordss, 2, 0xf3c2, 0x3, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordss, 2, 0xf30fc2, 0x3, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpps, 3, 0xc2, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpps, 3, 0xfc2, None, 2, CpuSSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpss, 3, 0xf3c2, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
|
|
@ -1322,31 +1322,31 @@ cmpeqsd, 2, 0xf20fc2, 0x0, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|
|
|||
cmplepd, 2, 0x66c2, 0x2, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmplepd, 2, 0x660fc2, 0x2, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmplesd, 2, 0xf2c2, 0x2, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmplesd, 2, 0xf20fc2, 0x2, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmplesd, 2, 0xf20fc2, 0x2, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltpd, 2, 0x66c2, 0x1, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltpd, 2, 0x660fc2, 0x1, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltsd, 2, 0xf2c2, 0x1, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltsd, 2, 0xf20fc2, 0x1, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpltsd, 2, 0xf20fc2, 0x1, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqpd, 2, 0x66c2, 0x4, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqpd, 2, 0x660fc2, 0x4, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqsd, 2, 0xf2c2, 0x4, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqsd, 2, 0xf20fc2, 0x4, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpneqsd, 2, 0xf20fc2, 0x4, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnlepd, 2, 0x66c2, 0x6, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnlepd, 2, 0x660fc2, 0x6, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnlesd, 2, 0xf2c2, 0x6, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnlesd, 2, 0xf20fc2, 0x6, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnlesd, 2, 0xf20fc2, 0x6, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltpd, 2, 0x66c2, 0x5, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltpd, 2, 0x660fc2, 0x5, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltsd, 2, 0xf2c2, 0x5, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltsd, 2, 0xf20fc2, 0x5, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpnltsd, 2, 0xf20fc2, 0x5, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordpd, 2, 0x66c2, 0x7, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordpd, 2, 0x660fc2, 0x7, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordsd, 2, 0xf2c2, 0x7, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordsd, 2, 0xf20fc2, 0x7, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpordsd, 2, 0xf20fc2, 0x7, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordpd, 2, 0x66c2, 0x3, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordpd, 2, 0x660fc2, 0x3, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordsd, 2, 0xf2c2, 0x3, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordsd, 2, 0xf20fc2, 0x3, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordsd, 2, 0xf2c2, 0x3, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmpunordsd, 2, 0xf20fc2, 0x3, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmppd, 3, 0x66c2, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
cmppd, 3, 0x660fc2, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
// Intel mode string compare.
|
||||
|
|
|
|||
|
|
@ -9452,8 +9452,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -9500,8 +9500,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -9548,8 +9548,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -9596,8 +9596,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -9644,8 +9644,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -9692,8 +9692,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -9728,8 +9728,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
|
||||
0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -9740,8 +9740,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -11618,8 +11618,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -11666,8 +11666,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -11714,8 +11714,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -11762,8 +11762,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -11810,8 +11810,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -11858,8 +11858,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -11894,8 +11894,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
|
||||
0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
@ -11906,8 +11906,8 @@ const template i386_optab[] =
|
|||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 0, 0, 0 } },
|
||||
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
|
|
|
|||
Loading…
Reference in New Issue