S12Z (doc): Minor improvements to text and formatting.
gas/ * doc/c-s12z.texi: Miscellaneous adjustments.
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John Darrington
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@ -16,55 +16,63 @@ dependent features.
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@cindex S12Z support
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@menu
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* S12Z-Opts:: S12Z Options
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* S12Z-Syntax:: Syntax
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* S12Z-Directives:: Assembler Directives
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* S12Z-Opcodes:: Opcodes
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* S12Z Options:: S12Z Options
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* S12Z Syntax:: Syntax
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@end menu
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@node S12Z-Opts
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@node S12Z Options
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@section S12Z Options
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@cindex options, S12Z
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@cindex S12Z options
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The S12Z version of @code{@value{AS}} has the following options:
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The S12Z version of @code{@value{AS}} recognizes the following options:
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@table @samp
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@item -mreg-prefix=@var{prefix}
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@cindex @samp{-mreg-prefix=@var{prefix}} option, reg-prefix
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You can use the @samp{-mreg-prefix=@var{pfx}} option to indicate
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that the assembler expects each register name to be prefixed with the
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that the assembler should expect all register names to be prefixed with the
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string @var{pfx}.
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For an explanation of what this means and why it might be needed,
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see @ref{Register Notation}.
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see @ref{S12Z Register Notation}.
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@end table
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@node S12Z-Syntax
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@node S12Z Syntax
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@section Syntax
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@menu
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* Register Notation:: How to refer to registers
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* S12Z Syntax Overview:: General description
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* S12Z Addressing Modes:: Operands and their semantics
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* S12Z Register Notation:: How to refer to registers
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@end menu
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@cindex S12Z syntax
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@cindex syntax, S12Z
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@node S12Z Syntax Overview
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@subsection Overview
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In the S12Z syntax, the instruction name comes first and it may
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be followed by one or by several operands.
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be followed by one, or by several operands.
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In most cases the maximum number of operands is three.
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Operands are separated by a comma (@samp{,}).
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A comma however does not act as a separator if it appears within parentheses
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(@samp{()}) or within square brackets (@samp{[]}).
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@code{@value{AS}} will complain if too many, too few or inappropriate operands
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are specified for a given instruction.
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Some instructions accept and (in certain situations require) a suffix
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indicating the size of the operand.
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The suffix is separated from the instruction name by a period (@samp{.})
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and may be one of @samp{b}, @samp{w}, @samp{p} or @samp{l} indicating
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`byte' (a single byte), `word' (2 bytes), `pointer' (3 bytes) or `long' (4 bytes)
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respectively.
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Operands are separated by a comma (@samp{,}).
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A comma however does not act as a separator if it appears within parentheses
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(@samp{()}) or within square brackets (@samp{[]}).
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@code{@value{AS}} will complain if too many, too few or inappropriate operands
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are specified for a given instruction.
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The MRI mode is not supported for this architecture.
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Example:
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@smallexample
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@ -80,7 +88,6 @@ Example:
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@end smallexample
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@cindex line comment character, S12Z
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@cindex S12Z line comment character
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The presence of a @samp{;} character anywhere
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on a line indicates the start of a comment that extends to the end of
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that line.
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@ -98,8 +105,12 @@ directive (@pxref{Comments}) or a preprocessor control command
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The S12Z assembler does not currently support a line separator
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character.
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@node S12Z Addressing Modes
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@subsection Addressing Modes
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@cindex S12Z addressing modes
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@cindex addressing modes, S12Z
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The following addressing modes are understood for the S12Z.
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@table @dfn
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@item Immediate
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@ -110,7 +121,7 @@ The following addressing modes are understood for the S12Z.
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Bit field instructions in the immediate mode require the width and offset to
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be specified.
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The @var{width} pararmeter specifies the number of bits in the field.
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The @var{width} parameter specifies the number of bits in the field.
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It should be a number in the range [1,32].
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@var{Offset} determines the position within the field where the operation
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should start.
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@ -204,25 +215,25 @@ Otherwise it is treated as unsigned.
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For example:
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@smallexample
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trap #197
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bra *+49
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bra .L0
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jmp 0xFE0034
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jmp [0xFD0012]
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inc.b (4,x)
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dec.w [4,y]
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clr.p (-s)
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neg.l (d0, s)
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com.b [d1, x]
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jsr (45, d0)
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psh cch
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trap #197 ;; Immediate mode
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bra *+49 ;; Relative mode
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bra .L0 ;; ditto
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jmp 0xFE0034 ;; Absolute direct mode
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jmp [0xFD0012] ;; Absolute indirect mode
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inc.b (4,x) ;; Constant offset indexed mode
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jsr (45, d0) ;; ditto
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dec.w [4,y] ;; Constant offset indexed indirect mode
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clr.p (-s) ;; Pre-decrement mode
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neg.l (d0, s) ;; Register offset direct mode
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com.b [d1, x] ;; Register offset indirect mode
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psh cch ;; Register mode
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@end smallexample
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@node Register Notation
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@node S12Z Register Notation
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@subsection Register Notation
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@cindex register notation, S12Z
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Without a register prefix (@pxref{S12Z-Opts}), S12Z assembler code is expected in the traditional
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Without a register prefix (@pxref{S12Z Options}), S12Z assembler code is expected in the traditional
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format like this:
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@smallexample
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lea s, (-2,s)
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@ -250,13 +261,9 @@ Consider the following assembler instruction:
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st d0, d1
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@end smallexample
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@noindent
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This instruction is most likely to
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mean ``Store the value in the register D0 into the register D1'' and that is the
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default way in which @code{@value{AS}} interprets it.
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However it could also be intended to mean
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``Store the value in the register D0 into the memory referenced by the symbol
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named @samp{d1}''.
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If that is what is intended then @code{@value{AS}} must be invoked with
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The destination operand of this instruction could either refer to the register
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@samp{D1}, or it could refer to the symbol named ``d1''.
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If the latter is intended then @code{@value{AS}} must be invoked with
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@samp{-mreg-prefix=@var{pfx}} and the code written as
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@smallexample
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st @var{pfx}d0, d1
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@ -265,16 +272,3 @@ st @var{pfx}d0, d1
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where @var{pfx} is the chosen register prefix.
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For this reason, compiler back-ends should choose a register prefix which
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cannot be confused with a symbol name.
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@node S12Z-Directives
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@section Assembler Directives
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@cindex assembler directives, S12Z
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@node S12Z-Opcodes
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@section Opcodes
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@cindex S12Z opcodes
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@cindex opcodes, S12Z
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@cindex instruction set, S12Z
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