include/opcode/
* mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values.
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@ -1,3 +1,7 @@
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2014-05-01 Richard Sandiford <rdsandiford@googlemail.com>
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* mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values.
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2014-04-22 Christian Svensson <blue@cmd.nu>
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* or32.h: Delete.
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@ -1080,16 +1080,33 @@ struct mips_opcode
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#define INSN_ISA4_32R2 13
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#define INSN_ISA5_32R2 14
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/* Given INSN_ISA* values X and Y, where X ranges over INSN_ISA1 through
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INSN_ISA5_32R2 and Y ranges over INSN_ISA1 through INSN_ISA64R2,
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this table describes whether at least one of the ISAs described by X
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is/are implemented by ISA Y. (Think of Y as the ISA level supported by
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a particular core and X as the ISA level(s) at which a certain instruction
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is defined.) The ISA(s) described by X is/are implemented by Y iff
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(mips_isa_table[(Y & INSN_ISA_MASK) - 1] >> ((X & INSN_ISA_MASK) - 1)) & 1
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is non-zero. */
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static const unsigned int mips_isa_table[] =
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{ 0x0001, 0x0003, 0x0607, 0x1e0f, 0x3e1f, 0x0a23, 0x3e63, 0x3ebf, 0x3fff };
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/* Bit INSN_ISA<X> - 1 of INSN_UPTO<Y> is set if ISA Y includes ISA X. */
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#define ISAF(X) (1 << (INSN_ISA##X - 1))
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#define INSN_UPTO1 ISAF(1)
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#define INSN_UPTO2 INSN_UPTO1 | ISAF(2)
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#define INSN_UPTO3 INSN_UPTO2 | ISAF(3) | ISAF(3_32) | ISAF(3_32R2)
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#define INSN_UPTO4 INSN_UPTO3 | ISAF(4) | ISAF(4_32) | ISAF(4_32R2)
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#define INSN_UPTO5 INSN_UPTO4 | ISAF(5) | ISAF(5_32R2)
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#define INSN_UPTO32 INSN_UPTO2 | ISAF(32) | ISAF(3_32) | ISAF(4_32)
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#define INSN_UPTO32R2 INSN_UPTO32 | ISAF(32R2) \
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| ISAF(3_32R2) | ISAF(4_32R2) | ISAF(5_32R2)
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#define INSN_UPTO64 INSN_UPTO5 | ISAF(64) | ISAF(32)
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#define INSN_UPTO64R2 INSN_UPTO64 | ISAF(64R2) | ISAF(32R2)
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/* The same information in table form: bit INSN_ISA<X> - 1 of index
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INSN_UPTO<Y> - 1 is set if ISA Y includes ISA X. */
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static const unsigned int mips_isa_table[] = {
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INSN_UPTO1,
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INSN_UPTO2,
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INSN_UPTO3,
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INSN_UPTO4,
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INSN_UPTO5,
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INSN_UPTO32,
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INSN_UPTO32R2,
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INSN_UPTO64,
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INSN_UPTO64R2
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};
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#undef ISAF
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/* Masks used for Chip specific instructions. */
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#define INSN_CHIP_MASK 0xc3ff0f20
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