gdb: provide and use sparc{32,64} target description XML files.
gdb/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 Provide and use sparc32 and sparc64 target description XML files. * features/sparc/sparc32-cp0.xml, features/sparc/sparc32-cpu.xml, features/sparc/sparc32-fpu.xml: New files for sparc 32-bit. * features/sparc/sparc64-cp0.xml, features/sparc/sparc64-cpu.xml, features/sparc/sparc64-fpu.xml: New files for sparc 64-bit. * features/sparc/sparc32-solaris.xml: New file. * features/sparc/sparc64-solaris.xml: New file. * features/sparc/sparc32-solaris.c: Generated. * features/sparc/sparc64-solaris.c: Generated. * sparc-tdep.h: Account for differences in target descriptions. * sparc-tdep.c (sparc32_register_name): Use target provided registers. (sparc32_register_type): Use target provided registers. (validate_tdesc_registers): New function. (sparc32_gdbarch_init): Use tdesc_has_registers. Set pseudoregister functions. * sparc64-tdep.c (sparc64_register_name): Use target provided registers. (sparc64_register_type): Use target provided registers. (sparc64_init_abi): Set pseudoregister functions. gdb/doc/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 * gdb.texinfo: (Standard Target Features): Document SPARC features. (Sparc Features): New node. gdb/testsuite/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 * gdb.xml/tdesc-regs.exp: Provide sparc core registers for the tests.
This commit is contained in:
Ivo Raisr
Jose E. Marchesi
parent
de32a80f8f
commit
3f7b46f2da
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@ -1,3 +1,25 @@
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2017-02-06 Ivo Raisr <ivo.raisr@oracle.com>
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PR tdep/20936
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Provide and use sparc32 and sparc64 target description XML files.
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* features/sparc/sparc32-cp0.xml, features/sparc/sparc32-cpu.xml,
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features/sparc/sparc32-fpu.xml: New files for sparc 32-bit.
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* features/sparc/sparc64-cp0.xml, features/sparc/sparc64-cpu.xml,
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features/sparc/sparc64-fpu.xml: New files for sparc 64-bit.
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* features/sparc/sparc32-solaris.xml: New file.
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* features/sparc/sparc64-solaris.xml: New file.
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* features/sparc/sparc32-solaris.c: Generated.
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* features/sparc/sparc64-solaris.c: Generated.
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* sparc-tdep.h: Account for differences in target descriptions.
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* sparc-tdep.c (sparc32_register_name): Use target provided registers.
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(sparc32_register_type): Use target provided registers.
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(validate_tdesc_registers): New function.
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(sparc32_gdbarch_init): Use tdesc_has_registers.
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Set pseudoregister functions.
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* sparc64-tdep.c (sparc64_register_name): Use target provided registers.
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(sparc64_register_type): Use target provided registers.
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(sparc64_init_abi): Set pseudoregister functions.
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2017-02-03 Tom Tromey <tom@tromey.com>
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PR rust/21097:
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2
gdb/NEWS
2
gdb/NEWS
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@ -47,6 +47,8 @@
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end
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end
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* Target descriptions can now describe registers for sparc32 and sparc64.
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* New native configurations
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FreeBSD/mips mips*-*-freebsd
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@ -1,3 +1,9 @@
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2017-02-06 Ivo Raisr <ivo.raisr@oracle.com>
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PR tdep/20936
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* gdb.texinfo: (Standard Target Features): Document SPARC features.
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(Sparc Features): New node.
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2017-01-27 Walfred Tedeschi <walfred.tedeschi@intel.com>
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* gdb.texinfo (i386 Features): Add system segment registers
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@ -41030,6 +41030,7 @@ registers using the capitalization used in the description.
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* Nios II Features::
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* PowerPC Features::
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* S/390 and System z Features::
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* Sparc Features::
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* TIC6x Features::
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@end menu
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@ -41381,6 +41382,48 @@ through @samp{f15} to present the 128-bit wide vector registers
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contain the 128-bit wide vector registers @samp{v16} through
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@samp{v31}.
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@node Sparc Features
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@subsection Sparc Features
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@cindex target descriptions, sparc32 features
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@cindex target descriptions, sparc64 features
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The @samp{org.gnu.gdb.sparc.cpu} feature is required for sparc32/sparc64
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targets. It should describe the following registers:
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@itemize @minus
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@item
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@samp{g0} through @samp{g7}
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@item
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@samp{o0} through @samp{o7}
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@item
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@samp{l0} through @samp{l7}
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@item
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@samp{i0} through @samp{i7}
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@end itemize
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They may be 32-bit or 64-bit depending on the target.
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Also the @samp{org.gnu.gdb.sparc.fpu} feature is required for sparc32/sparc64
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targets. It should describe the following registers:
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@itemize @minus
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@item
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@samp{f0} through @samp{f31}
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@item
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@samp{f32} through @samp{f62} for sparc64
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@end itemize
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The @samp{org.gnu.gdb.sparc.cp0} feature is required for sparc32/sparc64
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targets. It should describe the following registers:
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@itemize @minus
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@item
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@samp{y}, @samp{psr}, @samp{wim}, @samp{tbr}, @samp{pc}, @samp{npc},
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@samp{fsr}, and @samp{csr} for sparc32
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@item
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@samp{pc}, @samp{npc}, @samp{state}, @samp{fsr}, @samp{fprs}, and @samp{y}
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for sparc64
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@end itemize
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@node TIC6x Features
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@subsection TMS320C6x Features
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@cindex target descriptions, TIC6x features
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@ -0,0 +1,19 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.sparc.cp0">
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<reg name="y" bitsize="32" type="uint32" regnum="64"/>
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<reg name="psr" bitsize="32" type="uint32" regnum="65"/>
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<reg name="wim" bitsize="32" type="uint32" regnum="66"/>
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<reg name="tbr" bitsize="32" type="uint32" regnum="67"/>
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<reg name="pc" bitsize="32" type="code_ptr" regnum="68"/>
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<reg name="npc" bitsize="32" type="code_ptr" regnum="69"/>
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<reg name="fsr" bitsize="32" type="uint32" regnum="70"/>
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<reg name="csr" bitsize="32" type="uint32" regnum="71"/>
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</feature>
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@ -0,0 +1,42 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.sparc.cpu">
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<reg name="g0" bitsize="32" type="uint32" regnum="0"/>
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<reg name="g1" bitsize="32" type="uint32" regnum="1"/>
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<reg name="g2" bitsize="32" type="uint32" regnum="2"/>
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<reg name="g3" bitsize="32" type="uint32" regnum="3"/>
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<reg name="g4" bitsize="32" type="uint32" regnum="4"/>
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<reg name="g5" bitsize="32" type="uint32" regnum="5"/>
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<reg name="g6" bitsize="32" type="uint32" regnum="6"/>
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<reg name="g7" bitsize="32" type="uint32" regnum="7"/>
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<reg name="o0" bitsize="32" type="uint32" regnum="8"/>
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<reg name="o1" bitsize="32" type="uint32" regnum="9"/>
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<reg name="o2" bitsize="32" type="uint32" regnum="10"/>
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<reg name="o3" bitsize="32" type="uint32" regnum="11"/>
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<reg name="o4" bitsize="32" type="uint32" regnum="12"/>
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<reg name="o5" bitsize="32" type="uint32" regnum="13"/>
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<reg name="sp" bitsize="32" type="uint32" regnum="14"/>
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<reg name="o7" bitsize="32" type="uint32" regnum="15"/>
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<reg name="l0" bitsize="32" type="uint32" regnum="16"/>
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<reg name="l1" bitsize="32" type="uint32" regnum="17"/>
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<reg name="l2" bitsize="32" type="uint32" regnum="18"/>
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<reg name="l3" bitsize="32" type="uint32" regnum="19"/>
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<reg name="l4" bitsize="32" type="uint32" regnum="20"/>
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<reg name="l5" bitsize="32" type="uint32" regnum="21"/>
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<reg name="l6" bitsize="32" type="uint32" regnum="22"/>
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<reg name="l7" bitsize="32" type="uint32" regnum="23"/>
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<reg name="i0" bitsize="32" type="uint32" regnum="24"/>
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<reg name="i1" bitsize="32" type="uint32" regnum="25"/>
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<reg name="i2" bitsize="32" type="uint32" regnum="26"/>
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<reg name="i3" bitsize="32" type="uint32" regnum="27"/>
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<reg name="i4" bitsize="32" type="uint32" regnum="28"/>
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<reg name="i5" bitsize="32" type="uint32" regnum="29"/>
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<reg name="fp" bitsize="32" type="uint32" regnum="30"/>
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<reg name="i7" bitsize="32" type="uint32" regnum="31"/>
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</feature>
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@ -0,0 +1,43 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.sparc.fpu">
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<reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
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<reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
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<reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
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<reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
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<reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
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<reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
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<reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
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<reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
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<reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
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<reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
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<reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
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<reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
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<reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
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<reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
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<reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
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<reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
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<reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
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<reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
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<reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
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<reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
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<reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
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<reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
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<reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
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<reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
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<reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
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<reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
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<reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
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<reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
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<reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
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<reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
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<reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
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<reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
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</feature>
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@ -0,0 +1,98 @@
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/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
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Original: sparc32-solaris.xml */
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#include "defs.h"
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#include "osabi.h"
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#include "target-descriptions.h"
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struct target_desc *tdesc_sparc32_solaris;
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static void
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initialize_tdesc_sparc32_solaris (void)
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{
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struct target_desc *result = allocate_target_description ();
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struct tdesc_feature *feature;
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set_tdesc_architecture (result, bfd_scan_arch ("sparc"));
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set_tdesc_osabi (result, osabi_from_tdesc_string ("Solaris"));
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feature = tdesc_create_feature (result, "org.gnu.gdb.sparc.cpu");
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tdesc_create_reg (feature, "g0", 0, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "g1", 1, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "g2", 2, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "g3", 3, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "g4", 4, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "g5", 5, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "g6", 6, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "g7", 7, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "o0", 8, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "o1", 9, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "o2", 10, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "o3", 11, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "o4", 12, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "o5", 13, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "sp", 14, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "o7", 15, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "l0", 16, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "l1", 17, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "l2", 18, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "l3", 19, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "l4", 20, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "l5", 21, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "l6", 22, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "l7", 23, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "i0", 24, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "i1", 25, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "i2", 26, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "i3", 27, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "i4", 28, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "i5", 29, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "fp", 30, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "i7", 31, 1, NULL, 32, "uint32");
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feature = tdesc_create_feature (result, "org.gnu.gdb.sparc.cp0");
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tdesc_create_reg (feature, "y", 64, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "psr", 65, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "wim", 66, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "tbr", 67, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "pc", 68, 1, NULL, 32, "code_ptr");
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tdesc_create_reg (feature, "npc", 69, 1, NULL, 32, "code_ptr");
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tdesc_create_reg (feature, "fsr", 70, 1, NULL, 32, "uint32");
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tdesc_create_reg (feature, "csr", 71, 1, NULL, 32, "uint32");
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feature = tdesc_create_feature (result, "org.gnu.gdb.sparc.fpu");
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tdesc_create_reg (feature, "f0", 32, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f1", 33, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f2", 34, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f3", 35, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f4", 36, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f5", 37, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f6", 38, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f7", 39, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f8", 40, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f9", 41, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f10", 42, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f11", 43, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f12", 44, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f13", 45, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f14", 46, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f15", 47, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f16", 48, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f17", 49, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f18", 50, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f19", 51, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f20", 52, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f21", 53, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f22", 54, 1, NULL, 32, "ieee_single");
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tdesc_create_reg (feature, "f23", 55, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f24", 56, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f25", 57, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f26", 58, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f27", 59, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f28", 60, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f29", 61, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f30", 62, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f31", 63, 1, NULL, 32, "ieee_single");
|
||||
|
||||
tdesc_sparc_solaris = result;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
<?xml version="1.0"?>
|
||||
<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
|
||||
|
||||
Copying and distribution of this file, with or without modification,
|
||||
are permitted in any medium without royalty provided the copyright
|
||||
notice and this notice are preserved. -->
|
||||
|
||||
<!DOCTYPE target SYSTEM "gdb-target.dtd">
|
||||
<target>
|
||||
<architecture>sparc</architecture>
|
||||
<osabi>Solaris</osabi>
|
||||
<xi:include href="sparc32-cpu.xml"/>
|
||||
<xi:include href="sparc32-cp0.xml"/>
|
||||
<xi:include href="sparc32-fpu.xml"/>
|
||||
</target>
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
<?xml version="1.0"?>
|
||||
<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
|
||||
|
||||
Copying and distribution of this file, with or without modification,
|
||||
are permitted in any medium without royalty provided the copyright
|
||||
notice and this notice are preserved. -->
|
||||
|
||||
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
|
||||
<feature name="org.gnu.gdb.sparc.cp0">
|
||||
<reg name="pc" bitsize="64" type="code_ptr" regnum="80"/>
|
||||
<reg name="npc" bitsize="64" type="code_ptr" regnum="81"/>
|
||||
<reg name="state" bitsize="64" type="uint64" regnum="82"/>
|
||||
<reg name="fsr" bitsize="64" type="uint64" regnum="83"/>
|
||||
<reg name="fprs" bitsize="64" type="uint64" regnum="84"/>
|
||||
<reg name="y" bitsize="64" type="uint64" regnum="85"/>
|
||||
</feature>
|
||||
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
<?xml version="1.0"?>
|
||||
<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
|
||||
|
||||
Copying and distribution of this file, with or without modification,
|
||||
are permitted in any medium without royalty provided the copyright
|
||||
notice and this notice are preserved. -->
|
||||
|
||||
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
|
||||
<feature name="org.gnu.gdb.sparc.cpu">
|
||||
<reg name="g0" bitsize="64" type="uint64" regnum="0"/>
|
||||
<reg name="g1" bitsize="64" type="uint64" regnum="1"/>
|
||||
<reg name="g2" bitsize="64" type="uint64" regnum="2"/>
|
||||
<reg name="g3" bitsize="64" type="uint64" regnum="3"/>
|
||||
<reg name="g4" bitsize="64" type="uint64" regnum="4"/>
|
||||
<reg name="g5" bitsize="64" type="uint64" regnum="5"/>
|
||||
<reg name="g6" bitsize="64" type="uint64" regnum="6"/>
|
||||
<reg name="g7" bitsize="64" type="uint64" regnum="7"/>
|
||||
<reg name="o0" bitsize="64" type="uint64" regnum="8"/>
|
||||
<reg name="o1" bitsize="64" type="uint64" regnum="9"/>
|
||||
<reg name="o2" bitsize="64" type="uint64" regnum="10"/>
|
||||
<reg name="o3" bitsize="64" type="uint64" regnum="11"/>
|
||||
<reg name="o4" bitsize="64" type="uint64" regnum="12"/>
|
||||
<reg name="o5" bitsize="64" type="uint64" regnum="13"/>
|
||||
<reg name="sp" bitsize="64" type="uint64" regnum="14"/>
|
||||
<reg name="o7" bitsize="64" type="uint64" regnum="15"/>
|
||||
<reg name="l0" bitsize="64" type="uint64" regnum="16"/>
|
||||
<reg name="l1" bitsize="64" type="uint64" regnum="17"/>
|
||||
<reg name="l2" bitsize="64" type="uint64" regnum="18"/>
|
||||
<reg name="l3" bitsize="64" type="uint64" regnum="19"/>
|
||||
<reg name="l4" bitsize="64" type="uint64" regnum="20"/>
|
||||
<reg name="l5" bitsize="64" type="uint64" regnum="21"/>
|
||||
<reg name="l6" bitsize="64" type="uint64" regnum="22"/>
|
||||
<reg name="l7" bitsize="64" type="uint64" regnum="23"/>
|
||||
<reg name="i0" bitsize="64" type="uint64" regnum="24"/>
|
||||
<reg name="i1" bitsize="64" type="uint64" regnum="25"/>
|
||||
<reg name="i2" bitsize="64" type="uint64" regnum="26"/>
|
||||
<reg name="i3" bitsize="64" type="uint64" regnum="27"/>
|
||||
<reg name="i4" bitsize="64" type="uint64" regnum="28"/>
|
||||
<reg name="i5" bitsize="64" type="uint64" regnum="29"/>
|
||||
<reg name="fp" bitsize="64" type="uint64" regnum="30"/>
|
||||
<reg name="i7" bitsize="64" type="uint64" regnum="31"/>
|
||||
</feature>
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
<?xml version="1.0"?>
|
||||
<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
|
||||
|
||||
Copying and distribution of this file, with or without modification,
|
||||
are permitted in any medium without royalty provided the copyright
|
||||
notice and this notice are preserved. -->
|
||||
|
||||
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
|
||||
<feature name="org.gnu.gdb.sparc.fpu">
|
||||
<reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
|
||||
<reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
|
||||
<reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
|
||||
<reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
|
||||
<reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
|
||||
<reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
|
||||
<reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
|
||||
<reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
|
||||
<reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
|
||||
<reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
|
||||
<reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
|
||||
<reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
|
||||
<reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
|
||||
<reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
|
||||
<reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
|
||||
<reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
|
||||
<reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
|
||||
<reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
|
||||
<reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
|
||||
<reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
|
||||
<reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
|
||||
<reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
|
||||
<reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
|
||||
<reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
|
||||
<reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
|
||||
<reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
|
||||
<reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
|
||||
<reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
|
||||
<reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
|
||||
<reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
|
||||
<reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
|
||||
<reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
|
||||
|
||||
<reg name="f32" bitsize="64" type="ieee_double" regnum="64"/>
|
||||
<reg name="f34" bitsize="64" type="ieee_double" regnum="65"/>
|
||||
<reg name="f36" bitsize="64" type="ieee_double" regnum="66"/>
|
||||
<reg name="f38" bitsize="64" type="ieee_double" regnum="67"/>
|
||||
<reg name="f40" bitsize="64" type="ieee_double" regnum="68"/>
|
||||
<reg name="f42" bitsize="64" type="ieee_double" regnum="69"/>
|
||||
<reg name="f44" bitsize="64" type="ieee_double" regnum="70"/>
|
||||
<reg name="f46" bitsize="64" type="ieee_double" regnum="71"/>
|
||||
<reg name="f48" bitsize="64" type="ieee_double" regnum="72"/>
|
||||
<reg name="f50" bitsize="64" type="ieee_double" regnum="73"/>
|
||||
<reg name="f52" bitsize="64" type="ieee_double" regnum="74"/>
|
||||
<reg name="f54" bitsize="64" type="ieee_double" regnum="75"/>
|
||||
<reg name="f56" bitsize="64" type="ieee_double" regnum="76"/>
|
||||
<reg name="f58" bitsize="64" type="ieee_double" regnum="77"/>
|
||||
<reg name="f60" bitsize="64" type="ieee_double" regnum="78"/>
|
||||
<reg name="f62" bitsize="64" type="ieee_double" regnum="79"/>
|
||||
</feature>
|
||||
|
||||
|
|
@ -0,0 +1,112 @@
|
|||
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
|
||||
Original: sparc64-solaris.xml */
|
||||
|
||||
#include "defs.h"
|
||||
#include "osabi.h"
|
||||
#include "target-descriptions.h"
|
||||
|
||||
struct target_desc *tdesc_sparc64_solaris;
|
||||
static void
|
||||
initialize_tdesc_sparc64_solaris (void)
|
||||
{
|
||||
struct target_desc *result = allocate_target_description ();
|
||||
struct tdesc_feature *feature;
|
||||
|
||||
set_tdesc_architecture (result, bfd_scan_arch ("sparc"));
|
||||
|
||||
set_tdesc_osabi (result, osabi_from_tdesc_string ("Solaris"));
|
||||
|
||||
feature = tdesc_create_feature (result, "org.gnu.gdb.sparc.cpu");
|
||||
tdesc_create_reg (feature, "g0", 0, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "g1", 1, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "g2", 2, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "g3", 3, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "g4", 4, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "g5", 5, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "g6", 6, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "g7", 7, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "o0", 8, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "o1", 9, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "o2", 10, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "o3", 11, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "o4", 12, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "o5", 13, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "sp", 14, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "o7", 15, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "l0", 16, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "l1", 17, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "l2", 18, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "l3", 19, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "l4", 20, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "l5", 21, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "l6", 22, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "l7", 23, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "i0", 24, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "i1", 25, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "i2", 26, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "i3", 27, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "i4", 28, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "i5", 29, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "fp", 30, 1, NULL, 32, "uint64");
|
||||
tdesc_create_reg (feature, "i7", 31, 1, NULL, 64, "uint64");
|
||||
|
||||
feature = tdesc_create_feature (result, "org.gnu.gdb.sparc.cp0");
|
||||
tdesc_create_reg (feature, "pc", 80, 1, NULL, 64, "code_ptr");
|
||||
tdesc_create_reg (feature, "npc", 81, 1, NULL, 64, "code_ptr");
|
||||
tdesc_create_reg (feature, "state", 82, 1, NULL, 64, "uint64");
|
||||
tdesc_create_reg (feature, "fsr", 83, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "fprs", 84, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "y", 85, 1, NULL, 64, "uint64");
|
||||
|
||||
feature = tdesc_create_feature (result, "org.gnu.gdb.sparc.fpu");
|
||||
tdesc_create_reg (feature, "f0", 32, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f1", 33, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f2", 34, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f3", 35, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f4", 36, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f5", 37, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f6", 38, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f7", 39, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f8", 40, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f9", 41, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f10", 42, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f11", 43, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f12", 44, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f13", 45, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f14", 46, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f15", 47, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f16", 48, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f17", 49, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f18", 50, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f19", 51, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f20", 52, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f21", 53, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f22", 54, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f23", 55, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f24", 56, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f25", 57, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f26", 58, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f27", 59, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f28", 60, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f29", 61, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f30", 62, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f31", 63, 1, NULL, 32, "ieee_single");
|
||||
tdesc_create_reg (feature, "f32", 64, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f34", 65, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f36", 66, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f38", 67, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f40", 68, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f42", 69, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f44", 70, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f46", 71, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f48", 72, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f50", 73, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f52", 74, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f54", 75, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f56", 76, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f58", 77, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f60", 78, 1, NULL, 64, "ieee_double");
|
||||
tdesc_create_reg (feature, "f62", 79, 1, NULL, 64, "ieee_double");
|
||||
|
||||
tdesc_sparc64_solaris = result;
|
||||
}
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
<?xml version="1.0"?>
|
||||
<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
|
||||
|
||||
Copying and distribution of this file, with or without modification,
|
||||
are permitted in any medium without royalty provided the copyright
|
||||
notice and this notice are preserved. -->
|
||||
|
||||
<!DOCTYPE target SYSTEM "gdb-target.dtd">
|
||||
<target>
|
||||
<architecture>sparc:v9</architecture>
|
||||
<osabi>Solaris</osabi>
|
||||
<xi:include href="sparc64-cpu.xml"/>
|
||||
<xi:include href="sparc64-cp0.xml"/>
|
||||
<xi:include href="sparc64-fpu.xml"/>
|
||||
</target>
|
||||
|
|
@ -33,6 +33,7 @@
|
|||
#include "osabi.h"
|
||||
#include "regcache.h"
|
||||
#include "target.h"
|
||||
#include "target-descriptions.h"
|
||||
#include "value.h"
|
||||
|
||||
#include "sparc-tdep.h"
|
||||
|
|
@ -304,6 +305,10 @@ sparc_structure_or_union_p (const struct type *type)
|
|||
#define SPARC32_CP0_REGISTERS \
|
||||
"y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
|
||||
|
||||
static const char *sparc_core_register_names[] = { SPARC_CORE_REGISTERS };
|
||||
static const char *sparc32_fpu_register_names[] = { SPARC32_FPU_REGISTERS };
|
||||
static const char *sparc32_cp0_register_names[] = { SPARC32_CP0_REGISTERS };
|
||||
|
||||
static const char *sparc32_register_names[] =
|
||||
{
|
||||
SPARC_CORE_REGISTERS,
|
||||
|
|
@ -346,6 +351,9 @@ sparc32_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
|
|||
static const char *
|
||||
sparc32_register_name (struct gdbarch *gdbarch, int regnum)
|
||||
{
|
||||
if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
|
||||
return tdesc_register_name (gdbarch, regnum);
|
||||
|
||||
if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch))
|
||||
return sparc32_register_names[regnum];
|
||||
|
||||
|
|
@ -431,6 +439,9 @@ sparc32_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
|
|||
static struct type *
|
||||
sparc32_register_type (struct gdbarch *gdbarch, int regnum)
|
||||
{
|
||||
if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
|
||||
return tdesc_register_type (gdbarch, regnum);
|
||||
|
||||
if (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F31_REGNUM)
|
||||
return builtin_type (gdbarch)->builtin_float;
|
||||
|
||||
|
|
@ -1686,11 +1697,36 @@ sparc_iterate_over_regset_sections (struct gdbarch *gdbarch,
|
|||
}
|
||||
|
||||
|
||||
static int
|
||||
validate_tdesc_registers (const struct target_desc *tdesc,
|
||||
struct tdesc_arch_data *tdesc_data,
|
||||
const char *feature_name,
|
||||
const char *register_names[],
|
||||
unsigned int registers_num,
|
||||
unsigned int reg_start)
|
||||
{
|
||||
int valid_p = 1;
|
||||
const struct tdesc_feature *feature;
|
||||
|
||||
feature = tdesc_find_feature (tdesc, feature_name);
|
||||
if (feature == NULL)
|
||||
return 0;
|
||||
|
||||
for (unsigned int i = 0; i < registers_num; i++)
|
||||
valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
||||
reg_start + i,
|
||||
register_names[i]);
|
||||
|
||||
return valid_p;
|
||||
}
|
||||
|
||||
static struct gdbarch *
|
||||
sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||||
{
|
||||
struct gdbarch_tdep *tdep;
|
||||
const struct target_desc *tdesc = info.target_desc;
|
||||
struct gdbarch *gdbarch;
|
||||
int valid_p = 1;
|
||||
|
||||
/* If there is already a candidate, use it. */
|
||||
arches = gdbarch_list_lookup_by_info (arches, &info);
|
||||
|
|
@ -1704,6 +1740,10 @@ sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
tdep->pc_regnum = SPARC32_PC_REGNUM;
|
||||
tdep->npc_regnum = SPARC32_NPC_REGNUM;
|
||||
tdep->step_trap = sparc_step_trap;
|
||||
tdep->fpu_register_names = sparc32_fpu_register_names;
|
||||
tdep->fpu_registers_num = ARRAY_SIZE (sparc32_fpu_register_names);
|
||||
tdep->cp0_register_names = sparc32_cp0_register_names;
|
||||
tdep->cp0_registers_num = ARRAY_SIZE (sparc32_cp0_register_names);
|
||||
|
||||
set_gdbarch_long_double_bit (gdbarch, 128);
|
||||
set_gdbarch_long_double_format (gdbarch, floatformats_sparc_quad);
|
||||
|
|
@ -1712,6 +1752,8 @@ sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
set_gdbarch_register_name (gdbarch, sparc32_register_name);
|
||||
set_gdbarch_register_type (gdbarch, sparc32_register_type);
|
||||
set_gdbarch_num_pseudo_regs (gdbarch, SPARC32_NUM_PSEUDO_REGS);
|
||||
set_tdesc_pseudo_register_name (gdbarch, sparc32_pseudo_register_name);
|
||||
set_tdesc_pseudo_register_type (gdbarch, sparc32_pseudo_register_type);
|
||||
set_gdbarch_pseudo_register_read (gdbarch, sparc32_pseudo_register_read);
|
||||
set_gdbarch_pseudo_register_write (gdbarch, sparc32_pseudo_register_write);
|
||||
|
||||
|
|
@ -1763,6 +1805,39 @@ sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
|
||||
frame_unwind_append_unwinder (gdbarch, &sparc32_frame_unwind);
|
||||
|
||||
if (tdesc_has_registers (tdesc))
|
||||
{
|
||||
struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
|
||||
|
||||
/* Validate that the descriptor provides the mandatory registers
|
||||
and allocate their numbers. */
|
||||
valid_p &= validate_tdesc_registers (tdesc, tdesc_data,
|
||||
"org.gnu.gdb.sparc.cpu",
|
||||
sparc_core_register_names,
|
||||
ARRAY_SIZE (sparc_core_register_names),
|
||||
SPARC_G0_REGNUM);
|
||||
valid_p &= validate_tdesc_registers (tdesc, tdesc_data,
|
||||
"org.gnu.gdb.sparc.fpu",
|
||||
tdep->fpu_register_names,
|
||||
tdep->fpu_registers_num,
|
||||
SPARC_F0_REGNUM);
|
||||
valid_p &= validate_tdesc_registers (tdesc, tdesc_data,
|
||||
"org.gnu.gdb.sparc.cp0",
|
||||
tdep->cp0_register_names,
|
||||
tdep->cp0_registers_num,
|
||||
SPARC_F0_REGNUM +
|
||||
tdep->fpu_registers_num);
|
||||
if (!valid_p)
|
||||
{
|
||||
tdesc_data_cleanup (tdesc_data);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Target description may have changed. */
|
||||
info.tdep_info = tdesc_data;
|
||||
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
|
||||
}
|
||||
|
||||
/* If we have register sets, enable the generic core file support. */
|
||||
if (tdep->gregset)
|
||||
set_gdbarch_iterate_over_regset_sections
|
||||
|
|
|
|||
|
|
@ -63,6 +63,12 @@ struct gdbarch_tdep
|
|||
int pc_regnum;
|
||||
int npc_regnum;
|
||||
|
||||
/* Register names specific for architecture (sparc32 vs. sparc64) */
|
||||
const char **fpu_register_names;
|
||||
size_t fpu_registers_num;
|
||||
const char **cp0_register_names;
|
||||
size_t cp0_registers_num;
|
||||
|
||||
/* Register sets. */
|
||||
const struct regset *gregset;
|
||||
size_t sizeof_gregset;
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@
|
|||
#include "objfiles.h"
|
||||
#include "osabi.h"
|
||||
#include "regcache.h"
|
||||
#include "target-descriptions.h"
|
||||
#include "target.h"
|
||||
#include "value.h"
|
||||
|
||||
|
|
@ -241,6 +242,9 @@ sparc64_fprs_type (struct gdbarch *gdbarch)
|
|||
"fprs", \
|
||||
"y"
|
||||
|
||||
static const char *sparc64_fpu_register_names[] = { SPARC64_FPU_REGISTERS };
|
||||
static const char *sparc64_cp0_register_names[] = { SPARC64_CP0_REGISTERS };
|
||||
|
||||
static const char *sparc64_register_names[] =
|
||||
{
|
||||
SPARC_CORE_REGISTERS,
|
||||
|
|
@ -290,6 +294,9 @@ sparc64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
|
|||
static const char *
|
||||
sparc64_register_name (struct gdbarch *gdbarch, int regnum)
|
||||
{
|
||||
if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
|
||||
return tdesc_register_name (gdbarch, regnum);
|
||||
|
||||
if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch))
|
||||
return sparc64_register_names[regnum];
|
||||
|
||||
|
|
@ -328,6 +335,9 @@ sparc64_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
|
|||
static struct type *
|
||||
sparc64_register_type (struct gdbarch *gdbarch, int regnum)
|
||||
{
|
||||
if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
|
||||
return tdesc_register_type (gdbarch, regnum);
|
||||
|
||||
/* Raw registers. */
|
||||
if (regnum == SPARC_SP_REGNUM || regnum == SPARC_FP_REGNUM)
|
||||
return builtin_type (gdbarch)->builtin_data_ptr;
|
||||
|
|
@ -1222,6 +1232,10 @@ sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
|
|||
|
||||
tdep->pc_regnum = SPARC64_PC_REGNUM;
|
||||
tdep->npc_regnum = SPARC64_NPC_REGNUM;
|
||||
tdep->fpu_register_names = sparc64_fpu_register_names;
|
||||
tdep->fpu_registers_num = ARRAY_SIZE (sparc64_fpu_register_names);
|
||||
tdep->cp0_register_names = sparc64_cp0_register_names;
|
||||
tdep->cp0_registers_num = ARRAY_SIZE (sparc64_cp0_register_names);
|
||||
|
||||
/* This is what all the fuss is about. */
|
||||
set_gdbarch_long_bit (gdbarch, 64);
|
||||
|
|
@ -1232,6 +1246,8 @@ sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
|
|||
set_gdbarch_register_name (gdbarch, sparc64_register_name);
|
||||
set_gdbarch_register_type (gdbarch, sparc64_register_type);
|
||||
set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
|
||||
set_tdesc_pseudo_register_name (gdbarch, sparc64_pseudo_register_name);
|
||||
set_tdesc_pseudo_register_type (gdbarch, sparc64_pseudo_register_type);
|
||||
set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
|
||||
set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2017-02-06 Ivo Raisr <ivo.raisr@oracle.com>
|
||||
|
||||
PR tdep/20936
|
||||
* gdb.xml/tdesc-regs.exp: Provide sparc core registers for the tests.
|
||||
|
||||
2017-02-03 Tom Tromey <tom@tromey.com>
|
||||
|
||||
PR rust/21097:
|
||||
|
|
|
|||
|
|
@ -57,6 +57,15 @@ switch -glob -- [istarget] {
|
|||
"s390*-*-*" {
|
||||
set core-regs {s390-core32.xml s390-acr.xml s390-fpr.xml}
|
||||
}
|
||||
"sparc-*-*" {
|
||||
set regdir "sparc/"
|
||||
set core-regs {sparc32-cpu.xml sparc32-fpu.xml sparc32-cp0.xml}
|
||||
}
|
||||
"sparc64-*-*" {
|
||||
set architecture "sparc:v9"
|
||||
set regdir "sparc/"
|
||||
set core-regs {sparc64-cpu.xml sparc64-fpu.xml sparc64-cp0.xml}
|
||||
}
|
||||
"spu*-*-*" {
|
||||
# This may be either the spu-linux-nat target, or the Cell/B.E.
|
||||
# multi-architecture debugger in SPU standalone executable mode.
|
||||
|
|
|
|||
Loading…
Reference in New Issue