sim: bfin: handle negative left saturated shifts as ashifts [BZ #18407]

When handling left saturated ashifts with negative immediates, they
should be treated as right ashifts.  This matches hardware behavior.

Reported-by: Igor Rayak <igorr@gitatechnologies.com>
This commit is contained in:
Mike Frysinger 2015-10-11 03:32:11 -04:00
parent 5fde150fed
commit 3f946aa825
4 changed files with 33 additions and 1 deletions

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@ -1,3 +1,9 @@
2015-10-11 Mike Frysinger <vapier@gentoo.org>
PR sim/18407
* bfin-sim.c (decode_dsp32shiftimm_0): Call ashiftrt when count
is less than 0.
2015-06-24 Mike Frysinger <vapier@gentoo.org>
* interp.c (trace_register): Delete.

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@ -6083,7 +6083,11 @@ decode_dsp32shiftimm_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
int count = imm6 (immag);
TRACE_INSN (cpu, "R%i = R%i << %i (S);", dst0, src1, count);
STORE (DREG (dst0), lshift (cpu, DREG (src1), count, 32, 1, 1));
if (count < 0)
STORE (DREG (dst0), ashiftrt (cpu, DREG (src1), -count, 32));
else
STORE (DREG (dst0), lshift (cpu, DREG (src1), count, 32, 1, 1));
}
else if (sop == 2 && sopcde == 2)
{

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@ -1,3 +1,8 @@
2015-10-11 Mike Frysinger <vapier@gentoo.org>
PR sim/18407
* ashift_left.s: New test.
2013-12-07 Mike Frysinger <vapier@gentoo.org>
* run-tests.sh: Add +x file mode.

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@ -0,0 +1,17 @@
# Blackfin testcase for left ashift
# Dreg = Dreg << imm (S);
# mach: bfin
.include "testutils.inc"
.macro test in:req, shift:req, out:req, opt
imm32 r0, \in;
r1 = r0 >>> \shift \opt;
CHECKREG r1, \out;
.endm
start
test 2, 1, 1, (S);
pass