binutils/testsuite: Verify the handling of invalid `r_sym' in relocation

Verify that `strip' terminates gracefully and a correct error message is
produced for a relocation encountered with an invalid symbol index.  No
single relocation number is valid across all targets we support, so pick
a few numbers to choose from depending on the target.

	binutils/
	* testsuite/binutils-all/strip-14.d: New test.
	* testsuite/binutils-all/strip-14rel.s: New test source.
	* testsuite/binutils-all/strip-14rela.s: New test source.
	* testsuite/binutils-all/strip-14mips64.s: New test source.
	* testsuite/binutils-all/objcopy.exp: Run the new test.
This commit is contained in:
Maciej W. Rozycki 2018-04-09 13:42:00 +01:00
parent 9ccfa98b4c
commit 3f97ba9fc8
6 changed files with 95 additions and 0 deletions

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@ -1,3 +1,11 @@
2018-04-09 Maciej W. Rozycki <macro@mips.com>
* testsuite/binutils-all/strip-14.d: New test.
* testsuite/binutils-all/strip-14rel.s: New test source.
* testsuite/binutils-all/strip-14rela.s: New test source.
* testsuite/binutils-all/strip-14mips64.s: New test source.
* testsuite/binutils-all/objcopy.exp: Run the new test.
2018-04-06 Tom Tromey <tom@tromey.com>
* dwarf.c (read_and_display_attr_value): Add missing DW_LANG

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@ -1107,6 +1107,22 @@ if [is_elf_format] {
set reloc_format rela
}
run_dump_test "strip-13" [list [list source strip-13${reloc_format}.s]]
# Select a relocation number that corresponds to one actually
# supported by the target and ABI being tested.
if { [istarget "aarch64*-*"] } {
set reloc 259
} elseif { [istarget "ia64*-*"] \
|| [istarget "m32r*-*"] \
|| [istarget "v850*-*"] } {
set reloc 50
} else {
set reloc 1
}
run_dump_test "strip-14" [list \
[list source strip-14${reloc_format}.s] \
[list as "--defsym RELOC=${reloc}"] \
[list as [expr {[is_elf64 tmpdir/bintest.o] \
? "--defsym ELF64=1" : ""}]]]
# This requires STB_GNU_UNIQUE support with OSABI set to GNU.
if { [supports_gnu_unique] } {

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@ -0,0 +1,7 @@
#PROG: strip
#strip: -g
#error: \A[^\n]*: relocation 0 has invalid symbol index 1048560\Z
#not-target: rx-*
# The RX targets do not complain about bad relocs, unless they are
# actually used
# (which is what should really happen with the other targets...)

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@ -0,0 +1,14 @@
.text
foo:
.dc.l 0x12345678
.section .rela.text
.dc.a 0
.dc.l 0x000ffff0
.dc.b 0, 0, 0, RELOC
.dc.a 0x00000001
.dc.a 0
.dc.l 0
.dc.b 0, 0, 0, 0
.dc.a 0

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@ -0,0 +1,23 @@
.text
foo:
.dc.l 0x12345678
.section .rel.text
.ifdef ELF64
.dc.a 0
.dc.a 0x000ffff000000000 + RELOC
.dc.a 0
.dc.a 0
.else
# Some targets, such as `m68hc11-*', use 16-bit addresses.
# With them `.dc.a' emits 16-bit quantities, so we need to use
# `.dc.l' for 32-bit relocation data.
.dc.l 0
.dc.l 0x0ffff000 + RELOC
.dc.l 0
.dc.l 0
.endif

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@ -0,0 +1,27 @@
.text
foo:
.dc.l 0x12345678
.section .rela.text
.ifdef ELF64
.dc.a 0
.dc.a 0x000ffff000000000 + RELOC
.dc.a 0x0000000000000001
.dc.a 0
.dc.a 0
.dc.a 0
.else
# Some targets, such as `h8300-*' or `ip2k-*', use 16-bit addresses.
# With them `.dc.a' emits 16-bit quantities, so we need to use
# `.dc.l' for 32-bit relocation data.
.dc.l 0
.dc.l 0x0ffff000 + RELOC
.dc.l 0x00000001
.dc.l 0
.dc.l 0
.dc.l 0
.endif