2006-07-19 Paul Brook <paul@codesourcery.com>

gas/
	* config/tc-arm.c (insns): Fix rbit Arm opcode.
	gas/testsuite/
	* gas/arm/archv6t2.d: Adjust expected output for rbit.
	opcodes/
	* armd-dis.c (arm_opcodes): Fix rbit opcode.
This commit is contained in:
Paul Brook 2006-07-19 12:53:33 +00:00
parent 8c991f1883
commit 401a54cf6e
6 changed files with 18 additions and 6 deletions

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@ -1,3 +1,7 @@
2006-07-19 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (insns): Fix rbit Arm opcode.
2006-07-18 Paul Brook <paul@codesourcery.com>
* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.

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@ -14758,7 +14758,7 @@ static const struct asm_opcode insns[] =
TCE(mls, 0600090, fb000010, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mlas, t_mla),
TCE(movw, 3000000, f2400000, 2, (RRnpc, HALF), mov16, t_mov16),
TCE(movt, 3400000, f2c00000, 2, (RRnpc, HALF), mov16, t_mov16),
TCE(rbit, 3ff0f30, fa90f0a0, 2, (RR, RR), rd_rm, t_rbit),
TCE(rbit, 6ff0f30, fa90f0a0, 2, (RR, RR), rd_rm, t_rbit),
TC3(ldrht, 03000b0, f8300e00, 2, (RR, ADDR), ldsttv4, t_ldstt),
TC3(ldrsht, 03000f0, f9300e00, 2, (RR, ADDR), ldsttv4, t_ldstt),

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@ -1,3 +1,7 @@
2006-07-19 Paul Brook <paul@codesourcery.com>
* gas/arm/archv6t2.d: Adjust expected output for rbit.
2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add sldt, smsw and str.

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@ -24,10 +24,10 @@ Disassembly of section .text:
0+40 <[^>]+> e7a00059 sbfx r0, r9, #0, #1
0+44 <[^>]+> e7a008d0 sbfx r0, r0, #17, #1
0+48 <[^>]+> e7b10050 sbfx r0, r0, #0, #18
0+4c <[^>]+> e3ff0f30 rbit r0, r0
0+50 <[^>]+> 13ff0f30 rbitne r0, r0
0+54 <[^>]+> e3ff9f30 rbit r9, r0
0+58 <[^>]+> e3ff0f39 rbit r0, r9
0+4c <[^>]+> e6ff0f30 rbit r0, r0
0+50 <[^>]+> 16ff0f30 rbitne r0, r0
0+54 <[^>]+> e6ff9f30 rbit r9, r0
0+58 <[^>]+> e6ff0f39 rbit r0, r9
0+5c <[^>]+> e0600090 mls r0, r0, r0, r0
0+60 <[^>]+> 10600090 mlsne r0, r0, r0, r0
0+64 <[^>]+> e0690090 mls r9, r0, r0, r0

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@ -1,3 +1,7 @@
2006-07-19 Paul Brook <paul@codesourcery.com>
* armd-dis.c (arm_opcodes): Fix rbit opcode.
2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to

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@ -761,7 +761,7 @@ static const struct opcode32 arm_opcodes[] =
{ARM_EXT_V6T2, 0x00300090, 0x0f300090, "ldr%c%6's%5?hbt\t%12-15r, %s"},
{ARM_EXT_V6T2, 0x03000000, 0x0ff00000, "movw%c\t%12-15r, %V"},
{ARM_EXT_V6T2, 0x03400000, 0x0ff00000, "movt%c\t%12-15r, %V"},
{ARM_EXT_V6T2, 0x03ff0f30, 0x0fff0ff0, "rbit%c\t%12-15r, %0-3r"},
{ARM_EXT_V6T2, 0x06ff0f30, 0x0fff0ff0, "rbit%c\t%12-15r, %0-3r"},
{ARM_EXT_V6T2, 0x07a00050, 0x0fa00070, "%22?usbfx%c\t%12-15r, %0-3r, #%7-11d, #%16-20W"},
/* ARM V6Z instructions. */