* ppc-linux-nat.c (ppc_linux_target_wordsize): New function.
(ppc_linux_auxv_parse): New function. (ppc_linux_read_description): Use ppc_linux_target_wordsize. (_initialize_ppc_linux_nat): Install ppc_linux_auxv_parse.
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@ -1,4 +1,11 @@
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2009-04-93 Ulrich Weigand <uweigand@de.ibm.com>
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2009-04-03 Ulrich Weigand <uweigand@de.ibm.com>
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* ppc-linux-nat.c (ppc_linux_target_wordsize): New function.
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(ppc_linux_auxv_parse): New function.
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(ppc_linux_read_description): Use ppc_linux_target_wordsize.
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(_initialize_ppc_linux_nat): Install ppc_linux_auxv_parse.
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2009-04-03 Ulrich Weigand <uweigand@de.ibm.com>
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* spu-linux-nat.c (spu_bfd_open): Set filename of in-memory
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BFD to contents of SPU name note.
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@ -1240,6 +1240,51 @@ fill_fpregset (const struct regcache *regcache,
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fpregsetp, sizeof (*fpregsetp));
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}
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static int
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ppc_linux_target_wordsize (void)
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{
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int wordsize = 4;
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/* Check for 64-bit inferior process. This is the case when the host is
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64-bit, and in addition the top bit of the MSR register is set. */
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#ifdef __powerpc64__
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long msr;
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int tid = TIDGET (inferior_ptid);
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if (tid == 0)
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tid = PIDGET (inferior_ptid);
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errno = 0;
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msr = (long) ptrace (PTRACE_PEEKUSER, tid, PT_MSR * 8, 0);
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if (errno == 0 && msr < 0)
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wordsize = 8;
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#endif
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return wordsize;
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}
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static int
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ppc_linux_auxv_parse (struct target_ops *ops, gdb_byte **readptr,
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gdb_byte *endptr, CORE_ADDR *typep, CORE_ADDR *valp)
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{
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int sizeof_auxv_field = ppc_linux_target_wordsize ();
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gdb_byte *ptr = *readptr;
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if (endptr == ptr)
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return 0;
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if (endptr - ptr < sizeof_auxv_field * 2)
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return -1;
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*typep = extract_unsigned_integer (ptr, sizeof_auxv_field);
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ptr += sizeof_auxv_field;
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*valp = extract_unsigned_integer (ptr, sizeof_auxv_field);
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ptr += sizeof_auxv_field;
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*readptr = ptr;
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return 1;
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}
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static const struct target_desc *
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ppc_linux_read_description (struct target_ops *ops)
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{
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@ -1299,24 +1344,15 @@ ppc_linux_read_description (struct target_ops *ops)
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if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP)
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isa205 = 1;
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/* Check for 64-bit inferior process. This is the case when the host is
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64-bit, and in addition the top bit of the MSR register is set. */
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#ifdef __powerpc64__
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{
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long msr;
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errno = 0;
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msr = (long) ptrace (PTRACE_PEEKUSER, tid, PT_MSR * 8, 0);
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if (errno == 0 && msr < 0)
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{
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if (vsx)
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return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l;
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else if (altivec)
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return isa205? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
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if (ppc_linux_target_wordsize () == 8)
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{
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if (vsx)
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return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l;
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else if (altivec)
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return isa205? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
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return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l;
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}
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}
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#endif
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return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l;
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}
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if (vsx)
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return isa205? tdesc_powerpc_isa205_vsx32l : tdesc_powerpc_vsx32l;
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@ -1350,6 +1386,7 @@ _initialize_ppc_linux_nat (void)
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t->to_watchpoint_addr_within_range = ppc_linux_watchpoint_addr_within_range;
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t->to_read_description = ppc_linux_read_description;
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t->to_auxv_parse = ppc_linux_auxv_parse;
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/* Register the target. */
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linux_nat_add_target (t);
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