* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
	(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
	(BFD32_BACKENDS): Add elf32-tic6x.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
	* Makefile.in: Regenerate.
	* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
	(bfd_archures_list): Update.
	* config.bfd (tic6x-*-elf): New.
	* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
	New.
	* configure: Regenerate.
	* cpu-tic6x.c, elf32-tic6x.c: New.
	* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
	BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
	BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
	BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
	BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
	BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
	BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
	BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
	BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
	BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
	BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
	BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
	BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
	* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
	(_bfd_target_vector): Update.
	* bfd-in2.h, libbfd.h: Regenerate.

binutils:
	* MAINTAINERS: Add self as TI C6X maintainer.
	* NEWS: Add news entry for TI C6X support.
	* readelf.c: Include elf/tic6x.h.
	(guess_is_rela): Handle EM_TI_C6000.
	(dump_relocations): Likewise.
	(get_tic6x_dynamic_type): New.
	(get_dynamic_type): Call it.
	(get_machine_flags): Handle EF_C6000_REL.
	(get_osabi_name): Handle machine-specific values only for relevant
	machines.  Handle C6X values.
	(get_tic6x_segment_type): New.
	(get_segment_type): Call it.
	(get_tic6x_section_type_name): New.
	(get_section_type_name): Call it.
	(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
	EM_TI_C6000.

gas:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
	(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
	* Makefile.in: Regenerate.
	* NEWS: Add news entry for TI C6X support.
	* app.c (do_scrub_chars): Handle "||^" for TI C6X.  Handle
	TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR.  Keep spaces in
	operands if TC_KEEP_OPERAND_SPACES.
	* configure.tgt (tic6x-*-*): New.
	* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
	TC_PREDICATE_END_CHAR): Define.
	* config/tc-tic6x.c, config/tc-tic6x.h: New.
	* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TIC6X): Define.
	* doc/as.texinfo: Add TI C6X documentation.  Include c-tic6x.texi.
	* doc/c-tic6x.texi: New.

gas/testsuite:
	* gas/tic6x: New directory and testcases.

include:
	* dis-asm.h (print_insn_tic6x): Declare.

include/elf:
	* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
	* tic6x.h: New.

include/opcode:
	* tic6x-control-registers.h, tic6x-insn-formats.h,
	tic6x-opcode-table.h, tic6x.h: New.

ld:
	* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
	eelf32_tic6x_le.o.
	(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
	* NEWS: Add news entry for TI C6X support.
	* configure.tgt (tic6x-*-*): New.
	* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.

ld/testsuite:
	* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
	* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
	* ld-tic6x: New directory and testcases.

opcodes:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.
This commit is contained in:
Joseph Myers 2010-03-25 21:12:36 +00:00
parent aa7d318d60
commit 40b365969f
223 changed files with 19366 additions and 24 deletions

View File

@ -1,3 +1,34 @@
2010-03-25 Joseph Myers <joseph@codesourcery.com>
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
2010-03-24 H.J. Lu <hongjiu.lu@intel.com>
* aout-target.h: Update copyright year.

View File

@ -129,6 +129,7 @@ ALL_MACHINES = \
cpu-tic30.lo \
cpu-tic4x.lo \
cpu-tic54x.lo \
cpu-tic6x.lo \
cpu-tic80.lo \
cpu-v850.lo \
cpu-vax.lo \
@ -201,6 +202,7 @@ ALL_MACHINES_CFILES = \
cpu-tic30.c \
cpu-tic4x.c \
cpu-tic54x.c \
cpu-tic6x.c \
cpu-tic80.c \
cpu-v850.c \
cpu-vax.c \
@ -317,6 +319,7 @@ BFD32_BACKENDS = \
elf32-sh64.lo \
elf32-sparc.lo \
elf32-spu.lo \
elf32-tic6x.lo \
elf32-v850.lo \
elf32-vax.lo \
elf32-xc16x.lo \
@ -501,6 +504,7 @@ BFD32_BACKENDS_CFILES = \
elf32-sh64.c \
elf32-sparc.c \
elf32-spu.c \
elf32-tic6x.c \
elf32-v850.c \
elf32-vax.c \
elf32-xc16x.c \

View File

@ -425,6 +425,7 @@ ALL_MACHINES = \
cpu-tic30.lo \
cpu-tic4x.lo \
cpu-tic54x.lo \
cpu-tic6x.lo \
cpu-tic80.lo \
cpu-v850.lo \
cpu-vax.lo \
@ -497,6 +498,7 @@ ALL_MACHINES_CFILES = \
cpu-tic30.c \
cpu-tic4x.c \
cpu-tic54x.c \
cpu-tic6x.c \
cpu-tic80.c \
cpu-v850.c \
cpu-vax.c \
@ -614,6 +616,7 @@ BFD32_BACKENDS = \
elf32-sh64.lo \
elf32-sparc.lo \
elf32-spu.lo \
elf32-tic6x.lo \
elf32-v850.lo \
elf32-vax.lo \
elf32-xc16x.lo \
@ -798,6 +801,7 @@ BFD32_BACKENDS_CFILES = \
elf32-sh64.c \
elf32-sparc.c \
elf32-spu.c \
elf32-tic6x.c \
elf32-v850.c \
elf32-vax.c \
elf32-xc16x.c \
@ -1287,6 +1291,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic30.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic4x.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic54x.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic6x.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-tic80.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-v850.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-vax.Plo@am__quote@
@ -1363,6 +1368,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-sh64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-sparc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-spu.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-tic6x.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-v850.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-vax.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-xc16x.Plo@am__quote@

View File

@ -305,6 +305,7 @@ DESCRIPTION
.#define bfd_mach_tic3x 30
.#define bfd_mach_tic4x 40
. bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
. bfd_arch_tic6x, {* Texas Instruments TMS320C6X *}
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
. bfd_arch_v850, {* NEC V850 *}
.#define bfd_mach_v850 1
@ -526,6 +527,7 @@ extern const bfd_arch_info_type bfd_spu_arch;
extern const bfd_arch_info_type bfd_tic30_arch;
extern const bfd_arch_info_type bfd_tic4x_arch;
extern const bfd_arch_info_type bfd_tic54x_arch;
extern const bfd_arch_info_type bfd_tic6x_arch;
extern const bfd_arch_info_type bfd_tic80_arch;
extern const bfd_arch_info_type bfd_v850_arch;
extern const bfd_arch_info_type bfd_vax_arch;
@ -600,6 +602,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_tic30_arch,
&bfd_tic4x_arch,
&bfd_tic54x_arch,
&bfd_tic6x_arch,
&bfd_tic80_arch,
&bfd_v850_arch,
&bfd_vax_arch,

View File

@ -1971,6 +1971,7 @@ enum bfd_architecture
#define bfd_mach_tic3x 30
#define bfd_mach_tic4x 40
bfd_arch_tic54x, /* Texas Instruments TMS320C54X */
bfd_arch_tic6x, /* Texas Instruments TMS320C6X */
bfd_arch_tic80, /* TI TMS320c80 (MVP) */
bfd_arch_v850, /* NEC V850 */
#define bfd_mach_v850 1
@ -3639,6 +3640,34 @@ significant 7 bits of a 23-bit extended address are placed into
the opcode. */
BFD_RELOC_TIC54X_MS7_OF_23,
/* TMS320C6000 relocations. */
BFD_RELOC_C6000_PCR_S21,
BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10,
BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16,
BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16,
BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H,
BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16,
BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H,
BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B,
BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W,
BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W,
BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX,
BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY,
BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD,
BFD_RELOC_C6000_NOCMP,
/* This is a 48 bit reloc for the FR30 that stores 32 bits. */
BFD_RELOC_FR30_48,

View File

@ -1465,6 +1465,11 @@ case "${targ}" in
;;
#endif
tic6x-*-elf)
targ_defvec=bfd_elf32_tic6x_le_vec
targ_selvecs=bfd_elf32_tic6x_be_vec
;;
tic80*-*-*)
targ_defvec=tic80coff_vec
targ_underscore=yes

2
bfd/configure vendored
View File

@ -15106,6 +15106,8 @@ do
bfd_elf32_sparc_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
bfd_elf32_sparc_vxworks_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
bfd_elf32_spu_vec) tb="$tb elf32-spu.lo elf32.lo $elf" ;;
bfd_elf32_tic6x_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tic6x_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_us_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;

View File

@ -765,6 +765,8 @@ do
bfd_elf32_sparc_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
bfd_elf32_sparc_vxworks_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
bfd_elf32_spu_vec) tb="$tb elf32-spu.lo elf32.lo $elf" ;;
bfd_elf32_tic6x_be_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tic6x_le_vec) tb="$tb elf32-tic6x.lo elf32.lo $elf" ;;
bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_us_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;

40
bfd/cpu-tic6x.c Normal file
View File

@ -0,0 +1,40 @@
/* BFD support for the TI C6X processor.
Copyright 2010
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_tic6x_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_tic6x, /* Architecture. */
0, /* No BFD machine numbers needed. */
"tic6x", /* Architecture name. */
"tic6x", /* Printable name. */
2, /* Section alignment power. */
TRUE, /* Default machine for this architecture. */
bfd_default_compatible,
bfd_default_scan,
0,
};

1000
bfd/elf32-tic6x.c Normal file

File diff suppressed because it is too large Load Diff

View File

@ -7,7 +7,8 @@
(This include file is not for users of the library.)
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
2010
Free Software Foundation, Inc.
Written by Cygnus Support.
@ -1607,6 +1608,32 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_TIC54X_23",
"BFD_RELOC_TIC54X_16_OF_23",
"BFD_RELOC_TIC54X_MS7_OF_23",
"BFD_RELOC_C6000_PCR_S21",
"BFD_RELOC_C6000_PCR_S12",
"BFD_RELOC_C6000_PCR_S10",
"BFD_RELOC_C6000_PCR_S7",
"BFD_RELOC_C6000_ABS_S16",
"BFD_RELOC_C6000_ABS_L16",
"BFD_RELOC_C6000_ABS_H16",
"BFD_RELOC_C6000_SBR_U15_B",
"BFD_RELOC_C6000_SBR_U15_H",
"BFD_RELOC_C6000_SBR_U15_W",
"BFD_RELOC_C6000_SBR_S16",
"BFD_RELOC_C6000_SBR_L16_B",
"BFD_RELOC_C6000_SBR_L16_H",
"BFD_RELOC_C6000_SBR_L16_W",
"BFD_RELOC_C6000_SBR_H16_B",
"BFD_RELOC_C6000_SBR_H16_H",
"BFD_RELOC_C6000_SBR_H16_W",
"BFD_RELOC_C6000_SBR_GOT_U15_W",
"BFD_RELOC_C6000_SBR_GOT_L16_W",
"BFD_RELOC_C6000_SBR_GOT_H16_W",
"BFD_RELOC_C6000_DSBT_INDEX",
"BFD_RELOC_C6000_PREL31",
"BFD_RELOC_C6000_COPY",
"BFD_RELOC_C6000_ALIGN",
"BFD_RELOC_C6000_FPHEAD",
"BFD_RELOC_C6000_NOCMP",
"BFD_RELOC_FR30_48",
"BFD_RELOC_FR30_20",
"BFD_RELOC_FR30_6_IN_4",

View File

@ -3762,6 +3762,61 @@ ENUMDOC
significant 7 bits of a 23-bit extended address are placed into
the opcode.
ENUM
BFD_RELOC_C6000_PCR_S21
ENUMX
BFD_RELOC_C6000_PCR_S12
ENUMX
BFD_RELOC_C6000_PCR_S10
ENUMX
BFD_RELOC_C6000_PCR_S7
ENUMX
BFD_RELOC_C6000_ABS_S16
ENUMX
BFD_RELOC_C6000_ABS_L16
ENUMX
BFD_RELOC_C6000_ABS_H16
ENUMX
BFD_RELOC_C6000_SBR_U15_B
ENUMX
BFD_RELOC_C6000_SBR_U15_H
ENUMX
BFD_RELOC_C6000_SBR_U15_W
ENUMX
BFD_RELOC_C6000_SBR_S16
ENUMX
BFD_RELOC_C6000_SBR_L16_B
ENUMX
BFD_RELOC_C6000_SBR_L16_H
ENUMX
BFD_RELOC_C6000_SBR_L16_W
ENUMX
BFD_RELOC_C6000_SBR_H16_B
ENUMX
BFD_RELOC_C6000_SBR_H16_H
ENUMX
BFD_RELOC_C6000_SBR_H16_W
ENUMX
BFD_RELOC_C6000_SBR_GOT_U15_W
ENUMX
BFD_RELOC_C6000_SBR_GOT_L16_W
ENUMX
BFD_RELOC_C6000_SBR_GOT_H16_W
ENUMX
BFD_RELOC_C6000_DSBT_INDEX
ENUMX
BFD_RELOC_C6000_PREL31
ENUMX
BFD_RELOC_C6000_COPY
ENUMX
BFD_RELOC_C6000_ALIGN
ENUMX
BFD_RELOC_C6000_FPHEAD
ENUMX
BFD_RELOC_C6000_NOCMP
ENUMDOC
TMS320C6000 relocations.
ENUM
BFD_RELOC_FR30_48
ENUMDOC

View File

@ -674,6 +674,8 @@ extern const bfd_target bfd_elf32_shvxworks_vec;
extern const bfd_target bfd_elf32_sparc_vec;
extern const bfd_target bfd_elf32_sparc_vxworks_vec;
extern const bfd_target bfd_elf32_spu_vec;
extern const bfd_target bfd_elf32_tic6x_be_vec;
extern const bfd_target bfd_elf32_tic6x_le_vec;
extern const bfd_target bfd_elf32_tradbigmips_vec;
extern const bfd_target bfd_elf32_tradlittlemips_vec;
extern const bfd_target bfd_elf32_us_cris_vec;
@ -1020,6 +1022,8 @@ static const bfd_target * const _bfd_target_vector[] =
&bfd_elf32_sparc_vec,
&bfd_elf32_sparc_vxworks_vec,
&bfd_elf32_spu_vec,
&bfd_elf32_tic6x_be_vec,
&bfd_elf32_tic6x_le_vec,
&bfd_elf32_tradbigmips_vec,
&bfd_elf32_tradlittlemips_vec,
&bfd_elf32_us_cris_vec,

View File

@ -1,3 +1,22 @@
2010-03-25 Joseph Myers <joseph@codesourcery.com>
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
2010-03-25 Thomas Schwinge <thomas@codesourcery.com>
* doc/binutils.texi (readelf) <unwind information>: Mention support for

View File

@ -114,6 +114,7 @@ responsibility among the other maintainers.
SPU Alan Modra <amodra@gmail.com>
TIC4X Svein Seldal <svein@dev.seldal.com>
TIC54X Timothy Wall <twall@alum.mit.edu>
TIC6X Joseph Myers <joseph@codesourcery.com>
VAX Matt Thomas <matt@netbsd.org>
VAX Jan-Benedict Glaw <jbglaw@lug-owl.de>
VMS Tristan Gingold <gingold@adacore.com>

View File

@ -1,5 +1,7 @@
-*- text -*-
* Add support for the TMS320C6000 (TI C6X) processor family.
* Readelf can now display ARM unwind tables (.ARM.exidx / .ARM.extab) using
the -u / --unwind option.

View File

@ -137,6 +137,7 @@
#include "elf/sh.h"
#include "elf/sparc.h"
#include "elf/spu.h"
#include "elf/tic6x.h"
#include "elf/v850.h"
#include "elf/vax.h"
#include "elf/x86-64.h"
@ -648,6 +649,7 @@ guess_is_rela (unsigned int e_machine)
case EM_SPARC32PLUS:
case EM_SPARCV9:
case EM_SPU:
case EM_TI_C6000:
case EM_V850:
case EM_CYGNUS_V850:
case EM_VAX:
@ -1261,6 +1263,10 @@ dump_relocations (FILE * file,
case EM_C166:
rtype = elf_xc16x_reloc_type (type);
break;
case EM_TI_C6000:
rtype = elf_tic6x_reloc_type (type);
break;
}
if (rtype == NULL)
@ -1638,6 +1644,21 @@ get_score_dynamic_type (unsigned long type)
}
}
static const char *
get_tic6x_dynamic_type (unsigned long type)
{
switch (type)
{
case DT_C6000_GSYM_OFFSET: return "C6000_GSYM_OFFSET";
case DT_C6000_GSTR_OFFSET: return "C6000_GSTR_OFFSET";
case DT_C6000_DSBT_BASE: return "C6000_DSBT_BASE";
case DT_C6000_DSBT_SIZE: return "C6000_DSBT_SIZE";
case DT_C6000_PREEMPTMAP: return "C6000_PREEMPTMAP";
case DT_C6000_DSBT_INDEX: return "C6000_DSBT_INDEX";
default:
return NULL;
}
}
static const char *
get_dynamic_type (unsigned long type)
@ -1750,6 +1771,9 @@ get_dynamic_type (unsigned long type)
case EM_SCORE:
result = get_score_dynamic_type (type);
break;
case EM_TI_C6000:
result = get_tic6x_dynamic_type (type);
break;
default:
result = NULL;
break;
@ -2544,6 +2568,10 @@ get_machine_flags (unsigned e_flags, unsigned e_machine)
case EM_S390:
if (e_flags & EF_S390_HIGH_GPRS)
strcat (buf, ", highgprs");
case EM_TI_C6000:
if ((e_flags & EF_C6000_REL))
strcat (buf, ", relocatable module");
}
}
@ -2573,9 +2601,42 @@ get_osabi_name (unsigned int osabi)
case ELFOSABI_NSK: return "HP - Non-Stop Kernel";
case ELFOSABI_AROS: return "AROS";
case ELFOSABI_FENIXOS: return "FenixOS";
case ELFOSABI_STANDALONE: return _("Standalone App");
case ELFOSABI_ARM: return "ARM";
default:
if (osabi >= 64)
switch (elf_header.e_machine)
{
case EM_ARM:
switch (osabi)
{
case ELFOSABI_ARM: return "ARM";
default:
break;
}
break;
case EM_MSP430:
case EM_MSP430_OLD:
switch (osabi)
{
case ELFOSABI_STANDALONE: return _("Standalone App");
default:
break;
}
break;
case EM_TI_C6000:
switch (osabi)
{
case ELFOSABI_C6000_ELFABI: return _("Bare-metal C6000");
case ELFOSABI_C6000_LINUX: return "Linux C6000";
default:
break;
}
break;
default:
break;
}
snprintf (buff, sizeof (buff), _("<unknown: %x>"), osabi);
return buff;
}
@ -2662,6 +2723,19 @@ get_ia64_segment_type (unsigned long type)
return NULL;
}
static const char *
get_tic6x_segment_type (unsigned long type)
{
switch (type)
{
case PT_C6000_PHATTR: return "C6000_PHATTR";
default:
break;
}
return NULL;
}
static const char *
get_segment_type (unsigned long p_type)
{
@ -2703,6 +2777,9 @@ get_segment_type (unsigned long p_type)
case EM_IA_64:
result = get_ia64_segment_type (p_type);
break;
case EM_TI_C6000:
result = get_tic6x_segment_type (p_type);
break;
default:
result = NULL;
break;
@ -2863,6 +2940,33 @@ get_arm_section_type_name (unsigned int sh_type)
return NULL;
}
static const char *
get_tic6x_section_type_name (unsigned int sh_type)
{
switch (sh_type)
{
case SHT_C6000_UNWIND:
return "C6000_UNWIND";
case SHT_C6000_PREEMPTMAP:
return "C6000_PREEMPTMAP";
case SHT_C6000_ATTRIBUTES:
return "C6000_ATTRIBUTES";
case SHT_TI_ICODE:
return "TI_ICODE";
case SHT_TI_XREF:
return "TI_XREF";
case SHT_TI_HANDLER:
return "TI_HANDLER";
case SHT_TI_INITINFO:
return "TI_INITINFO";
case SHT_TI_PHATTRS:
return "TI_PHATTRS";
default:
break;
}
return NULL;
}
static const char *
get_section_type_name (unsigned int sh_type)
{
@ -2921,6 +3025,9 @@ get_section_type_name (unsigned int sh_type)
case EM_ARM:
result = get_arm_section_type_name (sh_type);
break;
case EM_TI_C6000:
result = get_tic6x_section_type_name (sh_type);
break;
default:
result = NULL;
break;
@ -8801,6 +8908,8 @@ is_32bit_abs_reloc (unsigned int reloc_type)
|| reloc_type == 23; /* R_SPARC_UA32. */
case EM_SPU:
return reloc_type == 6; /* R_SPU_ADDR32 */
case EM_TI_C6000:
return reloc_type == 1; /* R_C6000_ABS32. */
case EM_CYGNUS_V850:
case EM_V850:
return reloc_type == 6; /* R_V850_ABS32. */
@ -8984,6 +9093,8 @@ is_16bit_abs_reloc (unsigned int reloc_type)
case EM_ALTERA_NIOS2:
case EM_NIOS32:
return reloc_type == 9; /* R_NIOS_16. */
case EM_TI_C6000:
return reloc_type == 2; /* R_C6000_ABS16. */
case EM_XC16X:
case EM_C166:
return reloc_type == 2; /* R_XC16C_ABS_16. */
@ -9020,6 +9131,7 @@ is_none_reloc (unsigned int reloc_type)
case EM_L1OM: /* R_X86_64_NONE. */
case EM_MN10300: /* R_MN10300_NONE. */
case EM_M32R: /* R_M32R_NONE. */
case EM_TI_C6000:/* R_C6000_NONE. */
case EM_XC16X:
case EM_C166: /* R_XC16X_NONE. */
return reloc_type == 0;

View File

@ -1,3 +1,22 @@
2010-03-25 Joseph Myers <joseph@codesourcery.com>
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
2010-03-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.

View File

@ -159,6 +159,7 @@ TARGET_CPU_CFILES = \
config/tc-tic30.c \
config/tc-tic4x.c \
config/tc-tic54x.c \
config/tc-tic6x.c \
config/tc-vax.c \
config/tc-v850.c \
config/tc-xstormy16.c \
@ -222,6 +223,7 @@ TARGET_CPU_HFILES = \
config/tc-tic30.h \
config/tc-tic4x.h \
config/tc-tic54x.h \
config/tc-tic6x.h \
config/tc-vax.h \
config/tc-v850.h \
config/tc-xstormy16.h \

View File

@ -425,6 +425,7 @@ TARGET_CPU_CFILES = \
config/tc-tic30.c \
config/tc-tic4x.c \
config/tc-tic54x.c \
config/tc-tic6x.c \
config/tc-vax.c \
config/tc-v850.c \
config/tc-xstormy16.c \
@ -488,6 +489,7 @@ TARGET_CPU_HFILES = \
config/tc-tic30.h \
config/tc-tic4x.h \
config/tc-tic54x.h \
config/tc-tic6x.h \
config/tc-vax.h \
config/tc-v850.h \
config/tc-xstormy16.h \
@ -869,6 +871,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic30.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic4x.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic54x.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic6x.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-v850.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-vax.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-xc16x.Po@am__quote@
@ -1657,6 +1660,20 @@ tc-tic54x.obj: config/tc-tic54x.c
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tic54x.obj `if test -f 'config/tc-tic54x.c'; then $(CYGPATH_W) 'config/tc-tic54x.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tic54x.c'; fi`
tc-tic6x.o: config/tc-tic6x.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tic6x.o -MD -MP -MF $(DEPDIR)/tc-tic6x.Tpo -c -o tc-tic6x.o `test -f 'config/tc-tic6x.c' || echo '$(srcdir)/'`config/tc-tic6x.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-tic6x.Tpo $(DEPDIR)/tc-tic6x.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-tic6x.c' object='tc-tic6x.o' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tic6x.o `test -f 'config/tc-tic6x.c' || echo '$(srcdir)/'`config/tc-tic6x.c
tc-tic6x.obj: config/tc-tic6x.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tic6x.obj -MD -MP -MF $(DEPDIR)/tc-tic6x.Tpo -c -o tc-tic6x.obj `if test -f 'config/tc-tic6x.c'; then $(CYGPATH_W) 'config/tc-tic6x.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tic6x.c'; fi`
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-tic6x.Tpo $(DEPDIR)/tc-tic6x.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-tic6x.c' object='tc-tic6x.obj' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tic6x.obj `if test -f 'config/tc-tic6x.c'; then $(CYGPATH_W) 'config/tc-tic6x.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tic6x.c'; fi`
tc-vax.o: config/tc-vax.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-vax.o -MD -MP -MF $(DEPDIR)/tc-vax.Tpo -c -o tc-vax.o `test -f 'config/tc-vax.c' || echo '$(srcdir)/'`config/tc-vax.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-vax.Tpo $(DEPDIR)/tc-vax.Po

View File

@ -1,5 +1,7 @@
-*- text -*-
* Add support for the TMS320C6000 (TI C6X) processor family.
* GAS now understands an extended syntax in the .section directive flags
for COFF targets that allows the section's alignment to be specified. This
feature has also been backported to the 2.20 release series, starting with

View File

@ -1,6 +1,6 @@
/* This is the Assembler Pre-Processor
Copyright 1987, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2008
1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -384,11 +384,11 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
13: After seeing a vertical bar, looking for a second
vertical bar as a parallel expression separator.
#endif
#ifdef TC_IA64
14: After seeing a `(' at state 0, looking for a `)' as
predicate.
15: After seeing a `(' at state 1, looking for a `)' as
predicate.
#ifdef TC_PREDICATE_START_CHAR
14: After seeing a predicate start character at state 0, looking
for a predicate end character as predicate.
15: After seeing a predicate start character at state 1, looking
for a predicate end character as predicate.
#endif
#ifdef TC_Z80
16: After seeing an 'a' or an 'A' at the start of a symbol
@ -667,6 +667,16 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
line from just after the first white space. */
state = 1;
PUT ('|');
#ifdef TC_TIC6X
/* "||^" is used for SPMASKed instructions. */
ch = GET ();
if (ch == EOF)
goto fromeof;
else if (ch == '^')
PUT ('^');
else
UNGET (ch);
#endif
continue;
#endif
#ifdef TC_Z80
@ -702,8 +712,8 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
/* flushchar: */
ch = GET ();
#ifdef TC_IA64
if (ch == '(' && (state == 0 || state == 1))
#ifdef TC_PREDICATE_START_CHAR
if (ch == TC_PREDICATE_START_CHAR && (state == 0 || state == 1))
{
state += 14;
PUT (ch);
@ -711,7 +721,7 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
}
else if (state == 14 || state == 15)
{
if (ch == ')')
if (ch == TC_PREDICATE_END_CHAR)
{
state -= 14;
PUT (ch);
@ -905,7 +915,11 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
PUT (' ');
break;
case 3:
#ifndef TC_KEEP_OPERAND_SPACES
/* For TI C6X, we keep these spaces as they may separate
functional unit specifiers from operands. */
if (scrub_m68k_mri)
#endif
{
/* In MRI mode, we keep these spaces. */
UNGET (ch);
@ -915,7 +929,9 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
goto recycle; /* Sp in operands */
case 9:
case 10:
#ifndef TC_KEEP_OPERAND_SPACES
if (scrub_m68k_mri)
#endif
{
/* In MRI mode, we keep these spaces. */
state = 3;

View File

@ -1,6 +1,6 @@
/* tc-ia64.h -- Header file for tc-ia64.c.
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008,
2009 Free Software Foundation, Inc.
2009, 2010 Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of GAS, the GNU Assembler.
@ -79,6 +79,9 @@ extern const char *ia64_target_format (void);
#define LEX_QM (LEX_NAME|LEX_BEGIN_NAME) /* allow `?' inside name */
#define LEX_HASH LEX_END_NAME /* allow `#' ending a name */
#define TC_PREDICATE_START_CHAR '('
#define TC_PREDICATE_END_CHAR ')'
extern const char ia64_symbol_chars[];
#define tc_symbol_chars ia64_symbol_chars

3402
gas/config/tc-tic6x.c Normal file

File diff suppressed because it is too large Load Diff

111
gas/config/tc-tic6x.h Normal file
View File

@ -0,0 +1,111 @@
/* Definitions for TI C6X assembler.
Copyright 2010
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#define TC_TIC6X 1
#define TARGET_BYTES_BIG_ENDIAN 0
#define WORKING_DOT_WORD
#define DOUBLEBAR_PARALLEL
#define DWARF2_LINE_MIN_INSN_LENGTH 2
#define MD_APPLY_SYM_VALUE(FIX) 0
#define TC_PREDICATE_START_CHAR '['
#define TC_PREDICATE_END_CHAR ']'
/* For TI C6X, we keep spaces in what the preprocessor considers
operands as they may separate functional unit specifiers from
operands. */
#define TC_KEEP_OPERAND_SPACES 1
#define TARGET_ARCH bfd_arch_tic6x
#define TARGET_FORMAT (target_big_endian \
? "elf32-tic6x-be" \
: "elf32-tic6x-le")
typedef struct
{
/* Number of instructions in the current execute packet. */
unsigned int num_execute_packet_insns;
/* Whether a label has been seen since the last instruction or data
(in which case a following instruction may not have parallel
bars, but must start a new execute packet). */
bfd_boolean seen_label;
/* Whether compact instructions are forbidden here. */
bfd_boolean nocmp;
/* If there is a current execute packet, a pointer to the
least-significant byte of the last instruction in it (for setting
the p-bit). */
char *last_insn_lsb;
/* If there has been an SPMASK instruction in the current execute
packet, a pointer to the first byte in it (for processing
||^); otherwise NULL. */
char *spmask_addr;
/* If an SPLOOP-family instruction has been seen, and a following
SPKERNEL-family instruction has not yet been seen, the ii value
from the SPLOOP instruction (in the range 1 to 14); otherwise
0. */
int sploop_ii;
} tic6x_segment_info_type;
#define TC_SEGMENT_INFO_TYPE tic6x_segment_info_type
typedef struct
{
/* Whether this fix was for an ADDA instruction. If so, a constant
resulting from resolving the fix should be implicitly shifted
left (it represents a value to be encoded literally in the
instruction, whereas a non-constant represents a DP-relative
value counting in the appropriate units). */
bfd_boolean fix_adda;
} tic6x_fix_info;
#define TC_FIX_TYPE tic6x_fix_info
#define TC_INIT_FIX_DATA(fixP) tic6x_init_fix_data (fixP)
struct fix;
extern void tic6x_init_fix_data (struct fix *fixP);
#define md_after_parse_args() tic6x_after_parse_args ()
extern void tic6x_after_parse_args (void);
#define md_cleanup() tic6x_cleanup ()
extern void tic6x_cleanup (void);
#define md_cons_align(n) tic6x_cons_align (n)
extern void tic6x_cons_align (int n);
#define md_parse_name(name, exprP, mode, nextcharP) \
tic6x_parse_name (name, exprP, mode, nextcharP)
extern int tic6x_parse_name (const char *name, expressionS *exprP,
enum expr_mode mode, char *nextchar);
#define md_start_line_hook() tic6x_start_line_hook ()
extern void tic6x_start_line_hook (void);
#define TC_CONS_FIX_NEW(frag, where, size, exp) \
tic6x_cons_fix_new (frag, where, size, exp)
extern void tic6x_cons_fix_new (fragS *frag, int where, int size,
expressionS *exp);
#define tc_frob_label(sym) tic6x_frob_label (sym)
extern void tic6x_frob_label (symbolS *sym);
#define tc_unrecognized_line(c) tic6x_unrecognized_line (c)
extern int tic6x_unrecognized_line (int c);

View File

@ -400,6 +400,7 @@ case ${generic_target} in
tic30-*-*coff*) fmt=coff bfd_gas=yes ;;
tic4x-*-* | c4x-*-*) fmt=coff bfd_gas=yes ;;
tic54x-*-* | c54x*-*-*) fmt=coff bfd_gas=yes need_libm=yes;;
tic6x-*-*) fmt=elf ;;
v850-*-*) fmt=elf ;;
v850e-*-*) fmt=elf ;;

View File

@ -65,6 +65,7 @@ CPU_DOCS = \
c-sh64.texi \
c-sparc.texi \
c-tic54x.texi \
c-tic6x.texi \
c-vax.texi \
c-v850.texi \
c-xtensa.texi \

View File

@ -305,6 +305,7 @@ CPU_DOCS = \
c-sh64.texi \
c-sparc.texi \
c-tic54x.texi \
c-tic6x.texi \
c-vax.texi \
c-v850.texi \
c-xtensa.texi \

View File

@ -1,5 +1,5 @@
@c Copyright 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002,
@c 2003, 2005, 2006, 2007, 2008, 2009
@c 2003, 2005, 2006, 2007, 2008, 2009, 2010
@c Free Software Foundation, Inc.
@c This file is part of the documentation for the GAS manual
@ -64,6 +64,7 @@
@set SH
@set SPARC
@set TIC54X
@set TIC6X
@set V850
@set VAX
@set XTENSA

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@ -1,6 +1,6 @@
\input texinfo @c -*-Texinfo-*-
@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
@c Free Software Foundation, Inc.
@c UPDATE!! On future updates--
@c (1) check for new machine-dep cmdline options in
@ -104,7 +104,7 @@ This file documents the GNU Assembler "@value{AS}".
@c man begin COPYRIGHT
Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
2006, 2007, 2008, 2009 Free Software Foundation, Inc.
2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
@ -154,7 +154,7 @@ done.
@vskip 0pt plus 1filll
Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
2006, 2007, 2008, 2009 Free Software Foundation, Inc.
2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
@ -472,6 +472,13 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-merrors-to-file} @var{<filename>}|@b{-me} @var{<filename>}]
@end ifset
@ifset TIC6X
@emph{Target TIC6X options:}
[@b{-march=@var{arch}}] [@b{-matomic}|@b{-mno-atomic}]
[@b{-mbig-endian}|@b{-mlittle-endian}]
@end ifset
@ifset Z80
@emph{Target Z80 options:}
@ -1245,6 +1252,38 @@ but evaluates to zero.
@end table
@end ifset
@ifset TIC6X
The following options are available when @value{AS} is configured for a
TMS320C6000 processor.
@table @gcctabopt
@item -march=@var{arch}
Enable (only) instructions from architecture @var{arch}. By default,
all instructions are permitted.
The following values of @var{arch} are accepted: @code{c62x},
@code{c64x}, @code{c64x+}, @code{c67x}, @code{c67x+}, @code{c674x}.
@item -matomic
@itemx -mno-atomic
Enable or disable the optional C64x+ atomic operation instructions.
By default, they are enabled if no @option{-march} option is given, or
if an architecture is specified with @option{-march} that implies
these instructions are present (currently, there are no such
architectures); they are disabled if an architecture is specified with
@option{-march} on which the instructions are optional or not
present. This option overrides such a default from the architecture,
independent of the order in which the @option{-march} or
@option{-matomic} or @option{-mno-atomic} options are passed.
@item -mbig-endian
@itemx -mlittle-endian
Generate code for the specified endianness. The default is
little-endian.
@end table
@end ifset
@ifset XTENSA
The following options are available when @value{AS} is configured for
an Xtensa processor.
@ -2315,6 +2354,9 @@ is considered a comment and is ignored. The line comment character is
@ifset RX
@samp{#} on the RX;
@end ifset
@ifset TIC6X
@samp{;} on the TMS320C6X;
@end ifset
@ifset VAX
@samp{#} on the Vax;
@end ifset
@ -6862,6 +6904,9 @@ subject, see the hardware manufacturer's manual.
@ifset TIC54X
* TIC54X-Dependent:: TI TMS320C54x Dependent Features
@end ifset
@ifset TIC6X
* TIC6X-Dependent :: TI TMS320C6x Dependent Features
@end ifset
@ifset V850
* V850-Dependent:: V850 Dependent Features
@end ifset
@ -7053,6 +7098,10 @@ family.
@include c-tic54x.texi
@end ifset
@ifset TIC6X
@include c-tic6x.texi
@end ifset
@ifset Z80
@include c-z80.texi
@end ifset

117
gas/doc/c-tic6x.texi Normal file
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@ -0,0 +1,117 @@
@c Copyright 2010 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node TIC6X-Dependent
@chapter TIC6X Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter TIC6X Dependent Features
@end ifclear
@cindex TIC6X support
@cindex TMS320C6X support
@menu
* TIC6X Options:: Options
* TIC6X Syntax:: Syntax
* TIC6X Directives:: Directives
@end menu
@node TIC6X Options
@section TIC6X Options
@cindex TIC6X options
@cindex options for TIC6X
@table @code
@cindex @code{-march=} command line option, TIC6X
@item -march=@var{arch}
Enable (only) instructions from architecture @var{arch}. By default,
all instructions are permitted.
The following values of @var{arch} are accepted: @code{c62x},
@code{c64x}, @code{c64x+}, @code{c67x}, @code{c67x+}, @code{c674x}.
@cindex @code{-matomic} command line option, TIC6X
@cindex @code{-mno-atomic} command line option, TIC6X
@item -matomic
@itemx -mno-atomic
Enable or disable the optional C64x+ atomic operation instructions.
By default, they are enabled if no @option{-march} option is given, or
if an architecture is specified with @option{-march} that implies
these instructions are present (currently, there are no such
architectures); they are disabled if an architecture is specified with
@option{-march} on which the instructions are optional or not
present. This option overrides such a default from the architecture,
independent of the order in which the @option{-march} or
@option{-matomic} or @option{-mno-atomic} options are passed.
@cindex TIC6X big-endian output
@cindex TIC6X little-endian output
@cindex big-endian output, TIC6X
@cindex little-endian output, TIC6X
@item -mbig-endian
@itemx -mlittle-endian
Generate code for the specified endianness. The default is
little-endian.
@end table
@node TIC6X Syntax
@section TIC6X Syntax
@cindex line comment character, TIC6X
@cindex TIC6X line comment character
The presence of a @samp{;} on a line indicates the start of a comment
that extends to the end of the current line. If a @samp{#} or
@samp{*} appears as the first character of a line, the whole line is
treated as a comment.
@cindex line separator, TIC6X
@cindex statement separator, TIC6X
@cindex TIC6X line separator
The @samp{@@} character can be used instead of a newline to separate
statements.
Instruction, register and functional unit names are case-insensitive.
@command{@value{AS}} requires fully-specified functional unit names,
such as @samp{.S1}, @samp{.L1X} or @samp{.D1T2}, on all instructions
using a functional unit.
For some instructions, there may be syntactic ambiguity between
register or functional unit names and the names of labels or other
symbols. To avoid this, enclose the ambiguous symbol name in
parentheses; register and functional unit names may not be enclosed in
parentheses.
@node TIC6X Directives
@section TIC6X Directives
@cindex machine directives, TIC6X
@cindex TIC6X machine directives
Directives controlling the set of instructions accepted by the
assembler have effect for instructions between the directive and any
subsequent directive overriding it.
@table @code
@cindex @code{.arch} directive, TIC6X
@item .arch @var{arch}
This has the same effect as @option{-march=@var{arch}}.
@cindex @code{.atomic} directive, TIC6X
@cindex @code{.noatomic} directive, TIC6X
@item .atomic
@itemx .noatomic
These have the same effects as @option{-matomic} and
@option{-mno-atomic}.
@cindex @code{.nocmp} directive, TIC6X
@item .nocmp
Disallow use of C64x+ compact instructions in the current text
section.
@end table

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@ -1,3 +1,7 @@
2010-03-25 Joseph Myers <joseph@codesourcery.com>
* gas/tic6x: New directory and testcases.
2010-03-23 Joseph Myers <joseph@codesourcery.com>
* gas/macros/dot.s: Remove space in .byte operands.

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@ -0,0 +1,4 @@
#name: C6X invalid -march
#as: -march=invalid
#source: dummy.s
#error-output: arch-invalid-1.l

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@ -0,0 +1,2 @@
Assembler messages:
Error: unknown architecture 'invalid'

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@ -0,0 +1,2 @@
#name: C6X invalid .arch
#error-output: arch-invalid-2.l

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@ -0,0 +1,2 @@
[^:]*: Assembler messages:
[^:]*:1: Error: unknown architecture 'nonesuch'

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@ -0,0 +1 @@
.arch nonesuch

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@ -0,0 +1,13 @@
#objdump: -r
#name: C6X data relocations
.*: *file format elf32-tic6x-le
RELOCATION RECORDS FOR \[\.data\]:
OFFSET *TYPE *VALUE *
0+00 R_C6000_ABS32 +ext1
0+04 R_C6000_ABS32 +ext1\+0x0+04
0+08 R_C6000_ABS16 +ext2
0+0a R_C6000_ABS16 +ext2\+0xf+fe
0+0c R_C6000_ABS8 +ext3
0+0d R_C6000_ABS8 +ext3\+0x0+01

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@ -0,0 +1,12 @@
.data
.globl a
.globl ext1
.globl ext2
.globl ext3
a:
.word ext1
.word ext1 + 4
.short ext2
.short ext2 - 2
.byte ext3
.byte ext3 + 1

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@ -0,0 +1,2 @@
#name: C6X junk after directives
#error-output: dir-junk.l

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@ -0,0 +1,5 @@
[^:]*: Assembler messages:
[^:]*:2: Error: junk at end of line, first unrecognized character is `c'
[^:]*:3: Error: junk at end of line, first unrecognized character is `f'
[^:]*:6: Error: junk at end of line, first unrecognized character is `b'
[^:]*:7: Error: junk at end of line, first unrecognized character is `x'

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@ -0,0 +1,7 @@
.arch c64x
.arch c64x c64x
.atomic foo
.atomic ; comment OK
.noatomic
.noatomic bar
.nocmp x

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@ -0,0 +1,5 @@
# Dummy input file for tests of command-line options.
.text
.globl f
f:
nop 2

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@ -0,0 +1,11 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X endian options 1
#as: -mbig-endian
#source: dummy.s
.*: *file format elf32-tic6x-be
Disassembly of section \.text:
0+00 <[^>]*> 00002000[ \t]+nop 2
[ \t]*\.\.\.

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@ -0,0 +1,11 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X endian options 2
#as: -mlittle-endian -mbig-endian
#source: dummy.s
.*: *file format elf32-tic6x-be
Disassembly of section \.text:
0+00 <[^>]*> 00002000[ \t]+nop 2
[ \t]*\.\.\.

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@ -0,0 +1,11 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X endian options 3
#as: -mbig-endian -mlittle-endian
#source: dummy.s
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
0+00 <[^>]*> 00002000[ \t]+nop 2
[ \t]*\.\.\.

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@ -0,0 +1,12 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X atomic instructions
#as: -march=c674x -matomic -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
[0-9a-f]+[048c] <[^>]*> c0800742[ \t]+\[a0\] cmtl \.D2T2 \*b0,b1
[0-9a-f]+[048c] <[^>]*> 51880642[ \t]+\[!b1\] ll \.D2T2 \*b2,b3
[0-9a-f]+[048c] <[^>]*> af7406c2[ \t]+\[a2\] sl \.D2T2 b30,\*b29
[ \t]*\.\.\.

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@ -0,0 +1,8 @@
# Test atomic instructions.
.text
.nocmp
.globl f
f:
[a0] cmtl .D2T2 *b0,b1
[!b1] ll .D2T2 *b2,b3
[a2] sl .D2T2 b30,*b29

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@ -0,0 +1,2 @@
#name: C6X bad instructions 1
#error-output: insns-bad-1.l

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,3 @@
#name: C6X bad instructions 2
#as: -march=c62x
#error-output: insns-bad-2.l

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@ -0,0 +1,15 @@
[^:]*: Assembler messages:
[^:]*:6: Error: register number 31 not supported on this architecture
[^:]*:7: Error: register number 31 not supported on this architecture
[^:]*:8: Error: register number 31 not supported on this architecture
[^:]*:9: Error: register number 31 not supported on this architecture
[^:]*:24: Error: register number 31 not supported on this architecture
[^:]*:25: Error: register number 31 not supported on this architecture
[^:]*:26: Error: register number 31 not supported on this architecture
[^:]*:27: Error: register number 31 not supported on this architecture
[^:]*:42: Error: register number 31 not supported on this architecture
[^:]*:43: Error: register number 31 not supported on this architecture
[^:]*:44: Error: register number 31 not supported on this architecture
[^:]*:45: Error: register number 31 not supported on this architecture
[^:]*:46: Error: register number 31 not supported on this architecture
[^:]*:47: Error: register number 30 not supported on this architecture

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@ -0,0 +1,47 @@
# Test bad registers depending on architecture
.text
.globl f
f:
abs .L1 a15,a15
abs .L1 a31,a15
abs .L1 a15,a31
abs .L2X a15,b31
abs .L2X a31,b15
.arch c64x
abs .L1 a15,a15
abs .L1 a31,a15
abs .L1 a15,a31
abs .L2X a15,b31
abs .L2X a31,b15
.arch c64x+
abs .L1 a15,a15
abs .L1 a31,a15
abs .L1 a15,a31
abs .L2X a15,b31
abs .L2X a31,b15
.arch c67x
abs .L1 a15,a15
abs .L1 a31,a15
abs .L1 a15,a31
abs .L2X a15,b31
abs .L2X a31,b15
.arch c67x+
abs .L1 a15,a15
abs .L1 a31,a15
abs .L1 a15,a31
abs .L2X a15,b31
abs .L2X a31,b15
.arch c674x
abs .L1 a15,a15
abs .L1 a31,a15
abs .L1 a15,a31
abs .L2X a15,b31
abs .L2X a31,b15
.arch c62x
abs .L1 a15,a15
abs .L1 a31,a15
abs .L1 a15,a31
abs .L2X a15,b31
abs .L2X a31,b15
ldb .D1T1 *a31,a0
ldb .D1T1 *+a1[a30],a0

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@ -0,0 +1,3 @@
#name: C674x bad instructions
#as: -march=c674x
#error-output: insns-c674x-bad.l

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@ -0,0 +1,7 @@
[^:]*: Assembler messages:
[^:]*:6: Error: 'cmtl' instruction not supported on this architecture
[^:]*:7: Error: 'll' instruction not supported on this architecture
[^:]*:8: Error: 'sl' instruction not supported on this architecture
[^:]*:14: Error: 'cmtl' instruction not supported on this architecture
[^:]*:15: Error: 'll' instruction not supported on this architecture
[^:]*:16: Error: 'sl' instruction not supported on this architecture

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@ -0,0 +1,16 @@
# Test instructions not present on C674x.
.text
.nocmp
.globl f
f:
cmtl .D2T2 *b0,b1
ll .D2T2 *b0,b1
sl .D2T2 b0,*b1
.atomic
cmtl .D2T2 *b0,b1
ll .D2T2 *b0,b1
sl .D2T2 b0,*b1
.noatomic
cmtl .D2T2 *b0,b1
ll .D2T2 *b0,b1
sl .D2T2 b0,*b1

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@ -0,0 +1,185 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: C674x instructions generating PC-relative relocations
#as: -march=c674x -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
[ \t]*\.\.\.
0+1c <[^>]*> 00806162[ \t]+addkpc \.S2 00000000 <f>,b1,3
0+20 <[^>]*> a1f9e162[ \t]+\[a2\] addkpc \.S2 00000004 <f\+0x4>,b3,7
0+24 <[^>]*> 02030162[ \t]+addkpc \.S2 0000002c <g>,b4,0
0+28 <[^>]*> 02808162[ \t]+addkpc \.S2 00000020 <f\+0x20>,b5,4
[ \t]*28: R_C6000_PCR_S7[ \t]+ext1\+0x8
[ \t]*\.\.\.
[ \t]*\.\.\.
0+48 <[^>]*> 00000012[ \t]+b \.S2 00000040 <f2>
[ \t]*48: R_C6000_PCR_S21[ \t]+ext3\+0x4
0+4c <[^>]*> 00000010[ \t]+b \.S1 00000040 <f2>
[ \t]*4c: R_C6000_PCR_S21[ \t]+ext2
0+50 <[^>]*> 00000012[ \t]+b \.S2 00000040 <f2>
[ \t]*50: R_C6000_PCR_S21[ \t]+nrp
0+54 <[^>]*> 00000012[ \t]+b \.S2 00000040 <f2>
[ \t]*54: R_C6000_PCR_S21[ \t]+irp
0+58 <[^>]*> 00000010[ \t]+b \.S1 00000040 <f2>
[ \t]*58: R_C6000_PCR_S21[ \t]+a1
0+5c <[^>]*> 00000012[ \t]+b \.S2 00000040 <f2>
0+60 <[^>]*> 6ffffc92[ \t]+\[b2\] b \.S2 00000044 <f2\+0x4>
0+64 <[^>]*> 00000192[ \t]+b \.S2 0000006c <g2>
0+68 <[^>]*> 00000012[ \t]+b \.S2 00000060 <f2\+0x20>
[ \t]*68: R_C6000_PCR_S21[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+88 <[^>]*> 00000012[ \t]+b \.S2 00000080 <f3>
[ \t]*88: R_C6000_PCR_S21[ \t]+ext3\+0x4
0+8c <[^>]*> 00000010[ \t]+b \.S1 00000080 <f3>
[ \t]*8c: R_C6000_PCR_S21[ \t]+ext2
0+90 <[^>]*> 00000012[ \t]+b \.S2 00000080 <f3>
[ \t]*90: R_C6000_PCR_S21[ \t]+nrp
0+94 <[^>]*> 00000012[ \t]+b \.S2 00000080 <f3>
[ \t]*94: R_C6000_PCR_S21[ \t]+irp
0+98 <[^>]*> 00000010[ \t]+b \.S1 00000080 <f3>
[ \t]*98: R_C6000_PCR_S21[ \t]+a1
0+9c <[^>]*> 00000012[ \t]+b \.S2 00000080 <f3>
0+a0 <[^>]*> 6ffffc92[ \t]+\[b2\] b \.S2 00000084 <f3\+0x4>
0+a4 <[^>]*> 00000192[ \t]+b \.S2 000000ac <g3>
0+a8 <[^>]*> 00000012[ \t]+b \.S2 000000a0 <f3\+0x20>
[ \t]*a8: R_C6000_PCR_S21[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+c8 <[^>]*> 01001022[ \t]+bdec \.S2 000000c0 <f4>,b2
[ \t]*c8: R_C6000_PCR_S10[ \t]+ext3\+0x4
0+cc <[^>]*> 01001020[ \t]+bdec \.S1 000000c0 <f4>,a2
[ \t]*cc: R_C6000_PCR_S10[ \t]+ext2
0+d0 <[^>]*> 01001022[ \t]+bdec \.S2 000000c0 <f4>,b2
[ \t]*d0: R_C6000_PCR_S10[ \t]+nrp
0+d4 <[^>]*> 01001022[ \t]+bdec \.S2 000000c0 <f4>,b2
[ \t]*d4: R_C6000_PCR_S10[ \t]+irp
0+d8 <[^>]*> 01001020[ \t]+bdec \.S1 000000c0 <f4>,a2
[ \t]*d8: R_C6000_PCR_S10[ \t]+a1
0+dc <[^>]*> 01001022[ \t]+bdec \.S2 000000c0 <f4>,b2
0+e0 <[^>]*> 917f3022[ \t]+\[!a1\] bdec \.S2 000000c4 <f4\+0x4>,b2
0+e4 <[^>]*> 01007022[ \t]+bdec \.S2 000000ec <g4>,b2
0+e8 <[^>]*> 01001022[ \t]+bdec \.S2 000000e0 <f4\+0x20>,b2
[ \t]*e8: R_C6000_PCR_S10[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+108 <[^>]*> 01000022[ \t]+bpos \.S2 00000100 <f5>,b2
[ \t]*108: R_C6000_PCR_S10[ \t]+ext3\+0x4
0+10c <[^>]*> 01000020[ \t]+bpos \.S1 00000100 <f5>,a2
[ \t]*10c: R_C6000_PCR_S10[ \t]+ext2
0+110 <[^>]*> 01000022[ \t]+bpos \.S2 00000100 <f5>,b2
[ \t]*110: R_C6000_PCR_S10[ \t]+nrp
0+114 <[^>]*> 01000022[ \t]+bpos \.S2 00000100 <f5>,b2
[ \t]*114: R_C6000_PCR_S10[ \t]+irp
0+118 <[^>]*> 01000020[ \t]+bpos \.S1 00000100 <f5>,a2
[ \t]*118: R_C6000_PCR_S10[ \t]+a1
0+11c <[^>]*> 01000022[ \t]+bpos \.S2 00000100 <f5>,b2
0+120 <[^>]*> 517f2022[ \t]+\[!b1\] bpos \.S2 00000104 <f5\+0x4>,b2
0+124 <[^>]*> 01006022[ \t]+bpos \.S2 0000012c <g5>,b2
0+128 <[^>]*> 01000022[ \t]+bpos \.S2 00000120 <f5\+0x20>,b2
[ \t]*128: R_C6000_PCR_S10[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+148 <[^>]*> 00000122[ \t]+bnop \.S2 00000140 <f6>,0
[ \t]*148: R_C6000_PCR_S12[ \t]+ext3\+0x4
0+14c <[^>]*> 00002120[ \t]+bnop \.S1 00000140 <f6>,1
[ \t]*14c: R_C6000_PCR_S12[ \t]+ext2
0+150 <[^>]*> 00004120[ \t]+bnop \.S1 00000140 <f6>,2
[ \t]*150: R_C6000_PCR_S12[ \t]+nrp
0+154 <[^>]*> 00006122[ \t]+bnop \.S2 00000140 <f6>,3
[ \t]*154: R_C6000_PCR_S12[ \t]+irp
0+158 <[^>]*> 00008120[ \t]+bnop \.S1 00000140 <f6>,4
[ \t]*158: R_C6000_PCR_S12[ \t]+a1
0+15c <[^>]*> 0000a122[ \t]+bnop \.S2 00000140 <f6>,5
0+160 <[^>]*> 5ff9c122[ \t]+\[!b1\] bnop \.S2 00000144 <f6\+0x4>,6
0+164 <[^>]*> 0003e120[ \t]+bnop \.S1 0000016c <g6>,7
0+168 <[^>]*> 00000122[ \t]+bnop \.S2 00000160 <f6\+0x20>,0
[ \t]*168: R_C6000_PCR_S12[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+188 <[^>]*> 00000122[ \t]+bnop \.S2 00000180 <f7>,0
[ \t]*188: R_C6000_PCR_S12[ \t]+ext3\+0x4
0+18c <[^>]*> 00002120[ \t]+bnop \.S1 00000180 <f7>,1
[ \t]*18c: R_C6000_PCR_S12[ \t]+ext2
0+190 <[^>]*> 00004120[ \t]+bnop \.S1 00000180 <f7>,2
[ \t]*190: R_C6000_PCR_S12[ \t]+nrp
0+194 <[^>]*> 00006122[ \t]+bnop \.S2 00000180 <f7>,3
[ \t]*194: R_C6000_PCR_S12[ \t]+irp
0+198 <[^>]*> 00008120[ \t]+bnop \.S1 00000180 <f7>,4
[ \t]*198: R_C6000_PCR_S12[ \t]+a1
0+19c <[^>]*> 0000a122[ \t]+bnop \.S2 00000180 <f7>,5
0+1a0 <[^>]*> cff9c122[ \t]+\[a0\] bnop \.S2 00000184 <f7\+0x4>,6
0+1a4 <[^>]*> 0003e120[ \t]+bnop \.S1 000001ac <g7>,7
0+1a8 <[^>]*> 00000122[ \t]+bnop \.S2 000001a0 <f7\+0x20>,0
[ \t]*1a8: R_C6000_PCR_S12[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+1c8 <[^>]*> 10000012[ \t]+callp \.S2 000001c0 <f8>,b3
[ \t]*1c8: R_C6000_PCR_S21[ \t]+ext3\+0x4
0+1cc <[^>]*> 10000010[ \t]+callp \.S1 000001c0 <f8>,a3
[ \t]*1cc: R_C6000_PCR_S21[ \t]+ext2
0+1d0 <[^>]*> 10000010[ \t]+callp \.S1 000001c0 <f8>,a3
[ \t]*1d0: R_C6000_PCR_S21[ \t]+nrp
0+1d4 <[^>]*> 10000012[ \t]+callp \.S2 000001c0 <f8>,b3
[ \t]*1d4: R_C6000_PCR_S21[ \t]+irp
0+1d8 <[^>]*> 10000010[ \t]+callp \.S1 000001c0 <f8>,a3
[ \t]*1d8: R_C6000_PCR_S21[ \t]+a1
0+1dc <[^>]*> 10000012[ \t]+callp \.S2 000001c0 <f8>,b3
0+1e0 <[^>]*> 1ffffc92[ \t]+callp \.S2 000001c4 <f8\+0x4>,b3
0+1e4 <[^>]*> 10000190[ \t]+callp \.S1 000001ec <g8>,a3
0+1e8 <[^>]*> 10000012[ \t]+callp \.S2 000001e0 <f8\+0x20>,b3
[ \t]*1e8: R_C6000_PCR_S21[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+208 <[^>]*> 00000012[ \t]+b \.S2 00000200 <f9>
[ \t]*208: R_C6000_PCR_S21[ \t]+ext3\+0x4
0+20c <[^>]*> 00000010[ \t]+b \.S1 00000200 <f9>
[ \t]*20c: R_C6000_PCR_S21[ \t]+ext2
0+210 <[^>]*> 00000012[ \t]+b \.S2 00000200 <f9>
[ \t]*210: R_C6000_PCR_S21[ \t]+nrp
0+214 <[^>]*> 00000012[ \t]+b \.S2 00000200 <f9>
[ \t]*214: R_C6000_PCR_S21[ \t]+irp
0+218 <[^>]*> 00000010[ \t]+b \.S1 00000200 <f9>
[ \t]*218: R_C6000_PCR_S21[ \t]+a1
0+21c <[^>]*> 00000012[ \t]+b \.S2 00000200 <f9>
0+220 <[^>]*> 6ffffc92[ \t]+\[b2\] b \.S2 00000204 <f9\+0x4>
0+224 <[^>]*> 00000192[ \t]+b \.S2 0000022c <g9>
0+228 <[^>]*> 00000012[ \t]+b \.S2 00000220 <f9\+0x20>
[ \t]*228: R_C6000_PCR_S21[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+248 <[^>]*> 00000012[ \t]+b \.S2 00000240 <f10>
[ \t]*248: R_C6000_PCR_S21[ \t]+ext3\+0x4
0+24c <[^>]*> 00000010[ \t]+b \.S1 00000240 <f10>
[ \t]*24c: R_C6000_PCR_S21[ \t]+ext2
0+250 <[^>]*> 00000012[ \t]+b \.S2 00000240 <f10>
[ \t]*250: R_C6000_PCR_S21[ \t]+nrp
0+254 <[^>]*> 00000012[ \t]+b \.S2 00000240 <f10>
[ \t]*254: R_C6000_PCR_S21[ \t]+irp
0+258 <[^>]*> 00000010[ \t]+b \.S1 00000240 <f10>
[ \t]*258: R_C6000_PCR_S21[ \t]+a1
0+25c <[^>]*> 00000012[ \t]+b \.S2 00000240 <f10>
0+260 <[^>]*> 6ffffc92[ \t]+\[b2\] b \.S2 00000244 <f10\+0x4>
0+264 <[^>]*> 00000192[ \t]+b \.S2 0000026c <g10>
0+268 <[^>]*> 00000012[ \t]+b \.S2 00000260 <f10\+0x20>
[ \t]*268: R_C6000_PCR_S21[ \t]+b1
[ \t]*\.\.\.
[ \t]*\.\.\.
0+288 <[^>]*> 10000012[ \t]+callp \.S2 00000280 <f11>,b3
[ \t]*288: R_C6000_PCR_S21[ \t]+ext3\+0x4
0+28c <[^>]*> 10000010[ \t]+callp \.S1 00000280 <f11>,a3
[ \t]*28c: R_C6000_PCR_S21[ \t]+ext2
0+290 <[^>]*> 10000010[ \t]+callp \.S1 00000280 <f11>,a3
[ \t]*290: R_C6000_PCR_S21[ \t]+nrp
0+294 <[^>]*> 10000012[ \t]+callp \.S2 00000280 <f11>,b3
[ \t]*294: R_C6000_PCR_S21[ \t]+irp
0+298 <[^>]*> 10000010[ \t]+callp \.S1 00000280 <f11>,a3
[ \t]*298: R_C6000_PCR_S21[ \t]+a1
0+29c <[^>]*> 10000012[ \t]+callp \.S2 00000280 <f11>,b3
0+2a0 <[^>]*> 1ffffc92[ \t]+callp \.S2 00000284 <f11\+0x4>,b3
0+2a4 <[^>]*> 10000190[ \t]+callp \.S1 000002ac <g11>,a3
0+2a8 <[^>]*> 10000012[ \t]+callp \.S2 000002a0 <f11\+0x20>,b3
[ \t]*2a8: R_C6000_PCR_S21[ \t]+b1
[ \t]*\.\.\.

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@ -0,0 +1,208 @@
# Test C674x instructions generating PC-relative relocations.
.text
.nocmp
.globl ext1
.globl ext2
.globl ext3
.globl a1
.globl b1
.globl irp
.globl nrp
f:
nop
nop
nop
nop
nop
nop
nop
addkpc .S2 f,b1,3
[a2] addkpc .S2 f+4,b3,7
addkpc .S2 g,b4,0
addkpc .S2 ext1+8,b5,4
g:
nop
nop
nop
nop
nop
f2:
nop
nop
b .S2 ext3+4
b .S1 ext2
b .S2 (nrp)
b .S2 (irp)
b .S1 (a1)
b .S2 f2
[b2] b .S2 f2+4
b .S2 g2
b .S2 (b1)
g2:
nop
nop
nop
nop
nop
f3:
nop
nop
call .S2 ext3+4
call .S1 ext2
call .S2 (nrp)
call .S2 (irp)
call .S1 (a1)
call .S2 f3
[b2] call .S2 f3+4
call .S2 g3
call .S2 (b1)
g3:
nop
nop
nop
nop
nop
f4:
nop
nop
bdec .S2 ext3+4,b2
bdec .S1 ext2,a2
bdec .S2 (nrp),b2
bdec .S2 (irp),b2
bdec .S1 (a1),a2
bdec .S2 f4,b2
[!a1] bdec .S2 f4+4,b2
bdec .S2 g4,b2
bdec .S2 (b1),b2
g4:
nop
nop
nop
nop
nop
f5:
nop
nop
bpos .S2 ext3+4,b2
bpos .S1 ext2,a2
bpos .S2 (nrp),b2
bpos .S2 (irp),b2
bpos .S1 (a1),a2
bpos .S2 f5,b2
[!b1] bpos .S2 f5+4,b2
bpos .S2 g5,b2
bpos .S2 (b1),b2
g5:
nop
nop
nop
nop
nop
f6:
nop
nop
bnop .S2 ext3+4,0
bnop .S1 ext2,1
bnop (nrp),2
bnop .S2 (irp),3
bnop .S1 (a1),4
bnop .S2 f6,5
[!b1] bnop .S2 f6+4,6
bnop g6,7
bnop .S2 (b1),0
g6:
nop
nop
nop
nop
nop
f7:
nop
nop
callnop .S2 ext3+4,0
callnop .S1 ext2,1
callnop (nrp),2
callnop .S2 (irp),3
callnop .S1 (a1),4
callnop .S2 f7,5
[a0] callnop .S2 f7+4,6
callnop g7,7
callnop .S2 (b1),0
g7:
nop
nop
nop
nop
nop
f8:
nop
nop
callp .S2 ext3+4,b3
callp .S1 ext2,a3
callp .S1 (nrp),a3
callp .S2 (irp),b3
callp .S1 (a1),a3
callp .S2 f8,b3
callp .S2 f8+4,b3
callp .S1 g8,a3
callp .S2 (b1),b3
g8:
nop
nop
nop
nop
nop
f9:
nop
nop
callret .S2 ext3+4
callret .S1 ext2
callret .S2 (nrp)
callret .S2 (irp)
callret .S1 (a1)
callret .S2 f9
[b2] callret .S2 f9+4
callret .S2 g9
callret .S2 (b1)
g9:
nop
nop
nop
nop
nop
f10:
nop
nop
ret .S2 ext3+4
ret .S1 ext2
ret .S2 (nrp)
ret .S2 (irp)
ret .S1 (a1)
ret .S2 f10
[b2] ret .S2 f10+4
ret .S2 g10
ret .S2 (b1)
g10:
nop
nop
nop
nop
nop
f11:
nop
nop
retp .S2 ext3+4,b3
retp .S1 ext2,a3
retp .S1 (nrp),a3
retp .S2 (irp),b3
retp .S1 (a1),a3
retp .S2 f11,b3
retp .S2 f11+4,b3
retp .S1 g11,a3
retp .S2 (b1),b3
g11:
nop
nop
nop
nop
nop

View File

@ -0,0 +1,176 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: C674x instructions generating relocations
#as: -march=c674x -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
0+00 <[^>]*> 1280003c[ \t]+addab \.D1X b14,0,a5
[ \t]*0: R_C6000_SBR_U15_B[ \t]+ext1
0+04 <[^>]*> 138000be[ \t]+addab \.D2 b15,0,b7
[ \t]*4: R_C6000_SBR_U15_B[ \t]+ext2\+0x7
0+08 <[^>]*> 1a00003c[ \t]+addab \.D1X b14,0,a20
[ \t]*8: R_C6000_SBR_U15_B[ \t]+a1
0+0c <[^>]*> 1f00003e[ \t]+addab \.D2 b14,0,b30
[ \t]*c: R_C6000_SBR_U15_B[ \t]+b1
0+10 <[^>]*> 1780043c[ \t]+addab \.D1X b14,4,a15
0+14 <[^>]*> 1800043e[ \t]+addab \.D2 b14,4,b16
0+18 <[^>]*> 1280005c[ \t]+addah \.D1X b14,0,a5
[ \t]*18: R_C6000_SBR_U15_H[ \t]+ext1
0+1c <[^>]*> 138000de[ \t]+addah \.D2 b15,0,b7
[ \t]*1c: R_C6000_SBR_U15_H[ \t]+ext2\+0x6
0+20 <[^>]*> 1a00005c[ \t]+addah \.D1X b14,0,a20
[ \t]*20: R_C6000_SBR_U15_H[ \t]+a1
0+24 <[^>]*> 1f00005e[ \t]+addah \.D2 b14,0,b30
[ \t]*24: R_C6000_SBR_U15_H[ \t]+b1
0+28 <[^>]*> 1780045c[ \t]+addah \.D1X b14,4,a15
0+2c <[^>]*> 1800045e[ \t]+addah \.D2 b14,4,b16
0+30 <[^>]*> 1280007c[ \t]+addaw \.D1X b14,0,a5
[ \t]*30: R_C6000_SBR_U15_W[ \t]+ext1
0+34 <[^>]*> 138000fe[ \t]+addaw \.D2 b15,0,b7
[ \t]*34: R_C6000_SBR_U15_W[ \t]+ext2\+0x8
0+38 <[^>]*> 1a00007c[ \t]+addaw \.D1X b14,0,a20
[ \t]*38: R_C6000_SBR_U15_W[ \t]+a1
0+3c <[^>]*> 1f00007e[ \t]+addaw \.D2 b14,0,b30
[ \t]*3c: R_C6000_SBR_U15_W[ \t]+b1
0+40 <[^>]*> 1780047c[ \t]+addaw \.D1X b14,4,a15
0+44 <[^>]*> 1800047e[ \t]+addaw \.D2 b14,4,b16
0+48 <[^>]*> 1280007c[ \t]+addaw \.D1X b14,0,a5
[ \t]*48: R_C6000_DSBT_INDEX[ \t]+__c6xabi_DSBT_BASE
0+4c <[^>]*> 138000fe[ \t]+addaw \.D2 b15,0,b7
[ \t]*4c: R_C6000_SBR_GOT_U15_W[ \t]+ext2\+0x8
0+50 <[^>]*> 00800050[ \t]+addk \.S1 0,a1
[ \t]*50: R_C6000_ABS_S16[ \t]+ext1\+0x3
0+54 <[^>]*> 01800052[ \t]+addk \.S2 0,b3
[ \t]*54: R_C6000_SBR_S16[ \t]+ext2\+0x5
0+58 <[^>]*> 02000250[ \t]+addk \.S1 4,a4
0+5c <[^>]*> 02fffe52[ \t]+addk \.S2 -4,b5
0+60 <[^>]*> 00800028[ \t]+mvk \.S1 0,a1
[ \t]*60: R_C6000_ABS_S16[ \t]+ext1\+0x3
0+64 <[^>]*> 0180002a[ \t]+mvk \.S2 0,b3
[ \t]*64: R_C6000_SBR_S16[ \t]+ext2\+0x5
0+68 <[^>]*> 02000228[ \t]+mvk \.S1 4,a4
0+6c <[^>]*> 02fffe2a[ \t]+mvk \.S2 -4,b5
0+70 <[^>]*> 00800068[ \t]+mvkh \.S1 0,a1
[ \t]*70: R_C6000_ABS_H16[ \t]+ext3\+0x1
0+74 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2
[ \t]*74: R_C6000_SBR_GOT_H16_W[ \t]+ext2\+0x2
0+78 <[^>]*> 01800068[ \t]+mvkh \.S1 0,a3
[ \t]*78: R_C6000_SBR_H16_B[ \t]+ext1\+0x3
0+7c <[^>]*> 0200006a[ \t]+mvkh \.S2 0,b4
[ \t]*7c: R_C6000_SBR_H16_H[ \t]+ext3\+0x4
0+80 <[^>]*> 02800068[ \t]+mvkh \.S1 0,a5
[ \t]*80: R_C6000_SBR_H16_W[ \t]+ext2\+0x5
0+84 <[^>]*> 0300016a[ \t]+mvkh \.S2 131072,b6
0+88 <[^>]*> 00800068[ \t]+mvkh \.S1 0,a1
[ \t]*88: R_C6000_ABS_L16[ \t]+ext3\+0x1
0+8c <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2
[ \t]*8c: R_C6000_SBR_GOT_L16_W[ \t]+ext2\+0x2
0+90 <[^>]*> 01800068[ \t]+mvkh \.S1 0,a3
[ \t]*90: R_C6000_SBR_L16_B[ \t]+ext1\+0x3
0+94 <[^>]*> 0200006a[ \t]+mvkh \.S2 0,b4
[ \t]*94: R_C6000_SBR_L16_H[ \t]+ext3\+0x4
0+98 <[^>]*> 02800068[ \t]+mvkh \.S1 0,a5
[ \t]*98: R_C6000_SBR_L16_W[ \t]+ext2\+0x5
0+9c <[^>]*> 030000ea[ \t]+mvkh \.S2 65536,b6
0+a0 <[^>]*> 00800028[ \t]+mvk \.S1 0,a1
[ \t]*a0: R_C6000_ABS_L16[ \t]+ext3\+0x1
0+a4 <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2
[ \t]*a4: R_C6000_SBR_GOT_L16_W[ \t]+ext2\+0x2
0+a8 <[^>]*> 01800028[ \t]+mvk \.S1 0,a3
[ \t]*a8: R_C6000_SBR_L16_B[ \t]+ext1\+0x3
0+ac <[^>]*> 0200002a[ \t]+mvk \.S2 0,b4
[ \t]*ac: R_C6000_SBR_L16_H[ \t]+ext3\+0x4
0+b0 <[^>]*> 02800028[ \t]+mvk \.S1 0,a5
[ \t]*b0: R_C6000_SBR_L16_W[ \t]+ext2\+0x5
0+b4 <[^>]*> 030000aa[ \t]+mvk \.S2 1,b6
0+b8 <[^>]*> 0080002e[ \t]+ldb \.D2T2 \*\+b14\(0\),b1
[ \t]*b8: R_C6000_SBR_U15_B[ \t]+ext1
0+bc <[^>]*> 008000ac[ \t]+ldb \.D2T1 \*\+b15\(0\),a1
[ \t]*bc: R_C6000_SBR_U15_B[ \t]+ext2\+0x7
0+c0 <[^>]*> 008000ae[ \t]+ldb \.D2T2 \*\+b15\(0\),b1
[ \t]*c0: R_C6000_SBR_U15_B[ \t]+b1
0+c4 <[^>]*> 0080002c[ \t]+ldb \.D2T1 \*\+b14\(0\),a1
[ \t]*c4: R_C6000_SBR_U15_B[ \t]+a1
0+c8 <[^>]*> 00b882a6[ \t]+ldb \.D2T2 \*\+b14\(4\),b1
0+cc <[^>]*> 0080042c[ \t]+ldb \.D2T1 \*\+b14\(4\),a1
0+d0 <[^>]*> 0080001e[ \t]+ldbu \.D2T2 \*\+b14\(0\),b1
[ \t]*d0: R_C6000_SBR_U15_B[ \t]+ext1
0+d4 <[^>]*> 0080009c[ \t]+ldbu \.D2T1 \*\+b15\(0\),a1
[ \t]*d4: R_C6000_SBR_U15_B[ \t]+ext2\+0x7
0+d8 <[^>]*> 0080009e[ \t]+ldbu \.D2T2 \*\+b15\(0\),b1
[ \t]*d8: R_C6000_SBR_U15_B[ \t]+b1
0+dc <[^>]*> 0080001c[ \t]+ldbu \.D2T1 \*\+b14\(0\),a1
[ \t]*dc: R_C6000_SBR_U15_B[ \t]+a1
0+e0 <[^>]*> 00b88296[ \t]+ldbu \.D2T2 \*\+b14\(4\),b1
0+e4 <[^>]*> 0080041c[ \t]+ldbu \.D2T1 \*\+b14\(4\),a1
0+e8 <[^>]*> 0080004e[ \t]+ldh \.D2T2 \*\+b14\(0\),b1
[ \t]*e8: R_C6000_SBR_U15_H[ \t]+ext1
0+ec <[^>]*> 008000cc[ \t]+ldh \.D2T1 \*\+b15\(0\),a1
[ \t]*ec: R_C6000_SBR_U15_H[ \t]+ext2\+0x6
0+f0 <[^>]*> 008000ce[ \t]+ldh \.D2T2 \*\+b15\(0\),b1
[ \t]*f0: R_C6000_SBR_U15_H[ \t]+b1
0+f4 <[^>]*> 0080004c[ \t]+ldh \.D2T1 \*\+b14\(0\),a1
[ \t]*f4: R_C6000_SBR_U15_H[ \t]+a1
0+f8 <[^>]*> 00b842c6[ \t]+ldh \.D2T2 \*\+b14\(4\),b1
0+fc <[^>]*> 0080024c[ \t]+ldh \.D2T1 \*\+b14\(4\),a1
0+100 <[^>]*> 0080000e[ \t]+ldhu \.D2T2 \*\+b14\(0\),b1
[ \t]*100: R_C6000_SBR_U15_H[ \t]+ext1
0+104 <[^>]*> 0080008c[ \t]+ldhu \.D2T1 \*\+b15\(0\),a1
[ \t]*104: R_C6000_SBR_U15_H[ \t]+ext2\+0x6
0+108 <[^>]*> 0080008e[ \t]+ldhu \.D2T2 \*\+b15\(0\),b1
[ \t]*108: R_C6000_SBR_U15_H[ \t]+b1
0+10c <[^>]*> 0080000c[ \t]+ldhu \.D2T1 \*\+b14\(0\),a1
[ \t]*10c: R_C6000_SBR_U15_H[ \t]+a1
0+110 <[^>]*> 00b84286[ \t]+ldhu \.D2T2 \*\+b14\(4\),b1
0+114 <[^>]*> 0080020c[ \t]+ldhu \.D2T1 \*\+b14\(4\),a1
0+118 <[^>]*> 0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
[ \t]*118: R_C6000_SBR_U15_W[ \t]+ext1
0+11c <[^>]*> 008000ec[ \t]+ldw \.D2T1 \*\+b15\(0\),a1
[ \t]*11c: R_C6000_SBR_U15_W[ \t]+ext2\+0x4
0+120 <[^>]*> 008000ee[ \t]+ldw \.D2T2 \*\+b15\(0\),b1
[ \t]*120: R_C6000_SBR_U15_W[ \t]+b1
0+124 <[^>]*> 0080006c[ \t]+ldw \.D2T1 \*\+b14\(0\),a1
[ \t]*124: R_C6000_SBR_U15_W[ \t]+a1
0+128 <[^>]*> 00b822e6[ \t]+ldw \.D2T2 \*\+b14\(4\),b1
0+12c <[^>]*> 0080016c[ \t]+ldw \.D2T1 \*\+b14\(4\),a1
0+130 <[^>]*> 0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
[ \t]*130: R_C6000_DSBT_INDEX[ \t]+__c6xabi_DSBT_BASE
0+134 <[^>]*> 0080006c[ \t]+ldw \.D2T1 \*\+b14\(0\),a1
[ \t]*134: R_C6000_SBR_GOT_U15_W[ \t]+ext2\+0x4
0+138 <[^>]*> 0080003e[ \t]+stb \.D2T2 b1,\*\+b14\(0\)
[ \t]*138: R_C6000_SBR_U15_B[ \t]+ext1
0+13c <[^>]*> 008000bc[ \t]+stb \.D2T1 a1,\*\+b15\(0\)
[ \t]*13c: R_C6000_SBR_U15_B[ \t]+ext2\+0x7
0+140 <[^>]*> 008000be[ \t]+stb \.D2T2 b1,\*\+b15\(0\)
[ \t]*140: R_C6000_SBR_U15_B[ \t]+b1
0+144 <[^>]*> 0080003c[ \t]+stb \.D2T1 a1,\*\+b14\(0\)
[ \t]*144: R_C6000_SBR_U15_B[ \t]+a1
0+148 <[^>]*> 00b882b6[ \t]+stb \.D2T2 b1,\*\+b14\(4\)
0+14c <[^>]*> 0080043c[ \t]+stb \.D2T1 a1,\*\+b14\(4\)
0+150 <[^>]*> 0080005e[ \t]+sth \.D2T2 b1,\*\+b14\(0\)
[ \t]*150: R_C6000_SBR_U15_H[ \t]+ext1
0+154 <[^>]*> 008000dc[ \t]+sth \.D2T1 a1,\*\+b15\(0\)
[ \t]*154: R_C6000_SBR_U15_H[ \t]+ext2\+0x6
0+158 <[^>]*> 008000de[ \t]+sth \.D2T2 b1,\*\+b15\(0\)
[ \t]*158: R_C6000_SBR_U15_H[ \t]+b1
0+15c <[^>]*> 0080005c[ \t]+sth \.D2T1 a1,\*\+b14\(0\)
[ \t]*15c: R_C6000_SBR_U15_H[ \t]+a1
0+160 <[^>]*> 00b842d6[ \t]+sth \.D2T2 b1,\*\+b14\(4\)
0+164 <[^>]*> 0080025c[ \t]+sth \.D2T1 a1,\*\+b14\(4\)
0+168 <[^>]*> 0080007e[ \t]+stw \.D2T2 b1,\*\+b14\(0\)
[ \t]*168: R_C6000_SBR_U15_W[ \t]+ext1
0+16c <[^>]*> 008000fc[ \t]+stw \.D2T1 a1,\*\+b15\(0\)
[ \t]*16c: R_C6000_SBR_U15_W[ \t]+ext2\+0x4
0+170 <[^>]*> 008000fe[ \t]+stw \.D2T2 b1,\*\+b15\(0\)
[ \t]*170: R_C6000_SBR_U15_W[ \t]+b1
0+174 <[^>]*> 0080007c[ \t]+stw \.D2T1 a1,\*\+b14\(0\)
[ \t]*174: R_C6000_SBR_U15_W[ \t]+a1
0+178 <[^>]*> 00b822f6[ \t]+stw \.D2T2 b1,\*\+b14\(4\)
0+17c <[^>]*> 0080017c[ \t]+stw \.D2T1 a1,\*\+b14\(4\)
0+180 <[^>]*> 0080007e[ \t]+stw \.D2T2 b1,\*\+b14\(0\)
[ \t]*180: R_C6000_DSBT_INDEX[ \t]+__c6xabi_DSBT_BASE
0+184 <[^>]*> 0080007c[ \t]+stw \.D2T1 a1,\*\+b14\(0\)
[ \t]*184: R_C6000_SBR_GOT_U15_W[ \t]+ext2\+0x4
[ \t]*\.\.\.

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# Test C674x instructions generating relocations.
.data
w1:
.word 1
w2:
.word 2
.text
.nocmp
.globl ext1
.globl ext2
.globl ext3
.globl a1
.globl b1
.globl f
f:
addab .D1X b14,ext1,a5
addab .D2 b15,(ext2+7),b7
addab .D1X b14,(a1),a20
addab .D2 b14,(b1),b30
addab .D1X b14,w2-w1,a15
addab .D2 b14,w4-w3,b16
addah .D1X b14,ext1,a5
addah .D2 b15,(ext2+6),b7
addah .D1X b14,(a1),a20
addah .D2 b14,(b1),b30
addah .D1X b14,w2-w1,a15
addah .D2 b14,w4-w3,b16
addaw .D1X b14,ext1,a5
addaw .D2 b15,(ext2+8),b7
addaw .D1X b14,(a1),a20
addaw .D2 b14,(b1),b30
addaw .D1X b14,w2-w1,a15
addaw .D2 b14,w4-w3,b16
addaw .D1X b14,$DSBT_INDEX(__c6xabi_DSBT_BASE),a5
addaw .D2 b15,$GOT(ext2)+8,b7
addk .S1 ext1+3,a1
addk .S2 $dpr_byte(ext2)+5,b3
addk .S1 w2-w1,a4
addk .S2 w3-w4,b5
mvk .S1 ext1+3,a1
mvk .S2 $dpr_byte(ext2)+5,b3
mvk .S1 w2-w1,a4
mvk .S2 w3-w4,b5
mvkh .S1 ext3+1,a1
mvkh .S2 $DPR_GOT(ext2)+2,b2
mvkh .S1 $DPR_BYTE(ext1)+3,a3
mvkh .S2 $DPR_HWORD(ext3)+4,b4
mvkh .S1 $DPR_WORD(ext2)+5,a5
mvkh .S2 s1-s0,b6
mvklh .S1 ext3+1,a1
mvklh .S2 $DPR_GOT(ext2)+2,b2
mvklh .S1 $DPR_BYTE(ext1)+3,a3
mvklh .S2 $DPR_HWORD(ext3)+4,b4
mvklh .S1 $DPR_WORD(ext2)+5,a5
mvklh .S2 s1-s0,b6
mvkl .S1 ext3+1,a1
mvkl .S2 $DPR_GOT(ext2)+2,b2
mvkl .S1 $DPR_BYTE(ext1)+3,a3
mvkl .S2 $DPR_HWORD(ext3)+4,b4
mvkl .S1 $DPR_WORD(ext2)+5,a5
mvkl .S2 s1-s0,b6
ldb .D2T2 *+b14(ext1),b1
ldb .D2T1 *+b15(ext2+7),a1
ldb .D2T2 *+b15(b1),b1
ldb .D2T1 *+b14(a1),a1
ldb .D2T2 *+b14(w2-w1),b1
ldb .D2T1 *+b14(w4-w3),a1
ldbu .D2T2 *+b14(ext1),b1
ldbu .D2T1 *+b15(ext2+7),a1
ldbu .D2T2 *+b15(b1),b1
ldbu .D2T1 *+b14(a1),a1
ldbu .D2T2 *+b14(w2-w1),b1
ldbu .D2T1 *+b14(w4-w3),a1
ldh .D2T2 *+b14(ext1),b1
ldh .D2T1 *+b15(ext2+6),a1
ldh .D2T2 *+b15(b1),b1
ldh .D2T1 *+b14(a1),a1
ldh .D2T2 *+b14(w2-w1),b1
ldh .D2T1 *+b14(w4-w3),a1
ldhu .D2T2 *+b14(ext1),b1
ldhu .D2T1 *+b15(ext2+6),a1
ldhu .D2T2 *+b15(b1),b1
ldhu .D2T1 *+b14(a1),a1
ldhu .D2T2 *+b14(w2-w1),b1
ldhu .D2T1 *+b14(w4-w3),a1
ldw .D2T2 *+b14(ext1),b1
ldw .D2T1 *+b15(ext2+4),a1
ldw .D2T2 *+b15(b1),b1
ldw .D2T1 *+b14(a1),a1
ldw .D2T2 *+b14(w2-w1),b1
ldw .D2T1 *+b14(w4-w3),a1
ldw .D2T2 *+b14($DSBT_INDEX(__c6xabi_DSBT_BASE)),b1
ldw .D2T1 *+b14($GOT(ext2)+4),a1
stb .D2T2 b1,*+b14(ext1)
stb .D2T1 a1,*+b15(ext2+7)
stb .D2T2 b1,*+b15(b1)
stb .D2T1 a1,*+b14(a1)
stb .D2T2 b1,*+b14(w2-w1)
stb .D2T1 a1,*+b14(w4-w3)
sth .D2T2 b1,*+b14(ext1)
sth .D2T1 a1,*+b15(ext2+6)
sth .D2T2 b1,*+b15(b1)
sth .D2T1 a1,*+b14(a1)
sth .D2T2 b1,*+b14(w2-w1)
sth .D2T1 a1,*+b14(w4-w3)
stw .D2T2 b1,*+b14(ext1)
stw .D2T1 a1,*+b15(ext2+4)
stw .D2T2 b1,*+b15(b1)
stw .D2T1 a1,*+b14(a1)
stw .D2T2 b1,*+b14(w2-w1)
stw .D2T1 a1,*+b14(w4-w3)
stw .D2T2 b1,*+b14($DSBT_INDEX(__c6xabi_DSBT_BASE))
stw .D2T1 a1,*+b14($GOT(ext2)+4)
.data
w3:
.word 3
w4:
.word 4
s0:
.space 131073
s1:
.word 5

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#objdump: -dr --prefix-addresses --show-raw-insn
#name: C674x SPLOOP instructions
#as: -march=c674x -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
[0-9a-f]+[048c] <[^>]*> 00030000[ \t]+spmask
[0-9a-f]+[048c] <[^>]*> 00070000[ \t]+spmask L1
[0-9a-f]+[048c] <[^>]*> 000b0000[ \t]+spmask L2
[0-9a-f]+[048c] <[^>]*> 00130000[ \t]+spmask S1
[0-9a-f]+[048c] <[^>]*> 00230000[ \t]+spmask S2
[0-9a-f]+[048c] <[^>]*> 00430000[ \t]+spmask D1
[0-9a-f]+[048c] <[^>]*> 00830000[ \t]+spmask D2
[0-9a-f]+[048c] <[^>]*> 01030000[ \t]+spmask M1
[0-9a-f]+[048c] <[^>]*> 02030000[ \t]+spmask M2
[0-9a-f]+[048c] <[^>]*> 00470000[ \t]+spmask L1,D1
[0-9a-f]+[048c] <[^>]*> 00470000[ \t]+spmask L1,D1
[0-9a-f]+[048c] <[^>]*> 03ff0000[ \t]+spmask L1,L2,S1,S2,D1,D2,M1,M2
[0-9a-f]+[048c] <[^>]*> 01170001[ \t]+spmask L1,S1,M1
[0-9a-f]+[048c] <[^>]*> 00800fd9[ \t]+\|\| or \.L1 0,a0,a1
[0-9a-f]+[048c] <[^>]*> 008008f3[ \t]+\|\| or \.D2 0,b0,b1
[0-9a-f]+[048c] <[^>]*> 018806a0[ \t]+\|\| or \.S1 0,a2,a3
[0-9a-f]+[048c] <[^>]*> 00032000[ \t]+spmaskr
[0-9a-f]+[048c] <[^>]*> 00072000[ \t]+spmaskr L1
[0-9a-f]+[048c] <[^>]*> 000b2000[ \t]+spmaskr L2
[0-9a-f]+[048c] <[^>]*> 00132000[ \t]+spmaskr S1
[0-9a-f]+[048c] <[^>]*> 00232000[ \t]+spmaskr S2
[0-9a-f]+[048c] <[^>]*> 00432000[ \t]+spmaskr D1
[0-9a-f]+[048c] <[^>]*> 00832000[ \t]+spmaskr D2
[0-9a-f]+[048c] <[^>]*> 01032000[ \t]+spmaskr M1
[0-9a-f]+[048c] <[^>]*> 02032000[ \t]+spmaskr M2
[0-9a-f]+[048c] <[^>]*> 00472000[ \t]+spmaskr L1,D1
[0-9a-f]+[048c] <[^>]*> 00472000[ \t]+spmaskr L1,D1
[0-9a-f]+[048c] <[^>]*> 03ff2000[ \t]+spmaskr L1,L2,S1,S2,D1,D2,M1,M2
[0-9a-f]+[048c] <[^>]*> 01172001[ \t]+spmaskr L1,S1,M1
[0-9a-f]+[048c] <[^>]*> 00800fd9[ \t]+\|\| or \.L1 0,a0,a1
[0-9a-f]+[048c] <[^>]*> 008008f3[ \t]+\|\| or \.D2 0,b0,b1
[0-9a-f]+[048c] <[^>]*> 018806a0[ \t]+\|\| or \.S1 0,a2,a3
[0-9a-f]+[048c] <[^>]*> c0038000[ \t]+\[a0\] sploop 1
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 00036000[ \t]+spkernelr
[0-9a-f]+[048c] <[^>]*> 2003a000[ \t]+\[b0\] sploopd 1
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 00034000[ \t]+spkernel 0,0
[0-9a-f]+[048c] <[^>]*> d003e000[ \t]+\[!a0\] sploopw 1
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 00034000[ \t]+spkernel 0,0
[0-9a-f]+[048c] <[^>]*> 00038000[ \t]+sploop 1
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 00034000[ \t]+spkernel 0,0
[0-9a-f]+[048c] <[^>]*> 00038000[ \t]+sploop 1
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0fc34000[ \t]+spkernel 63,0
[0-9a-f]+[048c] <[^>]*> 00838000[ \t]+sploop 2
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0f834000[ \t]+spkernel 31,0
[0-9a-f]+[048c] <[^>]*> 00838000[ \t]+sploop 2
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0fc34000[ \t]+spkernel 31,1
[0-9a-f]+[048c] <[^>]*> 01038000[ \t]+sploop 3
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0f834000[ \t]+spkernel 15,2
[0-9a-f]+[048c] <[^>]*> 01838000[ \t]+sploop 4
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0fc34000[ \t]+spkernel 15,3
[0-9a-f]+[048c] <[^>]*> 02038000[ \t]+sploop 5
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0f034000[ \t]+spkernel 7,4
[0-9a-f]+[048c] <[^>]*> 03838000[ \t]+sploop 8
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0fc34000[ \t]+spkernel 7,7
[0-9a-f]+[048c] <[^>]*> 04038000[ \t]+sploop 9
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0e034000[ \t]+spkernel 3,8
[0-9a-f]+[048c] <[^>]*> 06838000[ \t]+sploop 14
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
[0-9a-f]+[048c] <[^>]*> 0f434000[ \t]+spkernel 3,13
[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1

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# Test C674x SPLOOP instructions. The present tests are placeholders
# to verify encoding that may not be valid when the full set of checks
# for invalid input are implemented and may need changing to valid
# code at that point.
.text
.nocmp
.globl f
f:
spmask
spmask l1
spmask L2
spmask s1
spmask S2
spmask D1
spmask d2
spmask M1
spmask m2
spmask D1,L1
spmask L1,D1
spmask L1,S1,D1,M1,M2,D2,S2,L2
spmask M1
||^ mv .L1 a0,a1
|| mv .D2 b0,b1
||^ mv .S1 a2,a3
spmaskr
spmaskr l1
spmaskr L2
spmaskr s1
spmaskr S2
spmaskr D1
spmaskr d2
spmaskr M1
spmaskr m2
spmaskr D1,L1
spmaskr L1,D1
spmaskr L1,S1,D1,M1,M2,D2,S2,L2
spmaskr M1
||^ mv .L1 a0,a1
|| mv .D2 b0,b1
||^ mv .S1 a2,a3
[a0] sploop 1
nop
spkernelr
[b0] sploopd 1
nop
spkernel
[!a0] sploopw 1
nop
spkernel
sploop 1
nop
spkernel 0,0
sploop 1
nop
spkernel 63,0
sploop 2
nop
spkernel 31,0
sploop 2
nop
spkernel 31,1
sploop 3
nop
spkernel 15,2
sploop 4
nop
spkernel 15,3
sploop 5
nop
spkernel 7,4
sploop 8
nop
spkernel 7,7
sploop 9
nop
spkernel 3,8
sploop 14
nop
spkernel 3,13

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X parallel instructions, big-endian
#as: -march=c674x -mbig-endian
#source: insns-parallel.s
.*: *file format elf32-tic6x-be
Disassembly of section \.text:
0+00 <[^>]*> 00008001[ \t]+nop 5
0+04 <[^>]*> 00000000[ \t]+\|\| nop 1
0+08 <[^>]*> 00006001[ \t]+nop 4
0+0c <[^>]*> 00006001[ \t]+\|\| nop 4
0+10 <[^>]*> 00006000[ \t]+\|\| nop 4
[ \t]*\.\.\.

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#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X parallel instructions, little-endian
#as: -march=c674x -mlittle-endian
#source: insns-parallel.s
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
0+00 <[^>]*> 00008001[ \t]+nop 5
0+04 <[^>]*> 00000000[ \t]+\|\| nop 1
0+08 <[^>]*> 00006001[ \t]+nop 4
0+0c <[^>]*> 00006001[ \t]+\|\| nop 4
0+10 <[^>]*> 00006000[ \t]+\|\| nop 4
[ \t]*\.\.\.

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#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X parallel instructions, multiple sections
#as: -march=c674x -mlittle-endian
#source: insns-parallel-multi.s
.*: *file format elf32-tic6x-le
Disassembly of section \.text\.f1:
0+00 <[^>]*> 00008001[ \t]+nop 5
0+04 <[^>]*> 00000001[ \t]+\|\| nop 1
0+08 <[^>]*> 00000001[ \t]+\|\| nop 1
0+0c <[^>]*> 00000001[ \t]+\|\| nop 1
0+10 <[^>]*> 00000001[ \t]+\|\| nop 1
0+14 <[^>]*> 00000001[ \t]+\|\| nop 1
0+18 <[^>]*> 00000001[ \t]+\|\| nop 1
0+1c <[^>]*> 00000000[ \t]+\|\| nop 1
Disassembly of section \.text\.f2:
0+00 <[^>]*> 00006001[ \t]+nop 4
0+04 <[^>]*> 00000001[ \t]+\|\| nop 1
0+08 <[^>]*> 00000001[ \t]+\|\| nop 1
0+0c <[^>]*> 00000001[ \t]+\|\| nop 1
0+10 <[^>]*> 00000001[ \t]+\|\| nop 1
0+14 <[^>]*> 00000001[ \t]+\|\| nop 1
0+18 <[^>]*> 00000001[ \t]+\|\| nop 1
0+1c <[^>]*> 00000000[ \t]+\|\| nop 1

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# Test parallel instructions and section switching.
.nocmp
.section .text.f1,"ax",%progbits
.globl f1
f1:
nop 5
.section .text.f2,"ax",%progbits
.globl f2
f2:
nop 4
.section .text.f1,"ax",%progbits
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop
.section .text.f2,"ax",%progbits
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop
.section .text.f1,"ax",%progbits
|| nop
.section .text.f2,"ax",%progbits
|| nop

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# Test parallel instructions.
.text
.nocmp
.globl f
f:
nop 5
|| nop
nop 4
|| nop 4
|| nop 4

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#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X predicates
#as: -march=c674x -mlittle-endian
#source: insns-predicate.s
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
0+00 <[^>]*> c1880359[ \t]+\[a0\] abs \.L1 a2,a3
0+04 <[^>]*> c290035a[ \t]+\|\| \[a0\] abs \.L2 b4,b5
0+08 <[^>]*> d3980358[ \t]+\[!a0\] abs \.L1 a6,a7
0+0c <[^>]*> d4a0035a[ \t]+\[!a0\] abs \.L2 b8,b9
0+10 <[^>]*> 25a80358[ \t]+\[b0\] abs \.L1 a10,a11
0+14 <[^>]*> 26b0035a[ \t]+\[b0\] abs \.L2 b12,b13
0+18 <[^>]*> 37b80358[ \t]+\[!b0\] abs \.L1 a14,a15
0+1c <[^>]*> 38c0035a[ \t]+\[!b0\] abs \.L2 b16,b17
0+20 <[^>]*> 89c80358[ \t]+\[a1\] abs \.L1 a18,a19
0+24 <[^>]*> 9ad0035a[ \t]+\[!a1\] abs \.L2 b20,b21
0+28 <[^>]*> abd80358[ \t]+\[a2\] abs \.L1 a22,a23
0+2c <[^>]*> bce0035a[ \t]+\[!a2\] abs \.L2 b24,b25
0+30 <[^>]*> 4de80358[ \t]+\[b1\] abs \.L1 a26,a27
0+34 <[^>]*> 5ef0035a[ \t]+\[!b1\] abs \.L2 b28,b29
0+38 <[^>]*> 6ff80358[ \t]+\[b2\] abs \.L1 a30,a31
0+3c <[^>]*> 738c035a[ \t]+\[!b2\] abs \.L2 b3,b7

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# Test predicates.
.text
.nocmp
.globl f
f:
[a0] abs .L1 a2,a3
|| [A0] abs .L2 b4,b5
[!a0] abs .L1 a6,a7
[!A0] abs .L2 b8,b9
[b0] abs .L1 a10,a11
[B0] abs .L2 b12,b13
[!b0] abs .L1 a14,a15
[!B0] abs .L2 b16,b17
[a1] abs .L1 a18,a19
[!A1] abs .L2 b20,b21
[A2] abs .L1 a22,a23
[!a2] abs .L2 b24,b25
[b1] abs .L1 a26,a27
[!B1] abs .L2 b28,b29
[B2] abs .L1 a30,a31
[!b2] abs .L2 b3,b7

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#name: C6X bad parallel syntax
#error-output: parallel-bad-1.l

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[^:]*: Assembler messages:
[^:]*:6: Error: '||' not followed by instruction
[^:]*:8: Error: '||' not followed by instruction
[^:]*:10: Error: multiple '||' on same line
[^:]*:12: Error: '||' not followed by instruction
[^:]*:14: Error: '||' not followed by instruction
[^:]*:16: Error: multiple '||' on same line
[^:]*:16: Error: '||^' without previous SPMASK
[^:]*:18: Error: multiple '||' on same line
[^:]*:18: Error: '||^' without previous SPMASK
[^:]*:20: Error: multiple '||' on same line
[^:]*:20: Error: '||^' without previous SPMASK
[^:]*:22: Error: label after '||'
[^:]*:24: Error: label after '||'
[^:]*:26: Error: '||' after predicate
[^:]*:26: Error: instruction 'nop' cannot be predicated
[^:]*:28: Error: '||' after predicate
[^:]*:28: Error: instruction 'nop' cannot be predicated
[^:]*:32: Error: '||' not followed by instruction

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# Test bad syntax for parallel operations.
.text
.globl f
f:
nop
|| ; no instruction
nop
|| .word 0
nop
|| || nop
nop
||^ ; no instruction
nop
||^ .word 0
nop
||^ || nop
nop
|| ||^ nop
nop
||^ ||^ nop
nop
|| label:
nop
||^ label2:
nop
[A1] || nop
nop
[B1] ||^ nop
nop
# End with this one, to be sure errors detected at new-line are
# detected at end-of-file.
|| .word 0

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#name: C6X bad parallel positioning
#error-output: parallel-bad-2.l

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@ -0,0 +1,4 @@
[^:]*: Assembler messages:
[^:]*:5: Error: parallel instruction not following another instruction
[^:]*:8: Error: parallel instruction not following another instruction
[^:]*:11: Error: label not at start of execute packet

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# Test bad positions for parallel operations.
.text
.globl f
f:
|| nop
nop
.word 0
|| nop
nop
label:
|| nop

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@ -0,0 +1,2 @@
#name: C6X too many parallel instructions
#error-output: parallel-bad-3.l

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@ -0,0 +1,2 @@
[^:]*: Assembler messages:
[^:]*:13: Error: too many instructions in execute packet

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# Test too many instructions in execute packet.
.text
.globl f
f:
nop
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop

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#name: C6X too many parallel instructions, multiple sections
#error-output: parallel-bad-4.l

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@ -0,0 +1,3 @@
[^:]*: Assembler messages:
[^:]*:28: Error: too many instructions in execute packet
[^:]*:30: Error: too many instructions in execute packet

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# Test too many instructions in execute packet, with section switching.
.nocmp
.section .text.f1,"ax",%progbits
.globl f1
f1:
nop 5
.section .text.f2,"ax",%progbits
.globl f2
f2:
nop 4
.section .text.f1,"ax",%progbits
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop
.section .text.f2,"ax",%progbits
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop
|| nop
.section .text.f1,"ax",%progbits
|| nop
.section .text.f2,"ax",%progbits
|| nop

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#name: C6X bad predicate syntax
#error-output: predicate-bad-1.l

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@ -0,0 +1,20 @@
[^:]*: Assembler messages:
[^:]*:5: Error: junk at end of line, first unrecognized character is `\['
[^:]*:6: Error: predicate not followed by instruction
[^:]*:7: Error: bad predicate '\[unknown\]'
[^:]*:8: Error: bad predicate '\[a3\]'
[^:]*:9: Error: bad predicate '\[b500\]'
[^:]*:10: Error: bad predicate '\[\]'
[^:]*:11: Error: bad predicate '\[!\]'
[^:]*:12: Error: bad predicate '\[!a\]'
[^:]*:13: Error: bad predicate '\[!A\]'
[^:]*:14: Error: bad predicate '\[!b\]'
[^:]*:15: Error: bad predicate '\[!B\]'
[^:]*:16: Error: bad predicate '\[!x\]'
[^:]*:17: Error: bad predicate '\[a\]'
[^:]*:18: Error: bad predicate '\[B\]'
[^:]*:19: Error: multiple predicates on same line
[^:]*:19: Error: instruction 'nop' cannot be predicated
[^:]*:20: Error: predicate not followed by instruction
[^:]*:21: Error: label after predicate
[^:]*:22: Error: predicate not followed by instruction

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@ -0,0 +1,22 @@
# Test bad syntax for predicates.
.text
.globl f
f:
[not a predicate
[A1] ; no instruction
[unknown] nop
[a3] nop
[b500] nop
[] nop
[!] nop
[!a] nop
[!A] nop
[!b] nop
[!B] nop
[!x] nop
[a] nop
[B] nop
[a1] [!B1] nop
[A2] .word 0
[!B2] label:
[!A1] .word 1

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#name: C6X bad predicates for architecture
#as: -march=c62x
#error-output: predicate-bad-2.l

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@ -0,0 +1,93 @@
[^:]*: Assembler messages:
[^:]*:5: Error: predication on A0 not supported on this architecture
[^:]*:5: Error: instruction 'nop' cannot be predicated
[^:]*:6: Error: instruction 'nop' cannot be predicated
[^:]*:7: Error: instruction 'nop' cannot be predicated
[^:]*:8: Error: instruction 'nop' cannot be predicated
[^:]*:9: Error: instruction 'nop' cannot be predicated
[^:]*:10: Error: instruction 'nop' cannot be predicated
[^:]*:11: Error: predication on A0 not supported on this architecture
[^:]*:11: Error: instruction 'nop' cannot be predicated
[^:]*:12: Error: instruction 'nop' cannot be predicated
[^:]*:13: Error: instruction 'nop' cannot be predicated
[^:]*:14: Error: instruction 'nop' cannot be predicated
[^:]*:15: Error: instruction 'nop' cannot be predicated
[^:]*:16: Error: instruction 'nop' cannot be predicated
[^:]*:18: Error: instruction 'nop' cannot be predicated
[^:]*:19: Error: instruction 'nop' cannot be predicated
[^:]*:20: Error: instruction 'nop' cannot be predicated
[^:]*:21: Error: instruction 'nop' cannot be predicated
[^:]*:22: Error: instruction 'nop' cannot be predicated
[^:]*:23: Error: instruction 'nop' cannot be predicated
[^:]*:24: Error: instruction 'nop' cannot be predicated
[^:]*:25: Error: instruction 'nop' cannot be predicated
[^:]*:26: Error: instruction 'nop' cannot be predicated
[^:]*:27: Error: instruction 'nop' cannot be predicated
[^:]*:28: Error: instruction 'nop' cannot be predicated
[^:]*:29: Error: instruction 'nop' cannot be predicated
[^:]*:31: Error: instruction 'nop' cannot be predicated
[^:]*:32: Error: instruction 'nop' cannot be predicated
[^:]*:33: Error: instruction 'nop' cannot be predicated
[^:]*:34: Error: instruction 'nop' cannot be predicated
[^:]*:35: Error: instruction 'nop' cannot be predicated
[^:]*:36: Error: instruction 'nop' cannot be predicated
[^:]*:37: Error: instruction 'nop' cannot be predicated
[^:]*:38: Error: instruction 'nop' cannot be predicated
[^:]*:39: Error: instruction 'nop' cannot be predicated
[^:]*:40: Error: instruction 'nop' cannot be predicated
[^:]*:41: Error: instruction 'nop' cannot be predicated
[^:]*:42: Error: instruction 'nop' cannot be predicated
[^:]*:44: Error: predication on A0 not supported on this architecture
[^:]*:44: Error: instruction 'nop' cannot be predicated
[^:]*:45: Error: instruction 'nop' cannot be predicated
[^:]*:46: Error: instruction 'nop' cannot be predicated
[^:]*:47: Error: instruction 'nop' cannot be predicated
[^:]*:48: Error: instruction 'nop' cannot be predicated
[^:]*:49: Error: instruction 'nop' cannot be predicated
[^:]*:50: Error: predication on A0 not supported on this architecture
[^:]*:50: Error: instruction 'nop' cannot be predicated
[^:]*:51: Error: instruction 'nop' cannot be predicated
[^:]*:52: Error: instruction 'nop' cannot be predicated
[^:]*:53: Error: instruction 'nop' cannot be predicated
[^:]*:54: Error: instruction 'nop' cannot be predicated
[^:]*:55: Error: instruction 'nop' cannot be predicated
[^:]*:57: Error: predication on A0 not supported on this architecture
[^:]*:57: Error: instruction 'nop' cannot be predicated
[^:]*:58: Error: instruction 'nop' cannot be predicated
[^:]*:59: Error: instruction 'nop' cannot be predicated
[^:]*:60: Error: instruction 'nop' cannot be predicated
[^:]*:61: Error: instruction 'nop' cannot be predicated
[^:]*:62: Error: instruction 'nop' cannot be predicated
[^:]*:63: Error: predication on A0 not supported on this architecture
[^:]*:63: Error: instruction 'nop' cannot be predicated
[^:]*:64: Error: instruction 'nop' cannot be predicated
[^:]*:65: Error: instruction 'nop' cannot be predicated
[^:]*:66: Error: instruction 'nop' cannot be predicated
[^:]*:67: Error: instruction 'nop' cannot be predicated
[^:]*:68: Error: instruction 'nop' cannot be predicated
[^:]*:70: Error: instruction 'nop' cannot be predicated
[^:]*:71: Error: instruction 'nop' cannot be predicated
[^:]*:72: Error: instruction 'nop' cannot be predicated
[^:]*:73: Error: instruction 'nop' cannot be predicated
[^:]*:74: Error: instruction 'nop' cannot be predicated
[^:]*:75: Error: instruction 'nop' cannot be predicated
[^:]*:76: Error: instruction 'nop' cannot be predicated
[^:]*:77: Error: instruction 'nop' cannot be predicated
[^:]*:78: Error: instruction 'nop' cannot be predicated
[^:]*:79: Error: instruction 'nop' cannot be predicated
[^:]*:80: Error: instruction 'nop' cannot be predicated
[^:]*:81: Error: instruction 'nop' cannot be predicated
[^:]*:83: Error: predication on A0 not supported on this architecture
[^:]*:83: Error: instruction 'nop' cannot be predicated
[^:]*:84: Error: instruction 'nop' cannot be predicated
[^:]*:85: Error: instruction 'nop' cannot be predicated
[^:]*:86: Error: instruction 'nop' cannot be predicated
[^:]*:87: Error: instruction 'nop' cannot be predicated
[^:]*:88: Error: instruction 'nop' cannot be predicated
[^:]*:89: Error: predication on A0 not supported on this architecture
[^:]*:89: Error: instruction 'nop' cannot be predicated
[^:]*:90: Error: instruction 'nop' cannot be predicated
[^:]*:91: Error: instruction 'nop' cannot be predicated
[^:]*:92: Error: instruction 'nop' cannot be predicated
[^:]*:93: Error: instruction 'nop' cannot be predicated
[^:]*:94: Error: instruction 'nop' cannot be predicated

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@ -0,0 +1,94 @@
# Test predicates allowed or disallowed depending on the architecture.
.text
.globl f
f:
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
[!B0] nop
[!B1] nop
[!B2] nop
.arch c64x
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
[!B0] nop
[!B1] nop
[!B2] nop
.arch c64x+
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
[!B0] nop
[!B1] nop
[!B2] nop
.arch c67x
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
[!B0] nop
[!B1] nop
[!B2] nop
.arch c67x+
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
[!B0] nop
[!B1] nop
[!B2] nop
.arch c674x
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
[!B0] nop
[!B1] nop
[!B2] nop
.arch c62x
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
[!B0] nop
[!B1] nop
[!B2] nop

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#name: C6X bad predicates for instructions
#as: -march=c674x
#error-output: predicate-bad-3.l

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@ -0,0 +1,36 @@
[^:]*: Assembler messages:
[^:]*:5: Error: instruction 'nop' cannot be predicated
[^:]*:6: Error: instruction 'nop' cannot be predicated
[^:]*:7: Error: instruction 'addab' cannot be predicated
[^:]*:8: Error: instruction 'addah' cannot be predicated
[^:]*:9: Error: instruction 'addaw' cannot be predicated
[^:]*:10: Error: instruction 'callp' cannot be predicated
[^:]*:11: Error: instruction 'addsub' cannot be predicated
[^:]*:12: Error: instruction 'addsub2' cannot be predicated
[^:]*:13: Error: instruction 'cmpy' cannot be predicated
[^:]*:14: Error: instruction 'cmpyr' cannot be predicated
[^:]*:15: Error: instruction 'cmpyr1' cannot be predicated
[^:]*:16: Error: instruction 'ddotp4' cannot be predicated
[^:]*:17: Error: instruction 'ddotph2' cannot be predicated
[^:]*:18: Error: instruction 'ddotph2r' cannot be predicated
[^:]*:19: Error: instruction 'ddotpl2' cannot be predicated
[^:]*:20: Error: instruction 'ddotpl2r' cannot be predicated
[^:]*:21: Error: instruction 'dint' cannot be predicated
[^:]*:22: Error: instruction 'dpack2' cannot be predicated
[^:]*:23: Error: instruction 'dpackx2' cannot be predicated
[^:]*:24: Error: instruction 'gmpy' cannot be predicated
[^:]*:25: Error: instruction 'idle' cannot be predicated
[^:]*:26: Error: instruction 'mpy2ir' cannot be predicated
[^:]*:27: Error: instruction 'rint' cannot be predicated
[^:]*:28: Error: instruction 'rpack2' cannot be predicated
[^:]*:29: Error: instruction 'saddsub' cannot be predicated
[^:]*:30: Error: instruction 'saddsub2' cannot be predicated
[^:]*:31: Error: instruction 'shfl3' cannot be predicated
[^:]*:32: Error: instruction 'smpy32' cannot be predicated
[^:]*:33: Error: instruction 'swe' cannot be predicated
[^:]*:34: Error: instruction 'swenr' cannot be predicated
[^:]*:35: Error: instruction 'xormpy' cannot be predicated
[^:]*:36: Error: instruction 'spmask' cannot be predicated
[^:]*:37: Error: instruction 'spmaskr' cannot be predicated
[^:]*:39: Error: instruction 'spkernel' cannot be predicated
[^:]*:40: Error: instruction 'spkernelr' cannot be predicated

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@ -0,0 +1,40 @@
# Test instructions that cannot be predicated.
.text
.globl f
f:
[A1] nop
[!B1] nop 2
[a2] addab .D2 b14,32,b29
[b0] addah .D1X b14,32,a5
[!b0] addaw .D2 b14,32,b7
[a1] callp .S1 f,a3
[b1] addsub .L1 a1,a2,a5:a4
[b2] addsub2 .L2 b1,b2,b5:b4
[!a2] cmpy .M1 a1,a2,a5:a4
[!b2] cmpyr .M1 a1,a2,a5
[!a1] cmpyr1 .M1 a1,a2,a5
[!b1] ddotp4 .M2 b0,b1,b3:b2
[!a0] ddotph2 .M2 b1:b0,b2,b5:b4
[!a0] ddotph2r .M2 b1:b0,b2,b5
[!a0] ddotpl2 .M2 b1:b0,b2,b5:b4
[!a0] ddotpl2r .M2 b1:b0,b2,b5
[!b0] dint
[a0] dpack2 .L1 a0,a1,a3:a2
[b0] dpackx2 .L1 a0,a1,a3:a2
[b1] gmpy .M1 a1,a2,a3
[a1] idle
[b2] mpy2ir .M1 a1,a2,a5:a4
[a0] rint
[b0] rpack2 .S1 a0,a1,a2
[!b1] saddsub .L1 a0,a0,a1:a0
[!b2] saddsub2 .L1 a0,a0,a1:a0
[a0] shfl3 .L1 a0,a0,a1:a0
[b1] smpy32 .M1 a0,a0,a0
[a1] swe
[!a2] swenr
[b0] xormpy .M1 a0,a1,a2
[a1] spmask
[b1] spmaskr
sploop 1
[a0] spkernel
[b0] spkernelr

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#name: C6X bad relocations 1
#error-output: reloc-bad-1.l

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@ -0,0 +1,2 @@
[^:]*: Assembler messages:
[^:]*:8: Error: can't resolve `a' \{\*UND\* section\} - `b' \{\*UND\* section\}

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@ -0,0 +1,8 @@
# Test expressions not representable by relocations.
# Just one test so the resolution-time error isn't suppressed by other
# errors.
.globl a
.globl b
.data
d:
.word a-b

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@ -0,0 +1,2 @@
#name: C6X bad relocations 2
#error-output: reloc-bad-2.l

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@ -0,0 +1,149 @@
[^:]*: Assembler messages:
[^:]*:6: Error: \$DSBT_INDEX not supported in this context
[^:]*:7: Error: \$GOT not supported in this context
[^:]*:8: Error: \$DPR_GOT not supported in this context
[^:]*:9: Error: \$DPR_BYTE not supported in this context
[^:]*:10: Error: \$DPR_HWORD not supported in this context
[^:]*:11: Error: \$DPR_WORD not supported in this context
[^:]*:16: Error: \$DSBT_INDEX not supported in this context
[^:]*:17: Error: \$GOT not supported in this context
[^:]*:18: Error: \$DPR_GOT not supported in this context
[^:]*:19: Error: \$DPR_BYTE not supported in this context
[^:]*:20: Error: \$DPR_HWORD not supported in this context
[^:]*:21: Error: \$DPR_WORD not supported in this context
[^:]*:22: Error: \$DSBT_INDEX not supported in this context
[^:]*:23: Error: \$GOT not supported in this context
[^:]*:24: Error: \$DPR_GOT not supported in this context
[^:]*:25: Error: \$DPR_BYTE not supported in this context
[^:]*:26: Error: \$DPR_HWORD not supported in this context
[^:]*:27: Error: \$DPR_WORD not supported in this context
[^:]*:28: Error: \$DPR_GOT not supported in this context
[^:]*:29: Error: \$DPR_BYTE not supported in this context
[^:]*:30: Error: \$DPR_HWORD not supported in this context
[^:]*:31: Error: \$DPR_WORD not supported in this context
[^:]*:32: Error: \$DSBT_INDEX not supported in this context
[^:]*:33: Error: \$GOT not supported in this context
[^:]*:34: Error: \$DPR_GOT not supported in this context
[^:]*:35: Error: \$DPR_HWORD not supported in this context
[^:]*:36: Error: \$DPR_WORD not supported in this context
[^:]*:37: Error: \$DSBT_INDEX not supported in this context
[^:]*:38: Error: \$GOT not supported in this context
[^:]*:39: Error: \$DPR_GOT not supported in this context
[^:]*:40: Error: \$DPR_HWORD not supported in this context
[^:]*:41: Error: \$DPR_WORD not supported in this context
[^:]*:42: Error: \$DSBT_INDEX not supported in this context
[^:]*:43: Error: \$GOT not supported in this context
[^:]*:44: Error: \$DSBT_INDEX not supported in this context
[^:]*:45: Error: \$GOT not supported in this context
[^:]*:46: Error: \$DSBT_INDEX not supported in this context
[^:]*:47: Error: \$GOT not supported in this context
[^:]*:48: Error: \$DSBT_INDEX not supported in this context
[^:]*:49: Error: \$GOT not supported in this context
[^:]*:50: Error: \$DPR_GOT not supported in this context
[^:]*:51: Error: \$DPR_BYTE not supported in this context
[^:]*:52: Error: \$DPR_HWORD not supported in this context
[^:]*:53: Error: \$DPR_WORD not supported in this context
[^:]*:54: Error: \$DSBT_INDEX not supported in this context
[^:]*:55: Error: \$GOT not supported in this context
[^:]*:56: Error: \$DPR_GOT not supported in this context
[^:]*:57: Error: \$DPR_BYTE not supported in this context
[^:]*:58: Error: \$DPR_HWORD not supported in this context
[^:]*:59: Error: \$DPR_WORD not supported in this context
[^:]*:60: Error: \$DSBT_INDEX not supported in this context
[^:]*:61: Error: \$GOT not supported in this context
[^:]*:62: Error: \$DPR_GOT not supported in this context
[^:]*:63: Error: \$DPR_BYTE not supported in this context
[^:]*:64: Error: \$DPR_HWORD not supported in this context
[^:]*:65: Error: \$DPR_WORD not supported in this context
[^:]*:66: Error: \$DSBT_INDEX not supported in this context
[^:]*:67: Error: \$GOT not supported in this context
[^:]*:68: Error: \$DPR_GOT not supported in this context
[^:]*:69: Error: \$DPR_BYTE not supported in this context
[^:]*:70: Error: \$DPR_HWORD not supported in this context
[^:]*:71: Error: \$DPR_WORD not supported in this context
[^:]*:72: Error: \$DSBT_INDEX not supported in this context
[^:]*:73: Error: \$GOT not supported in this context
[^:]*:74: Error: \$DPR_GOT not supported in this context
[^:]*:75: Error: \$DPR_BYTE not supported in this context
[^:]*:76: Error: \$DPR_HWORD not supported in this context
[^:]*:77: Error: \$DPR_WORD not supported in this context
[^:]*:78: Error: \$DSBT_INDEX not supported in this context
[^:]*:79: Error: \$GOT not supported in this context
[^:]*:80: Error: \$DPR_GOT not supported in this context
[^:]*:81: Error: \$DPR_BYTE not supported in this context
[^:]*:82: Error: \$DPR_HWORD not supported in this context
[^:]*:83: Error: \$DPR_WORD not supported in this context
[^:]*:84: Error: \$DSBT_INDEX not supported in this context
[^:]*:85: Error: \$GOT not supported in this context
[^:]*:86: Error: \$DPR_GOT not supported in this context
[^:]*:87: Error: \$DPR_BYTE not supported in this context
[^:]*:88: Error: \$DPR_HWORD not supported in this context
[^:]*:89: Error: \$DPR_WORD not supported in this context
[^:]*:90: Error: \$DSBT_INDEX not supported in this context
[^:]*:91: Error: \$GOT not supported in this context
[^:]*:92: Error: \$DPR_GOT not supported in this context
[^:]*:93: Error: \$DPR_BYTE not supported in this context
[^:]*:94: Error: \$DPR_HWORD not supported in this context
[^:]*:95: Error: \$DPR_WORD not supported in this context
[^:]*:96: Error: \$DSBT_INDEX not supported in this context
[^:]*:97: Error: \$GOT not supported in this context
[^:]*:98: Error: \$DPR_GOT not supported in this context
[^:]*:99: Error: \$DPR_BYTE not supported in this context
[^:]*:100: Error: \$DPR_HWORD not supported in this context
[^:]*:101: Error: \$DPR_WORD not supported in this context
[^:]*:102: Error: \$DSBT_INDEX not supported in this context
[^:]*:103: Error: \$GOT not supported in this context
[^:]*:104: Error: \$DPR_GOT not supported in this context
[^:]*:105: Error: \$DPR_BYTE not supported in this context
[^:]*:106: Error: \$DPR_HWORD not supported in this context
[^:]*:107: Error: \$DPR_WORD not supported in this context
[^:]*:108: Error: \$DSBT_INDEX not supported in this context
[^:]*:109: Error: \$GOT not supported in this context
[^:]*:110: Error: \$DPR_GOT not supported in this context
[^:]*:111: Error: \$DPR_BYTE not supported in this context
[^:]*:112: Error: \$DPR_HWORD not supported in this context
[^:]*:113: Error: \$DPR_WORD not supported in this context
[^:]*:114: Error: \$DSBT_INDEX not supported in this context
[^:]*:115: Error: \$GOT not supported in this context
[^:]*:116: Error: \$DPR_GOT not supported in this context
[^:]*:117: Error: \$DPR_BYTE not supported in this context
[^:]*:118: Error: \$DPR_HWORD not supported in this context
[^:]*:119: Error: \$DPR_WORD not supported in this context
[^:]*:120: Error: \$DSBT_INDEX not supported in this context
[^:]*:121: Error: \$GOT not supported in this context
[^:]*:122: Error: \$DPR_GOT not supported in this context
[^:]*:123: Error: \$DPR_BYTE not supported in this context
[^:]*:124: Error: \$DPR_HWORD not supported in this context
[^:]*:125: Error: \$DPR_WORD not supported in this context
[^:]*:126: Error: \$DSBT_INDEX not supported in this context
[^:]*:127: Error: \$GOT not supported in this context
[^:]*:128: Error: \$DPR_GOT not supported in this context
[^:]*:129: Error: \$DPR_BYTE not supported in this context
[^:]*:130: Error: \$DPR_HWORD not supported in this context
[^:]*:131: Error: \$DPR_WORD not supported in this context
[^:]*:132: Error: \$DSBT_INDEX not supported in this context
[^:]*:133: Error: \$GOT not supported in this context
[^:]*:134: Error: \$DPR_GOT not supported in this context
[^:]*:135: Error: \$DPR_BYTE not supported in this context
[^:]*:136: Error: \$DPR_HWORD not supported in this context
[^:]*:137: Error: \$DPR_WORD not supported in this context
[^:]*:138: Error: \$DPR_GOT not supported in this context
[^:]*:139: Error: \$DPR_BYTE not supported in this context
[^:]*:140: Error: \$DPR_HWORD not supported in this context
[^:]*:141: Error: \$DPR_WORD not supported in this context
[^:]*:142: Error: \$DSBT_INDEX not supported in this context
[^:]*:143: Error: \$GOT not supported in this context
[^:]*:144: Error: \$DPR_GOT not supported in this context
[^:]*:145: Error: \$DPR_BYTE not supported in this context
[^:]*:146: Error: \$DPR_HWORD not supported in this context
[^:]*:147: Error: \$DPR_WORD not supported in this context
[^:]*:148: Error: \$DSBT_INDEX not supported in this context
[^:]*:149: Error: \$GOT not supported in this context
[^:]*:150: Error: \$DPR_GOT not supported in this context
[^:]*:151: Error: \$DPR_BYTE not supported in this context
[^:]*:152: Error: \$DPR_HWORD not supported in this context
[^:]*:153: Error: \$DPR_WORD not supported in this context
[^:]*:154: Error: \$DPR_GOT not supported in this context
[^:]*:155: Error: \$DPR_BYTE not supported in this context
[^:]*:156: Error: \$DPR_HWORD not supported in this context
[^:]*:157: Error: \$DPR_WORD not supported in this context

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@ -0,0 +1,157 @@
# Test expressions not representable by relocations.
.globl a
.globl b
.data
d:
.word $DSBT_INDEX(__c6xabi_DSBT_BASE)
.word $got(b)
.word $dpr_got(a)
.word $dpr_byte(b)
.word $dpr_hword(a)
.word $dpr_word(b)
.text
.nocmp
.globl f
f:
addab .D1X b14,$dsbt_index(__c6xabi_DSBT_BASE),a5
addab .D1X b14,$GOT(b),a5
addab .D1X b14,$DPR_GOT(b),a5
addab .D1X b14,$DPR_BYTE(b),a5
addab .D1X b14,$DPR_HWORD(b),a5
addab .D1X b14,$DPR_WORD(b),a5
addah .D1X b14,$dsbt_index(__c6xabi_DSBT_BASE),a5
addah .D1X b14,$GOT(b),a5
addah .D1X b14,$DPR_GOT(b),a5
addah .D1X b14,$DPR_BYTE(b),a5
addah .D1X b14,$DPR_HWORD(b),a5
addah .D1X b14,$DPR_WORD(b),a5
addaw .D1X b14,$DPR_GOT(b),a5
addaw .D1X b14,$DPR_BYTE(b),a5
addaw .D1X b14,$DPR_HWORD(b),a5
addaw .D1X b14,$DPR_WORD(b),a5
addk .S1 $dsbt_index(__c6xabi_DSBT_BASE),a7
addk .S1 $got(b),a7
addk .S1 $dpr_got(b),a7
addk .S1 $dpr_hword(b),a7
addk .S1 $dpr_word(b),a7
mvk .S1 $dsbt_index(__c6xabi_DSBT_BASE),a7
mvk .S1 $got(b),a7
mvk .S1 $dpr_got(b),a7
mvk .S1 $dpr_hword(b),a7
mvk .S1 $dpr_word(b),a7
mvkh .S1 $dsbt_index(__c6xabi_DSBT_BASE),a7
mvkh .S1 $got(b),a7
mvklh .S1 $dsbt_index(__c6xabi_DSBT_BASE),a7
mvklh .S1 $got(b),a7
mvkl .S1 $dsbt_index(__c6xabi_DSBT_BASE),a7
mvkl .S1 $got(b),a7
addkpc .S2 $dsbt_index(__c6xabi_DSBT_BASE),b3,0
addkpc .S2 $GOT(b),b3,0
addkpc .S2 $DPR_GOT(b),b3,0
addkpc .S2 $DPR_BYTE(b),b3,0
addkpc .S2 $DPR_HWORD(b),b3,0
addkpc .S2 $DPR_WORD(b),b3,0
b .S1 $dsbt_index(__c6xabi_DSBT_BASE)
b .S1 $GOT(b)
b .S1 $DPR_GOT(b)
b .S1 $DPR_BYTE(b)
b .S1 $DPR_HWORD(b)
b .S1 $DPR_WORD(b)
call .S1 $dsbt_index(__c6xabi_DSBT_BASE)
call .S1 $GOT(b)
call .S1 $DPR_GOT(b)
call .S1 $DPR_BYTE(b)
call .S1 $DPR_HWORD(b)
call .S1 $DPR_WORD(b)
bdec .S1 $dsbt_index(__c6xabi_DSBT_BASE),a1
bdec .S1 $GOT(b),a1
bdec .S1 $DPR_GOT(b),a1
bdec .S1 $DPR_BYTE(b),a1
bdec .S1 $DPR_HWORD(b),a1
bdec .S1 $DPR_WORD(b),a1
bpos .S2 $dsbt_index(__c6xabi_DSBT_BASE),b1
bpos .S2 $GOT(b),b1
bpos .S2 $DPR_GOT(b),b1
bpos .S2 $DPR_BYTE(b),b1
bpos .S2 $DPR_HWORD(b),b1
bpos .S2 $DPR_WORD(b),b1
bnop .S1 $dsbt_index(__c6xabi_DSBT_BASE),1
bnop .S1 $GOT(b),1
bnop .S1 $DPR_GOT(b),1
bnop .S1 $DPR_BYTE(b),1
bnop .S1 $DPR_HWORD(b),1
bnop .S1 $DPR_WORD(b),1
callnop $dsbt_index(__c6xabi_DSBT_BASE),1
callnop $GOT(b),1
callnop $DPR_GOT(b),1
callnop $DPR_BYTE(b),1
callnop $DPR_HWORD(b),1
callnop $DPR_WORD(b),1
callp .S1 $dsbt_index(__c6xabi_DSBT_BASE),a3
callp .S1 $GOT(b),a3
callp .S1 $DPR_GOT(b),a3
callp .S1 $DPR_BYTE(b),a3
callp .S1 $DPR_HWORD(b),a3
callp .S1 $DPR_WORD(b),a3
callret .S1 $dsbt_index(__c6xabi_DSBT_BASE)
callret .S1 $GOT(b)
callret .S1 $DPR_GOT(b)
callret .S1 $DPR_BYTE(b)
callret .S1 $DPR_HWORD(b)
callret .S1 $DPR_WORD(b)
ret .S1 $dsbt_index(__c6xabi_DSBT_BASE)
ret .S1 $GOT(b)
ret .S1 $DPR_GOT(b)
ret .S1 $DPR_BYTE(b)
ret .S1 $DPR_HWORD(b)
ret .S1 $DPR_WORD(b)
retp .S1 $dsbt_index(__c6xabi_DSBT_BASE),a3
retp .S1 $GOT(b),a3
retp .S1 $DPR_GOT(b),a3
retp .S1 $DPR_BYTE(b),a3
retp .S1 $DPR_HWORD(b),a3
retp .S1 $DPR_WORD(b),a3
ldb .D2T2 *+b14($dsbt_index(__c6xabi_DSBT_BASE)),b1
ldb .D2T2 *+b14($GOT(b)),b1
ldb .D2T2 *+b14($DPR_GOT(b)),b1
ldb .D2T2 *+b14($DPR_BYTE(b)),b1
ldb .D2T2 *+b14($DPR_HWORD(b)),b1
ldb .D2T2 *+b14($DPR_WORD(b)),b1
ldbu .D2T2 *+b14($dsbt_index(__c6xabi_DSBT_BASE)),b1
ldbu .D2T2 *+b14($GOT(b)),b1
ldbu .D2T2 *+b14($DPR_GOT(b)),b1
ldbu .D2T2 *+b14($DPR_BYTE(b)),b1
ldbu .D2T2 *+b14($DPR_HWORD(b)),b1
ldbu .D2T2 *+b14($DPR_WORD(b)),b1
ldh .D2T2 *+b14($dsbt_index(__c6xabi_DSBT_BASE)),b1
ldh .D2T2 *+b14($GOT(b)),b1
ldh .D2T2 *+b14($DPR_GOT(b)),b1
ldh .D2T2 *+b14($DPR_BYTE(b)),b1
ldh .D2T2 *+b14($DPR_HWORD(b)),b1
ldh .D2T2 *+b14($DPR_WORD(b)),b1
ldhu .D2T2 *+b14($dsbt_index(__c6xabi_DSBT_BASE)),b1
ldhu .D2T2 *+b14($GOT(b)),b1
ldhu .D2T2 *+b14($DPR_GOT(b)),b1
ldhu .D2T2 *+b14($DPR_BYTE(b)),b1
ldhu .D2T2 *+b14($DPR_HWORD(b)),b1
ldhu .D2T2 *+b14($DPR_WORD(b)),b1
ldw .D2T2 *+b14($DPR_GOT(b)),b1
ldw .D2T2 *+b14($DPR_BYTE(b)),b1
ldw .D2T2 *+b14($DPR_HWORD(b)),b1
ldw .D2T2 *+b14($DPR_WORD(b)),b1
stb .D2T2 b1,*+b14($dsbt_index(__c6xabi_DSBT_BASE))
stb .D2T2 b1,*+b14($GOT(b))
stb .D2T2 b1,*+b14($DPR_GOT(b))
stb .D2T2 b1,*+b14($DPR_BYTE(b))
stb .D2T2 b1,*+b14($DPR_HWORD(b))
stb .D2T2 b1,*+b14($DPR_WORD(b))
sth .D2T2 b1,*+b14($dsbt_index(__c6xabi_DSBT_BASE))
sth .D2T2 b1,*+b14($GOT(b))
sth .D2T2 b1,*+b14($DPR_GOT(b))
sth .D2T2 b1,*+b14($DPR_BYTE(b))
sth .D2T2 b1,*+b14($DPR_HWORD(b))
sth .D2T2 b1,*+b14($DPR_WORD(b))
stw .D2T2 b1,*+b14($DPR_GOT(b))
stw .D2T2 b1,*+b14($DPR_BYTE(b))
stw .D2T2 b1,*+b14($DPR_HWORD(b))
stw .D2T2 b1,*+b14($DPR_WORD(b))

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@ -0,0 +1,2 @@
#name: C6X bad relocations 3
#error-output: reloc-bad-3.l

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