Mark generated cgen files read-only
* cgen.sh: Mark generated files read-only. * epiphany-asm.c: Regenerate. * epiphany-desc.c: Regenerate. * epiphany-desc.h: Regenerate. * epiphany-dis.c: Regenerate. * epiphany-ibld.c: Regenerate. * epiphany-opc.c: Regenerate. * epiphany-opc.h: Regenerate. * fr30-asm.c: Regenerate. * fr30-desc.c: Regenerate. * fr30-desc.h: Regenerate. * fr30-dis.c: Regenerate. * fr30-ibld.c: Regenerate. * fr30-opc.c: Regenerate. * fr30-opc.h: Regenerate. * frv-asm.c: Regenerate. * frv-desc.c: Regenerate. * frv-desc.h: Regenerate. * frv-dis.c: Regenerate. * frv-ibld.c: Regenerate. * frv-opc.c: Regenerate. * frv-opc.h: Regenerate. * ip2k-asm.c: Regenerate. * ip2k-desc.c: Regenerate. * ip2k-desc.h: Regenerate. * ip2k-dis.c: Regenerate. * ip2k-ibld.c: Regenerate. * ip2k-opc.c: Regenerate. * ip2k-opc.h: Regenerate. * iq2000-asm.c: Regenerate. * iq2000-desc.c: Regenerate. * iq2000-desc.h: Regenerate. * iq2000-dis.c: Regenerate. * iq2000-ibld.c: Regenerate. * iq2000-opc.c: Regenerate. * iq2000-opc.h: Regenerate. * lm32-asm.c: Regenerate. * lm32-desc.c: Regenerate. * lm32-desc.h: Regenerate. * lm32-dis.c: Regenerate. * lm32-ibld.c: Regenerate. * lm32-opc.c: Regenerate. * lm32-opc.h: Regenerate. * lm32-opinst.c: Regenerate. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate. * m32r-asm.c: Regenerate. * m32r-desc.c: Regenerate. * m32r-desc.h: Regenerate. * m32r-dis.c: Regenerate. * m32r-ibld.c: Regenerate. * m32r-opc.c: Regenerate. * m32r-opc.h: Regenerate. * m32r-opinst.c: Regenerate. * mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-dis.c: Regenerate. * mep-ibld.c: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate. * mt-asm.c: Regenerate. * mt-desc.c: Regenerate. * mt-desc.h: Regenerate. * mt-dis.c: Regenerate. * mt-ibld.c: Regenerate. * mt-opc.c: Regenerate. * mt-opc.h: Regenerate. * or1k-asm.c: Regenerate. * or1k-desc.c: Regenerate. * or1k-desc.h: Regenerate. * or1k-dis.c: Regenerate. * or1k-ibld.c: Regenerate. * or1k-opc.c: Regenerate. * or1k-opc.h: Regenerate. * or1k-opinst.c: Regenerate. * xc16x-asm.c: Regenerate. * xc16x-desc.c: Regenerate. * xc16x-desc.h: Regenerate. * xc16x-dis.c: Regenerate. * xc16x-ibld.c: Regenerate. * xc16x-opc.c: Regenerate. * xc16x-opc.h: Regenerate. * xstormy16-asm.c: Regenerate. * xstormy16-desc.c: Regenerate. * xstormy16-desc.h: Regenerate. * xstormy16-dis.c: Regenerate. * xstormy16-ibld.c: Regenerate. * xstormy16-opc.c: Regenerate. * xstormy16-opc.h: Regenerate.
This commit is contained in:
parent
11cb57160f
commit
4162bb66c6
@ -1,3 +1,102 @@
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2017-07-11 Yao Qi <yao.qi@linaro.org>
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Alan Modra <amodra@gmail.com>
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* cgen.sh: Mark generated files read-only.
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* epiphany-asm.c: Regenerate.
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* epiphany-desc.c: Regenerate.
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* epiphany-desc.h: Regenerate.
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* epiphany-dis.c: Regenerate.
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* epiphany-ibld.c: Regenerate.
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* epiphany-opc.c: Regenerate.
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* epiphany-opc.h: Regenerate.
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* fr30-asm.c: Regenerate.
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* fr30-desc.c: Regenerate.
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* fr30-desc.h: Regenerate.
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* fr30-dis.c: Regenerate.
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* fr30-ibld.c: Regenerate.
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* fr30-opc.c: Regenerate.
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* fr30-opc.h: Regenerate.
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* frv-asm.c: Regenerate.
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* frv-desc.c: Regenerate.
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* frv-desc.h: Regenerate.
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* frv-dis.c: Regenerate.
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* frv-ibld.c: Regenerate.
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* frv-opc.c: Regenerate.
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* frv-opc.h: Regenerate.
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* ip2k-asm.c: Regenerate.
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* ip2k-desc.c: Regenerate.
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* ip2k-desc.h: Regenerate.
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* ip2k-dis.c: Regenerate.
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* ip2k-ibld.c: Regenerate.
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* ip2k-opc.c: Regenerate.
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* ip2k-opc.h: Regenerate.
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* iq2000-asm.c: Regenerate.
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* iq2000-desc.c: Regenerate.
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* iq2000-desc.h: Regenerate.
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* iq2000-dis.c: Regenerate.
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* iq2000-ibld.c: Regenerate.
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* iq2000-opc.c: Regenerate.
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* iq2000-opc.h: Regenerate.
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* lm32-asm.c: Regenerate.
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* lm32-desc.c: Regenerate.
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* lm32-desc.h: Regenerate.
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* lm32-dis.c: Regenerate.
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* lm32-ibld.c: Regenerate.
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* lm32-opc.c: Regenerate.
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* lm32-opc.h: Regenerate.
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* lm32-opinst.c: Regenerate.
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* m32c-asm.c: Regenerate.
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* m32c-desc.c: Regenerate.
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* m32c-desc.h: Regenerate.
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* m32c-dis.c: Regenerate.
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* m32c-ibld.c: Regenerate.
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* m32c-opc.c: Regenerate.
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* m32c-opc.h: Regenerate.
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* m32r-asm.c: Regenerate.
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* m32r-desc.c: Regenerate.
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* m32r-desc.h: Regenerate.
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* m32r-dis.c: Regenerate.
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* m32r-ibld.c: Regenerate.
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* m32r-opc.c: Regenerate.
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* m32r-opc.h: Regenerate.
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* m32r-opinst.c: Regenerate.
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* mep-asm.c: Regenerate.
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* mep-desc.c: Regenerate.
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* mep-desc.h: Regenerate.
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* mep-dis.c: Regenerate.
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* mep-ibld.c: Regenerate.
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* mep-opc.c: Regenerate.
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* mep-opc.h: Regenerate.
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* mt-asm.c: Regenerate.
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* mt-desc.c: Regenerate.
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* mt-desc.h: Regenerate.
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* mt-dis.c: Regenerate.
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* mt-ibld.c: Regenerate.
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* mt-opc.c: Regenerate.
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* mt-opc.h: Regenerate.
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* or1k-asm.c: Regenerate.
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* or1k-desc.c: Regenerate.
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* or1k-desc.h: Regenerate.
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* or1k-dis.c: Regenerate.
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* or1k-ibld.c: Regenerate.
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* or1k-opc.c: Regenerate.
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* or1k-opc.h: Regenerate.
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* or1k-opinst.c: Regenerate.
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* xc16x-asm.c: Regenerate.
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* xc16x-desc.c: Regenerate.
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* xc16x-desc.h: Regenerate.
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* xc16x-dis.c: Regenerate.
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* xc16x-ibld.c: Regenerate.
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* xc16x-opc.c: Regenerate.
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* xc16x-opc.h: Regenerate.
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* xstormy16-asm.c: Regenerate.
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* xstormy16-desc.c: Regenerate.
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* xstormy16-desc.h: Regenerate.
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* xstormy16-dis.c: Regenerate.
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* xstormy16-ibld.c: Regenerate.
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* xstormy16-opc.c: Regenerate.
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* xstormy16-opc.h: Regenerate.
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2017-07-07 Alan Modra <amodra@gmail.com>
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* cgen-dis.in: Include disassemble.h, not dis-asm.h.
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@ -82,6 +82,8 @@ do
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esac
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done
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header="/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */"
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case $action in
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opcodes)
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# Remove residual working files.
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@ -113,27 +115,32 @@ opcodes)
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${extrafile_args}
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# Customise generated files for the particular architecture.
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sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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sed -e "1i$header" \
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-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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-e 's/[ ][ ]*$//' < ${tmp}-desc.h1 > ${tmp}-desc.h
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${rootdir}/move-if-change ${tmp}-desc.h ${srcdir}/${prefix}-desc.h
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sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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sed -e "1i$header" \
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-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
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< ${tmp}-desc.c1 > ${tmp}-desc.c
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${rootdir}/move-if-change ${tmp}-desc.c ${srcdir}/${prefix}-desc.c
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sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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sed -e "1i$header" \
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-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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-e 's/[ ][ ]*$//' < ${tmp}-opc.h1 > ${tmp}-opc.h
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${rootdir}/move-if-change ${tmp}-opc.h ${srcdir}/${prefix}-opc.h
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sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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sed -e "1i$header" \
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-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
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< ${tmp}-opc.c1 > ${tmp}-opc.c
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${rootdir}/move-if-change ${tmp}-opc.c ${srcdir}/${prefix}-opc.c
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case $extrafiles in
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*opinst*)
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sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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sed -e "1i$header" \
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-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
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< ${tmp}-opinst.c1 >${tmp}-opinst.c
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${rootdir}/move-if-change ${tmp}-opinst.c ${srcdir}/${prefix}-opinst.c
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@ -141,18 +148,21 @@ opcodes)
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esac
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cat ${srcdir}/cgen-ibld.in ${tmp}-ibld.in1 | \
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sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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sed -e "1i$header" \
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-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' > ${tmp}-ibld.c
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${rootdir}/move-if-change ${tmp}-ibld.c ${srcdir}/${prefix}-ibld.c
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sed -e "/ -- assembler routines/ r ${tmp}-asm.in1" ${srcdir}/cgen-asm.in \
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| sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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| sed -e "1i$header" \
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-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
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> ${tmp}-asm.c
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${rootdir}/move-if-change ${tmp}-asm.c ${srcdir}/${prefix}-asm.c
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sed -e "/ -- disassembler routines/ r ${tmp}-dis.in1" ${srcdir}/cgen-dis.in \
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| sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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| sed -e "1i$header" \
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-e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
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-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
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> ${tmp}-dis.c
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${rootdir}/move-if-change ${tmp}-dis.c ${srcdir}/${prefix}-dis.c
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data for epiphany.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data header for epiphany.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Disassembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction building/extraction support for epiphany. -*- C -*-
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THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode table for epiphany.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode header for epiphany.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data for fr30.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data header for fr30.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Disassembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction building/extraction support for fr30. -*- C -*-
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THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode table for fr30.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode header for fr30.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data for frv.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data header for frv.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Disassembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction building/extraction support for frv. -*- C -*-
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THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode table for frv.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode header for frv.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data for ip2k.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data header for ip2k.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Disassembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction building/extraction support for ip2k. -*- C -*-
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THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode table for ip2k.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
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/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode header for ip2k.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for iq2000.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for iq2000.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for iq2000. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for iq2000.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for iq2000.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for lm32.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for lm32.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for lm32. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for lm32.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for lm32.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Semantic operand instances for lm32.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for m32c.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for m32c.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for m32c. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for m32c.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for m32c.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for m32r.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for m32r.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for m32r. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for m32r.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for m32r.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Semantic operand instances for m32r.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for mep.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for mep.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for mep. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for mep.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for mep.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for mt.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for mt.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for mt. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for mt.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for mt.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for or1k.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for or1k.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for or1k. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for or1k.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for or1k.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Semantic operand instances for or1k.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for xc16x.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for xc16x.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for xc16x. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for xc16x.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for xc16x.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Assembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data for xstormy16.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* CPU data header for xstormy16.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Disassembler interface for targets using CGEN. -*- C -*-
|
||||
CGEN: Cpu tools GENerator
|
||||
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction building/extraction support for xstormy16. -*- C -*-
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode table for xstormy16.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
@ -1,3 +1,4 @@
|
||||
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||||
/* Instruction opcode header for xstormy16.
|
||||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
Loading…
Reference in New Issue
Block a user