bfd/
* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Move MIPS ELF files to... (BFD64_BACKENDS, BFD64_BACKENDS_CFILES): ...here. * Makefile.in: Regenerate. * config.bfd: Enclose all MIPS ELF targets in #ifdef BFD64. Set want64 to true for them at the end. * targets.c (_bfd_target_vector): Protect MIPS ELF targets with #ifdef BFD64. gas/ * config/tc-mips.c: Assert that offsetT and valueT are at least 8 bytes in size. (GPR_SMIN, GPR_SMAX): New macros. (macro, mips_ip): Remove code for 4-byte valueT and offsetT. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Move MIPS ELF emulations to... (ALL_64_EMULATION_SOURCES): ...here. * Makefile.in: Regenerate.
This commit is contained in:
parent
88924e5fa2
commit
42429eacb4
@ -1,3 +1,14 @@
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2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
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* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Move MIPS ELF
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files to...
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(BFD64_BACKENDS, BFD64_BACKENDS_CFILES): ...here.
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* Makefile.in: Regenerate.
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* config.bfd: Enclose all MIPS ELF targets in #ifdef BFD64.
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Set want64 to true for them at the end.
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* targets.c (_bfd_target_vector): Protect MIPS ELF targets with
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#ifdef BFD64.
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2013-06-22 Sandra Loosemore <sandra@codesourcery.com>
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* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Don't
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@ -346,7 +346,6 @@ BFD32_BACKENDS = \
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elf32-mep.lo \
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elf32-metag.lo \
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elf32-microblaze.lo \
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elf32-mips.lo \
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elf32-moxie.lo \
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elf32-msp430.lo \
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elf32-mt.lo \
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@ -375,7 +374,6 @@ BFD32_BACKENDS = \
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elf32-xtensa.lo \
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elf32.lo \
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elflink.lo \
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elfxx-mips.lo \
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elfxx-sparc.lo \
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elfxx-tilegx.lo \
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epoc-pe-arm.lo \
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@ -536,7 +534,6 @@ BFD32_BACKENDS_CFILES = \
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elf32-mep.c \
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elf32-metag.c \
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elf32-microblaze.c \
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elf32-mips.c \
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elf32-moxie.c \
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elf32-msp430.c \
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elf32-mt.c \
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@ -565,7 +562,6 @@ BFD32_BACKENDS_CFILES = \
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elf32-xtensa.c \
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elf32.c \
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elflink.c \
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elfxx-mips.c \
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elfxx-sparc.c \
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elfxx-tilegx.c \
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epoc-pe-arm.c \
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@ -650,6 +646,7 @@ BFD64_BACKENDS = \
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coff64-rs6000.lo \
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demo64.lo \
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elf32-ia64.lo \
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elf32-mips.lo \
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elf32-score.lo \
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elf32-score7.lo \
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elf64-alpha.lo \
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@ -668,6 +665,7 @@ BFD64_BACKENDS = \
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elf64.lo \
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elfn32-mips.lo \
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elfxx-ia64.lo \
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elfxx-mips.lo \
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mach-o-x86-64.lo \
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mmo.lo \
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nlm32-alpha.lo \
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@ -687,6 +685,7 @@ BFD64_BACKENDS_CFILES = \
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coff-x86_64.c \
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coff64-rs6000.c \
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demo64.c \
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elf32-mips.c \
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elf32-score.c \
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elf32-score7.c \
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elf64-alpha.c \
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@ -704,6 +703,7 @@ BFD64_BACKENDS_CFILES = \
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elf64.c \
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elfn32-mips.c \
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elfxx-ia64.c \
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elfxx-mips.c \
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mach-o-x86-64.c \
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mmo.c \
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nlm32-alpha.c \
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@ -648,7 +648,6 @@ BFD32_BACKENDS = \
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elf32-mep.lo \
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elf32-metag.lo \
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elf32-microblaze.lo \
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elf32-mips.lo \
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elf32-moxie.lo \
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elf32-msp430.lo \
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elf32-mt.lo \
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@ -677,7 +676,6 @@ BFD32_BACKENDS = \
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elf32-xtensa.lo \
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elf32.lo \
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elflink.lo \
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elfxx-mips.lo \
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elfxx-sparc.lo \
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elfxx-tilegx.lo \
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epoc-pe-arm.lo \
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@ -838,7 +836,6 @@ BFD32_BACKENDS_CFILES = \
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elf32-mep.c \
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elf32-metag.c \
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elf32-microblaze.c \
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elf32-mips.c \
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elf32-moxie.c \
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elf32-msp430.c \
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elf32-mt.c \
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@ -867,7 +864,6 @@ BFD32_BACKENDS_CFILES = \
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elf32-xtensa.c \
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elf32.c \
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elflink.c \
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elfxx-mips.c \
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elfxx-sparc.c \
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elfxx-tilegx.c \
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epoc-pe-arm.c \
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@ -953,6 +949,7 @@ BFD64_BACKENDS = \
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coff64-rs6000.lo \
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demo64.lo \
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elf32-ia64.lo \
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elf32-mips.lo \
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elf32-score.lo \
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elf32-score7.lo \
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elf64-alpha.lo \
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@ -971,6 +968,7 @@ BFD64_BACKENDS = \
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elf64.lo \
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elfn32-mips.lo \
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elfxx-ia64.lo \
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elfxx-mips.lo \
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mach-o-x86-64.lo \
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mmo.lo \
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nlm32-alpha.lo \
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@ -990,6 +988,7 @@ BFD64_BACKENDS_CFILES = \
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coff-x86_64.c \
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coff64-rs6000.c \
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demo64.c \
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elf32-mips.c \
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elf32-score.c \
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elf32-score7.c \
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elf64-alpha.c \
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@ -1007,6 +1006,7 @@ BFD64_BACKENDS_CFILES = \
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elf64.c \
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elfn32-mips.c \
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elfxx-ia64.c \
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elfxx-mips.c \
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mach-o-x86-64.c \
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mmo.c \
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nlm32-alpha.c \
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@ -957,6 +957,7 @@ case "${targ}" in
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targ_defvec=ecoff_big_vec
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targ_selvecs=ecoff_little_vec
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;;
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#ifdef BFD64
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mips*el-*-netbsd*)
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targ_defvec=bfd_elf32_tradlittlemips_vec
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targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_little_vec ecoff_big_vec"
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@ -965,6 +966,7 @@ case "${targ}" in
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targ_defvec=bfd_elf32_tradbigmips_vec
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targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_big_vec ecoff_little_vec"
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;;
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#endif
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mips*-dec-* | mips*el-*-ecoff*)
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targ_defvec=ecoff_little_vec
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targ_selvecs=ecoff_big_vec
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@ -977,14 +979,11 @@ case "${targ}" in
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mips*-*-irix6*)
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targ_defvec=bfd_elf32_nbigmips_vec
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targ_selvecs="bfd_elf32_nlittlemips_vec bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
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want64=true
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;;
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mips64*-ps2-elf*)
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targ_defvec=bfd_elf32_nlittlemips_vec
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targ_selvecs="bfd_elf32_nlittlemips_vec bfd_elf32_nbigmips_vec bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
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want64=true
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;;
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#endif
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mips*-ps2-elf*)
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targ_defvec=bfd_elf32_littlemips_vec
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targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
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@ -993,6 +992,7 @@ case "${targ}" in
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targ_defvec=bfd_elf32_bigmips_vec
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targ_selvecs="bfd_elf32_littlemips_vec ecoff_big_vec ecoff_little_vec"
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;;
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#endif
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mips*-sgi-* | mips*-*-bsd*)
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targ_defvec=ecoff_big_vec
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targ_selvecs=ecoff_little_vec
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@ -1001,10 +1001,12 @@ case "${targ}" in
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targ_defvec=ecoff_biglittle_vec
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targ_selvecs="ecoff_little_vec ecoff_big_vec"
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;;
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#ifdef BFD64
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mips*-*-sysv4*)
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targ_defvec=bfd_elf32_tradbigmips_vec
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targ_selvecs="bfd_elf32_tradlittlemips_vec ecoff_big_vec ecoff_little_vec"
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;;
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#endif
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mips*-*-sysv* | mips*-*-riscos*)
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targ_defvec=ecoff_big_vec
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targ_selvecs=ecoff_little_vec
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@ -1013,23 +1015,18 @@ case "${targ}" in
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mips*el-*-vxworks*)
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targ_defvec=bfd_elf32_littlemips_vxworks_vec
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targ_selvecs="bfd_elf32_littlemips_vec bfd_elf32_bigmips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
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want64=true
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;;
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mips*-*-vxworks*)
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targ_defvec=bfd_elf32_bigmips_vxworks_vec
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targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
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want64=true
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;;
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#endif
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mips*el-sde-elf*)
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targ_defvec=bfd_elf32_tradlittlemips_vec
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targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
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want64=true
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;;
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mips*-sde-elf* | mips*-mti-elf*)
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targ_defvec=bfd_elf32_tradbigmips_vec
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targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
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want64=true
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;;
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mips*el-*-elf* | mips*el-*-vxworks* | mips*-*-chorus*)
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targ_defvec=bfd_elf32_littlemips_vec
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@ -1043,13 +1040,10 @@ case "${targ}" in
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targ_defvec=bfd_elf32_bigmips_vec
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targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
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;;
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#ifdef BFD64
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mips64*-*-openbsd*)
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targ_defvec=bfd_elf64_tradbigmips_vec
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targ_selvecs="bfd_elf32_ntradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
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want64=true
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;;
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#endif
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mips*el-*-openbsd*)
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targ_defvec=bfd_elf32_littlemips_vec
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targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_little_vec ecoff_big_vec"
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@ -1058,26 +1052,21 @@ case "${targ}" in
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targ_defvec=bfd_elf32_bigmips_vec
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targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_big_vec ecoff_little_vec"
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;;
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#ifdef BFD64
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mips64*el-*-linux*)
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targ_defvec=bfd_elf32_ntradlittlemips_vec
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targ_selvecs="bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec bfd_elf64_tradbigmips_vec"
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want64=true
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;;
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mips64*-*-linux*)
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targ_defvec=bfd_elf32_ntradbigmips_vec
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targ_selvecs="bfd_elf32_ntradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
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want64=true
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;;
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mips*el-*-linux*)
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targ_defvec=bfd_elf32_tradlittlemips_vec
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targ_selvecs="bfd_elf32_tradbigmips_vec ecoff_little_vec ecoff_big_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec"
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want64=true
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;;
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mips*-*-linux*)
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targ_defvec=bfd_elf32_tradbigmips_vec
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targ_selvecs="bfd_elf32_tradlittlemips_vec ecoff_big_vec ecoff_little_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec"
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want64=true
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;;
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mips64*el-*-freebsd* | mips64*el-*-kfreebsd*-gnu)
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# FreeBSD vectors
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@ -1085,7 +1074,6 @@ case "${targ}" in
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targ_selvecs="bfd_elf32_ntradbigmips_freebsd_vec bfd_elf32_tradlittlemips_freebsd_vec bfd_elf32_tradbigmips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec"
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# Generic vectors
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targ_selvecs="${targ_selvecs} bfd_elf32_ntradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec bfd_elf64_tradbigmips_vec"
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want64=true
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;;
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mips64*-*-freebsd* | mips64*-*-kfreebsd*-gnu)
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# FreeBSD vectors
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@ -1093,16 +1081,13 @@ case "${targ}" in
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targ_selvecs="bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf32_tradbigmips_freebsd_vec bfd_elf32_tradlittlemips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec"
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# Generic vectors
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targ_selvecs="${targ_selvecs} bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
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want64=true
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;;
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#endif
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mips*el-*-freebsd* | mips*el-*-kfreebsd*-gnu)
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# FreeBSD vectors
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targ_defvec=bfd_elf32_tradlittlemips_freebsd_vec
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targ_selvecs="bfd_elf32_tradbigmips_freebsd_vec bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec bfd_elf32_ntradbigmips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec"
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# Generic vectors
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targ_selvecs="${targ_selvecs} bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec"
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want64=true
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;;
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mips*-*-freebsd* | mips*-*-kfreebsd*-gnu)
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# FreeBSD vectors
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@ -1110,9 +1095,7 @@ case "${targ}" in
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targ_selvecs="bfd_elf32_tradlittlemips_freebsd_vec bfd_elf32_ntradbigmips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec"
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# Generic vectors
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targ_selvecs="${targ_selvecs} bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec"
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want64=true
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;;
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#ifdef BFD64
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mmix-*-*)
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targ_defvec=bfd_elf64_mmix_vec
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targ_selvecs=bfd_mmo_vec
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@ -1711,6 +1694,13 @@ case "${targ}" in
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;;
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esac
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# All MIPS ELF targets need a 64-bit bfd_vma.
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case "${targ_defvec} ${targ_selvecs}" in
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*elf*mips*)
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want64=true
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;;
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esac
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case "${host64}${want64}" in
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*true*)
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targ_selvecs="${targ_selvecs} ${targ64_selvecs}"
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|
@ -982,8 +982,10 @@ static const bfd_target * const _bfd_target_vector[] =
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&bfd_elf32_bigarm_vec,
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&bfd_elf32_bigarm_symbian_vec,
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&bfd_elf32_bigarm_vxworks_vec,
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#ifdef BFD64
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&bfd_elf32_bigmips_vec,
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&bfd_elf32_bigmips_vxworks_vec,
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#endif
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&bfd_elf32_bigmoxie_vec,
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&bfd_elf32_bignios2_vec,
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&bfd_elf32_cr16_vec,
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@ -1024,8 +1026,10 @@ static const bfd_target * const _bfd_target_vector[] =
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&bfd_elf32_littlearm_vec,
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&bfd_elf32_littlearm_symbian_vec,
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&bfd_elf32_littlearm_vxworks_vec,
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#ifdef BFD64
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&bfd_elf32_littlemips_vec,
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&bfd_elf32_littlemips_vxworks_vec,
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#endif
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&bfd_elf32_littlemoxie_vec,
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&bfd_elf32_littlenios2_vec,
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&bfd_elf32_m32c_vec,
|
||||
@ -1100,10 +1104,12 @@ static const bfd_target * const _bfd_target_vector[] =
|
||||
&bfd_elf32_tilegx_be_vec,
|
||||
&bfd_elf32_tilegx_le_vec,
|
||||
&bfd_elf32_tilepro_vec,
|
||||
#ifdef BFD64
|
||||
&bfd_elf32_tradbigmips_vec,
|
||||
&bfd_elf32_tradlittlemips_vec,
|
||||
&bfd_elf32_tradbigmips_freebsd_vec,
|
||||
&bfd_elf32_tradlittlemips_freebsd_vec,
|
||||
#endif
|
||||
&bfd_elf32_us_cris_vec,
|
||||
&bfd_elf32_v850_vec,
|
||||
&bfd_elf32_v850_rh850_vec,
|
||||
|
@ -1,3 +1,10 @@
|
||||
2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
|
||||
|
||||
* config/tc-mips.c: Assert that offsetT and valueT are at least
|
||||
8 bytes in size.
|
||||
(GPR_SMIN, GPR_SMAX): New macros.
|
||||
(macro, mips_ip): Remove code for 4-byte valueT and offsetT.
|
||||
|
||||
2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
|
||||
|
||||
* config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
|
||||
|
@ -34,6 +34,10 @@
|
||||
#include "dwarf2dbg.h"
|
||||
#include "dw2gencfi.h"
|
||||
|
||||
/* Check assumptions made in this file. */
|
||||
typedef char static_assert1[sizeof (offsetT) < 8 ? -1 : 1];
|
||||
typedef char static_assert2[sizeof (valueT) < 8 ? -1 : 1];
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DBG(x) printf x
|
||||
#else
|
||||
@ -524,6 +528,10 @@ static int mips_32bitmode = 0;
|
||||
#define HAVE_CODE_COMPRESSION \
|
||||
((mips_opts.mips16 | mips_opts.micromips) != 0)
|
||||
|
||||
/* The minimum and maximum signed values that can be stored in a GPR. */
|
||||
#define GPR_SMAX ((offsetT) (((valueT) 1 << (HAVE_64BIT_GPRS ? 63 : 31)) - 1))
|
||||
#define GPR_SMIN (-GPR_SMAX - 1)
|
||||
|
||||
/* MIPS PIC level. */
|
||||
|
||||
enum mips_pic_level mips_pic;
|
||||
@ -6742,7 +6750,6 @@ macro (struct mips_cl_insn *ip)
|
||||
int lp = 0;
|
||||
int ab = 0;
|
||||
int off;
|
||||
offsetT maxnum;
|
||||
bfd_reloc_code_real_type r;
|
||||
int hold_mips_optimize;
|
||||
|
||||
@ -6945,17 +6952,7 @@ macro (struct mips_cl_insn *ip)
|
||||
likely = 1;
|
||||
case M_BGT_I:
|
||||
/* Check for > max integer. */
|
||||
maxnum = 0x7fffffff;
|
||||
if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4)
|
||||
{
|
||||
maxnum <<= 16;
|
||||
maxnum |= 0xffff;
|
||||
maxnum <<= 16;
|
||||
maxnum |= 0xffff;
|
||||
}
|
||||
if (imm_expr.X_op == O_constant
|
||||
&& imm_expr.X_add_number >= maxnum
|
||||
&& (HAVE_32BIT_GPRS || sizeof (maxnum) > 4))
|
||||
if (imm_expr.X_op == O_constant && imm_expr.X_add_number >= GPR_SMAX)
|
||||
{
|
||||
do_false:
|
||||
/* Result is always false. */
|
||||
@ -6985,18 +6982,7 @@ macro (struct mips_cl_insn *ip)
|
||||
&offset_expr, sreg);
|
||||
break;
|
||||
}
|
||||
maxnum = 0x7fffffff;
|
||||
if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4)
|
||||
{
|
||||
maxnum <<= 16;
|
||||
maxnum |= 0xffff;
|
||||
maxnum <<= 16;
|
||||
maxnum |= 0xffff;
|
||||
}
|
||||
maxnum = - maxnum - 1;
|
||||
if (imm_expr.X_op == O_constant
|
||||
&& imm_expr.X_add_number <= maxnum
|
||||
&& (HAVE_32BIT_GPRS || sizeof (maxnum) > 4))
|
||||
if (imm_expr.X_op == O_constant && imm_expr.X_add_number <= GPR_SMIN)
|
||||
{
|
||||
do_true:
|
||||
/* result is always true */
|
||||
@ -7109,17 +7095,7 @@ macro (struct mips_cl_insn *ip)
|
||||
case M_BLEL_I:
|
||||
likely = 1;
|
||||
case M_BLE_I:
|
||||
maxnum = 0x7fffffff;
|
||||
if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4)
|
||||
{
|
||||
maxnum <<= 16;
|
||||
maxnum |= 0xffff;
|
||||
maxnum <<= 16;
|
||||
maxnum |= 0xffff;
|
||||
}
|
||||
if (imm_expr.X_op == O_constant
|
||||
&& imm_expr.X_add_number >= maxnum
|
||||
&& (HAVE_32BIT_GPRS || sizeof (maxnum) > 4))
|
||||
if (imm_expr.X_op == O_constant && imm_expr.X_add_number >= GPR_SMAX)
|
||||
goto do_true;
|
||||
if (imm_expr.X_op != O_constant)
|
||||
as_bad (_("Unsupported large constant"));
|
||||
@ -12854,7 +12830,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
||||
if (offset_expr.X_add_number == 0)
|
||||
offset_expr.X_op = O_absent;
|
||||
}
|
||||
else if (sizeof (imm_expr.X_add_number) > 4)
|
||||
else
|
||||
{
|
||||
imm_expr.X_op = O_constant;
|
||||
if (!target_big_endian)
|
||||
@ -12862,25 +12838,6 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
||||
else
|
||||
imm_expr.X_add_number = bfd_getb64 (temp);
|
||||
}
|
||||
else
|
||||
{
|
||||
imm_expr.X_op = O_big;
|
||||
imm_expr.X_add_number = 4;
|
||||
if (!target_big_endian)
|
||||
{
|
||||
generic_bignum[0] = bfd_getl16 (temp);
|
||||
generic_bignum[1] = bfd_getl16 (temp + 2);
|
||||
generic_bignum[2] = bfd_getl16 (temp + 4);
|
||||
generic_bignum[3] = bfd_getl16 (temp + 6);
|
||||
}
|
||||
else
|
||||
{
|
||||
generic_bignum[0] = bfd_getb16 (temp + 6);
|
||||
generic_bignum[1] = bfd_getb16 (temp + 4);
|
||||
generic_bignum[2] = bfd_getb16 (temp + 2);
|
||||
generic_bignum[3] = bfd_getb16 (temp);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -12947,18 +12904,6 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
||||
more = (insn + 1 < past
|
||||
&& strcmp (insn->name, insn[1].name) == 0);
|
||||
|
||||
/* If the expression was written as an unsigned number,
|
||||
only treat it as signed if there are no more
|
||||
alternatives. */
|
||||
if (more
|
||||
&& *args == 'j'
|
||||
&& sizeof (imm_expr.X_add_number) <= 4
|
||||
&& imm_expr.X_op == O_constant
|
||||
&& imm_expr.X_add_number < 0
|
||||
&& imm_expr.X_unsigned
|
||||
&& HAVE_64BIT_GPRS)
|
||||
break;
|
||||
|
||||
/* For compatibility with older assemblers, we accept
|
||||
0x8000-0xffff as signed 16-bit numbers when only
|
||||
signed numbers are allowed. */
|
||||
|
@ -1,3 +1,9 @@
|
||||
2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
|
||||
|
||||
* Makefile.am (ALL_EMULATION_SOURCES): Move MIPS ELF emulations to...
|
||||
(ALL_64_EMULATION_SOURCES): ...here.
|
||||
* Makefile.in: Regenerate.
|
||||
|
||||
2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
|
||||
|
||||
* NEWS: Document the removal of MIPS ECOFF targets.
|
||||
|
@ -214,25 +214,11 @@ ALL_EMULATION_SOURCES = \
|
||||
eelf32_tic6x_elf_be.c \
|
||||
eelf32_tic6x_elf_le.c \
|
||||
eelf32am33lin.c \
|
||||
eelf32b4300.c \
|
||||
eelf32bfin.c \
|
||||
eelf32bfinfd.c \
|
||||
eelf32bmip.c \
|
||||
eelf32bmipn32.c \
|
||||
eelf32bsmip.c \
|
||||
eelf32btsmip.c \
|
||||
eelf32btsmip_fbsd.c \
|
||||
eelf32btsmipn32.c \
|
||||
eelf32btsmipn32_fbsd.c \
|
||||
eelf32cr16.c \
|
||||
eelf32cr16c.c \
|
||||
eelf32crx.c \
|
||||
eelf32ebmip.c \
|
||||
eelf32ebmipvxworks.c \
|
||||
eelf32elmip.c \
|
||||
eelf32elmipvxworks.c \
|
||||
eelf32lr5900.c \
|
||||
eelf32lr5900n32.c \
|
||||
eelf32epiphany.c \
|
||||
eelf32epiphany_4x4.c \
|
||||
eelf32fr30.c \
|
||||
@ -242,19 +228,12 @@ ALL_EMULATION_SOURCES = \
|
||||
eelf32ip2k.c \
|
||||
eelf32iq10.c \
|
||||
eelf32iq2000.c \
|
||||
eelf32l4300.c \
|
||||
eelf32lm32.c \
|
||||
eelf32lm32fd.c \
|
||||
eelf32lmip.c \
|
||||
eelf32lppc.c \
|
||||
eelf32lppclinux.c \
|
||||
eelf32lppcnto.c \
|
||||
eelf32lppcsim.c \
|
||||
eelf32lsmip.c \
|
||||
eelf32ltsmip.c \
|
||||
eelf32ltsmip_fbsd.c \
|
||||
eelf32ltsmipn32.c \
|
||||
eelf32ltsmipn32_fbsd.c \
|
||||
eelf32m32c.c \
|
||||
eelf32mb_linux.c \
|
||||
eelf32mcore.c \
|
||||
@ -262,7 +241,6 @@ ALL_EMULATION_SOURCES = \
|
||||
eelf32metag.c \
|
||||
eelf32microblazeel.c \
|
||||
eelf32microblaze.c \
|
||||
eelf32mipswindiss.c \
|
||||
eelf32moxie.c \
|
||||
eelf32mt.c \
|
||||
eelf32openrisc.c \
|
||||
@ -490,6 +468,28 @@ ALL_64_EMULATION_SOURCES = \
|
||||
eaarch64linuxb.c \
|
||||
eelf32_x86_64.c \
|
||||
eelf32_x86_64_nacl.c \
|
||||
eelf32b4300.c \
|
||||
eelf32bmip.c \
|
||||
eelf32bmipn32.c \
|
||||
eelf32bsmip.c \
|
||||
eelf32btsmip.c \
|
||||
eelf32btsmip_fbsd.c \
|
||||
eelf32btsmipn32.c \
|
||||
eelf32btsmipn32_fbsd.c \
|
||||
eelf32ebmip.c \
|
||||
eelf32ebmipvxworks.c \
|
||||
eelf32elmip.c \
|
||||
eelf32elmipvxworks.c \
|
||||
eelf32l4300.c \
|
||||
eelf32lmip.c \
|
||||
eelf32lr5900.c \
|
||||
eelf32lr5900n32.c \
|
||||
eelf32lsmip.c \
|
||||
eelf32ltsmip.c \
|
||||
eelf32ltsmip_fbsd.c \
|
||||
eelf32ltsmipn32.c \
|
||||
eelf32ltsmipn32_fbsd.c \
|
||||
eelf32mipswindiss.c \
|
||||
eelf64_aix.c \
|
||||
eelf64_ia64.c \
|
||||
eelf64_ia64_fbsd.c \
|
||||
|
@ -522,25 +522,11 @@ ALL_EMULATION_SOURCES = \
|
||||
eelf32_tic6x_elf_be.c \
|
||||
eelf32_tic6x_elf_le.c \
|
||||
eelf32am33lin.c \
|
||||
eelf32b4300.c \
|
||||
eelf32bfin.c \
|
||||
eelf32bfinfd.c \
|
||||
eelf32bmip.c \
|
||||
eelf32bmipn32.c \
|
||||
eelf32bsmip.c \
|
||||
eelf32btsmip.c \
|
||||
eelf32btsmip_fbsd.c \
|
||||
eelf32btsmipn32.c \
|
||||
eelf32btsmipn32_fbsd.c \
|
||||
eelf32cr16.c \
|
||||
eelf32cr16c.c \
|
||||
eelf32crx.c \
|
||||
eelf32ebmip.c \
|
||||
eelf32ebmipvxworks.c \
|
||||
eelf32elmip.c \
|
||||
eelf32elmipvxworks.c \
|
||||
eelf32lr5900.c \
|
||||
eelf32lr5900n32.c \
|
||||
eelf32epiphany.c \
|
||||
eelf32epiphany_4x4.c \
|
||||
eelf32fr30.c \
|
||||
@ -550,19 +536,12 @@ ALL_EMULATION_SOURCES = \
|
||||
eelf32ip2k.c \
|
||||
eelf32iq10.c \
|
||||
eelf32iq2000.c \
|
||||
eelf32l4300.c \
|
||||
eelf32lm32.c \
|
||||
eelf32lm32fd.c \
|
||||
eelf32lmip.c \
|
||||
eelf32lppc.c \
|
||||
eelf32lppclinux.c \
|
||||
eelf32lppcnto.c \
|
||||
eelf32lppcsim.c \
|
||||
eelf32lsmip.c \
|
||||
eelf32ltsmip.c \
|
||||
eelf32ltsmip_fbsd.c \
|
||||
eelf32ltsmipn32.c \
|
||||
eelf32ltsmipn32_fbsd.c \
|
||||
eelf32m32c.c \
|
||||
eelf32mb_linux.c \
|
||||
eelf32mcore.c \
|
||||
@ -570,7 +549,6 @@ ALL_EMULATION_SOURCES = \
|
||||
eelf32metag.c \
|
||||
eelf32microblazeel.c \
|
||||
eelf32microblaze.c \
|
||||
eelf32mipswindiss.c \
|
||||
eelf32moxie.c \
|
||||
eelf32mt.c \
|
||||
eelf32openrisc.c \
|
||||
@ -797,6 +775,28 @@ ALL_64_EMULATION_SOURCES = \
|
||||
eaarch64linuxb.c \
|
||||
eelf32_x86_64.c \
|
||||
eelf32_x86_64_nacl.c \
|
||||
eelf32b4300.c \
|
||||
eelf32bmip.c \
|
||||
eelf32bmipn32.c \
|
||||
eelf32bsmip.c \
|
||||
eelf32btsmip.c \
|
||||
eelf32btsmip_fbsd.c \
|
||||
eelf32btsmipn32.c \
|
||||
eelf32btsmipn32_fbsd.c \
|
||||
eelf32ebmip.c \
|
||||
eelf32ebmipvxworks.c \
|
||||
eelf32elmip.c \
|
||||
eelf32elmipvxworks.c \
|
||||
eelf32l4300.c \
|
||||
eelf32lmip.c \
|
||||
eelf32lr5900.c \
|
||||
eelf32lr5900n32.c \
|
||||
eelf32lsmip.c \
|
||||
eelf32ltsmip.c \
|
||||
eelf32ltsmip_fbsd.c \
|
||||
eelf32ltsmipn32.c \
|
||||
eelf32ltsmipn32_fbsd.c \
|
||||
eelf32mipswindiss.c \
|
||||
eelf64_aix.c \
|
||||
eelf64_ia64.c \
|
||||
eelf64_ia64_fbsd.c \
|
||||
|
Loading…
Reference in New Issue
Block a user