* txvu-opc.c:
(parse_dest1,insert_luimm12up6): New functions. (txvu_operands): New operands LUIMM12UP6, LDEST1. (txvu_lower_opcodes): Clean up pass over table. (parse_dotdest1): Fix dest calculation. (_parse_sdest): Fix typo.
This commit is contained in:
Doug Evans
parent
70d7bd21d1
commit
42e6567657
@ -10,6 +10,11 @@ Fri Jan 23 01:49:24 1998 Doug Evans <devans@seba.cygnus.com>
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(print_bcftreg): Likewise.
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(print_accdest): Pass `dest' to _print_dest.
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(insert_xyz): Renamed from parse_xyz.
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(parse_dest1,insert_luimm12up6): New functions.
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(txvu_operands): New operands LUIMM12UP6, LDEST1.
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(txvu_lower_opcodes): Clean up pass over table.
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(parse_dotdest1): Fix dest calculation.
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(_parse_sdest): Fix typo.
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end-sanitize-sky
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Thu Jan 22 16:20:17 1998 Fred Fish <fnf@cygnus.com>
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@ -55,6 +55,7 @@ EXTRACT_FN (dotdest);
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PRINT_FN (dotdest);
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PARSE_FN (dotdest1);
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PARSE_FN (dest1);
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PARSE_FN (bc);
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EXTRACT_FN (bc);
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@ -88,6 +89,8 @@ PRINT_FN (vi01);
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INSERT_FN (luimm12);
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EXTRACT_FN (luimm12);
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INSERT_FN (luimm12up6);
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INSERT_FN (luimm15);
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EXTRACT_FN (luimm15);
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@ -110,7 +113,7 @@ const struct txvu_operand txvu_operands[] =
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in both upper and lower instructions. These don't have a U or L prefix.
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Operands specific to the upper or lower instruction are so prefixed. */
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/* Destination indicator attached to mnemonic, with leading '.'.
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/* Destination indicator attached to mnemonic, with leading '.' or '/'.
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After parsing this, the value is stored in global `dest' so that the
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register parser can verify the same choice of xyzw is used. */
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#define DOTDEST (UNUSED + 1)
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@ -198,8 +201,12 @@ const struct txvu_operand txvu_operands[] =
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#define LUIMM12 (LUIMM24 + 1)
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{ 12, 0, 0, 0, insert_luimm12, extract_luimm12, 0 },
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/* upper 6 bits of 12 bit unsigned immediate */
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#define LUIMM12UP6 (LUIMM12 + 1)
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{ 12, 0, 0, 0, insert_luimm12up6, extract_luimm12, 0 },
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/* 11 bit pc-relative signed immediate. */
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#define LPCREL11 (LUIMM12 + 1)
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#define LPCREL11 (LUIMM12UP6 + 1)
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{ 11, 0, TXVU_OPERAND_SIGNED + TXVU_OPERAND_RELATIVE_BRANCH, 0, 0, 0, 0 },
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/* Destination indicator, single letter only, with leading '.'. */
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@ -209,6 +216,10 @@ const struct txvu_operand txvu_operands[] =
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vector case. */
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parse_dotdest1, insert_dotdest, extract_dotdest, print_dotdest },
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/* Destination indicator, single letter only, no leading '.'. */
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#define LDEST1 (LDOTDEST1 + 1)
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{ 0, 0, 0, parse_dest1, 0, 0, print_dotdest },
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/* end of list place holder */
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{ 0 }
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};
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@ -429,59 +440,57 @@ struct txvu_opcode txvu_lower_opcodes[] = {
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{ "fceq", { SP, LVI01, C, LUIMM24 }, MLOP7 + MLB24, VLOP7 (0x10) },
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{ "fcget", { SP, LITREG }, MLOP7 + MDEST + MS + MLIMM11, VLOP7 (0x1c) },
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{ "fcor", { SP, LVI01, C, LUIMM24 }, MLOP7 + MLB24, VLOP7 (0x13) },
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{ "fcset", { SP, LVI01, C, LUIMM24 }, MLOP7 + MLB24, VLOP7 (0x11) },
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{ "fcset", { SP, LUIMM24 }, MLOP7 + MLB24, VLOP7 (0x11) },
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{ "fmand", { SP, LITREG, C, LISREG }, MLOP7 + MDEST + MLIMM11, VLOP7 (0x1a) },
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{ "fmeq", { SP, LITREG, C, LISREG }, MLOP7 + MDEST + MLIMM11, VLOP7 (0x18) },
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{ "fmor", { SP, LITREG, C, LISREG }, MLOP7 + MDEST + MLIMM11, VLOP7 (0x1b) },
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{ "fsand", { SP, LITREG, C, LUIMM12 }, MLOP7 + MLUIMM12UNUSED + MS, VLOP7 (0x16) },
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{ "fseq", { SP, LITREG, C, LUIMM12 }, MLOP7 + MLUIMM12UNUSED + MS, VLOP7 (0x14) },
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{ "fsor", { SP, LITREG, C, LUIMM12 }, MLOP7 + MLUIMM12UNUSED + MS, VLOP7 (0x17) },
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{ "fsset", { SP, LITREG, C, LUIMM12 }, MLOP7 + MLUIMM12UNUSED + MS, VLOP7 (0x15) },
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{ "fsset", { SP, LUIMM12UP6 }, MLOP7 + MLUIMM12UNUSED + V (~0, 6, 0) + MS + MT, VLOP7 (0x15) },
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{ "iadd", { SP, LIDREG, C, LISREG, C, LITREG }, MLOP7 + MDEST + MLOP6, VLOP7 (0x40) + VLOP6 (0x30) },
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{ "iaddi", { SP, LITREG, C, LISREG, C, LIMM5 }, MLOP7 + MDEST + MLOP6, VLOP7 (0x40) + VLOP6 (0x32) },
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{ "iaddiu", { SP, LITREG, C, LISREG, C, LUIMM15 }, MLOP7, VLOP7 (0x08) },
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{ "iand", { SP, LIDREG, C, LISREG, C, LITREG }, MLOP7 + MDEST + MLOP6, VLOP7 (0x40) + VLOP6 (0x34) },
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{ "ibeq", { SP, LITREG, C, LISREG, C, LPCREL11 }, MLOP7 + MDEST, VLOP7 (0x28) },
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{ "ibgez", { SP, LISREG, C, LPCREL11 }, MLOP7 + MDEST + MT, VLOP7 (0x2f) },
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{ "ibgtz", { SP, LISREG, C, LPCREL11 }, MLOP7 + MDEST + MT, VLOP7 (0x2d) },
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{ "iblez", { SP, LISREG, C, LPCREL11 }, MLOP7 + MDEST + MT, VLOP7 (0x2e) },
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{ "ibltz", { SP, LISREG, C, LPCREL11 }, MLOP7 + MDEST + MT, VLOP7 (0x2c) },
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{ "ibne", { SP, LITREG, C, LISREG, C, LPCREL11 }, MLOP7 + MDEST, VLOP7 (0x29) },
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/* FIXME: Need to not require commas around parens. */
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{ "ilw", { LDOTDEST1, SP, LITREG, C, LIMM11, '(', LISREG, ')' }, MLOP7, VLOP7 (0x04) },
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{ "ilwr", { LDOTDEST1, SP, LITREG, C, '(', LISREG, ')' }, MLOP7, VLOP7 (0x40) + VLIMM11 (0x3fe) },
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{ "ilw", { LDOTDEST1, SP, LITREG, C, LIMM11, '(', LISREG, ')', LDEST1 }, MLOP7, VLOP7 (0x04) },
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{ "ilwr", { LDOTDEST1, SP, LITREG, C, '(', LISREG, ')', LDEST1 }, MLOP7, VLOP7 (0x40) + VLIMM11 (0x3fe) },
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{ "ior", { SP, LIDREG, C, LISREG, C, LITREG }, MLOP7 + MDEST + MLOP6, VLOP7 (0x40) + VLOP6 (0x34) },
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{ "isub", { SP, LIDREG, C, LISREG, C, LITREG }, MLOP7 + MDEST + MLOP6, VLOP7 (0x40) + VLOP6 (0x31) },
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{ "isubiu", { SP, LITREG, C, LISREG, C, LUIMM15 }, MLOP7, VLOP7 (0x09) },
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{ "isw", { LDOTDEST1, SP, LITREG, C, LIMM11, '(', LISREG, ')' }, MLOP7, VLOP7 (0x05) },
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{ "iswr", { LDOTDEST1, SP, LITREG, C, '(', LISREG, ')' }, MLOP7, VLOP7 (0x40) + VLIMM11 (0x3ff) },
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{ "isw", { LDOTDEST1, SP, LITREG, C, LIMM11, '(', LISREG, ')', LDEST1 }, MLOP7, VLOP7 (0x05) },
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{ "iswr", { LDOTDEST1, SP, LITREG, C, '(', LISREG, ')', LDEST1 }, MLOP7, VLOP7 (0x40) + VLIMM11 (0x3ff) },
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{ "jalr", { SP, LITREG, C, LISREG }, MLOP7 + MDEST + MLIMM11, VLOP7 (0x25) },
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{ "jr", { SP, LISREG }, MLOP7 + MDEST + MT + MLIMM11, VLOP7 (0x24) },
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{ "lq", { DOTDEST, SP, VFTREG, C, LIMM11, '(', LISREG, ')' }, MLOP7, VLOP7 (0x00) },
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/* FIXME: No commas around -/+. */
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{ "lqd", { DOTDEST, SP, VFTREG, C, LIMM11, '(', '-', '-', LISREG, ')' }, MLOP7, VLOP7 (0x40) + VLIMM11 (0x37e) },
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{ "lqi", { DOTDEST, SP, VFTREG, C, LIMM11, '(', LISREG, '+', '+', ')' }, MLOP7, VLOP7 (0x40) + VLIMM11 (0x37c) },
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{ "lqd", { DOTDEST, SP, VFTREG, C, '(', '-', '-', LISREG, ')' }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x37e) },
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{ "lqi", { DOTDEST, SP, VFTREG, C, '(', LISREG, '+', '+', ')' }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x37c) },
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/* Only a single VF reg is allowed here. We can use VFTREG because LDOTDEST1
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handles verifying only a single choice of xyzw is present. */
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{ "mfir", { LDOTDEST1, SP, VFTREG, C, LISREG }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x3fc) },
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{ "mfp", { DOTDEST, SP, VFTREG, C, P }, MLOP7 + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x67c) },
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{ "move", { DOTDEST, SP, VFTREG, C, VFSREG }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x33c) },
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{ "mr32", { DOTDEST, SP, VFTREG, C, VFSREG }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x33d) },
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{ "mtir", { LDOTDEST1, SP, LITREG, C, LFSREG }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x3fd) },
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{ "mtir", { LDOTDEST1, SP, LITREG, C, VFSREG }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x3fd) },
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{ "rget", { DOTDEST, SP, VFTREG, C, R }, MLOP7 + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x43d) },
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{ "rinit", { SP, R, C, LFSFFSREG }, MLOP7 + VLFTF (~0) + MT + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x43e) },
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{ "rnext", { DOTDEST, SP, VFTREG, C, R }, MLOP7 + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x43c) },
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{ "rsqrt", { SP, Q, C, LFSFFSREG, C, LFTFFTREG }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x3be) },
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{ "rxor", { R, C, LFSFFSREG }, MLOP7 + VLFTF (~0) + MT + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x43f) },
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{ "rxor", { SP, R, C, LFSFFSREG }, MLOP7 + VLFTF (~0) + MT + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x43f) },
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{ "sq", { DOTDEST, SP, VFTREG, C, LIMM11, '(', LISREG, ')' }, MLOP7, VLOP7 (0x01) },
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/* FIXME: No commas around -/+. */
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{ "sqd", { DOTDEST, SP, VFTREG, C, LIMM11, '(', '-', '-', LISREG, ')' }, MLOP7, VLOP7 (0x40) + VLIMM11 (0x37f) },
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{ "sqi", { DOTDEST, SP, VFTREG, C, LIMM11, '(', LISREG, '+', '+', ')' }, MLOP7, VLOP7 (0x40) + VLIMM11 (0x37d) },
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{ "sqd", { DOTDEST, SP, VFTREG, C, '(', '-', '-', LISREG, ')' }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x37f) },
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{ "sqi", { DOTDEST, SP, VFTREG, C, '(', LISREG, '+', '+', ')' }, MLOP7 + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x37d) },
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{ "sqrt", { SP, Q, C, LFTFFTREG }, MLOP7 + VLFSF (~0) + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x3bd) },
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{ "waitp", { 0 }, 0xffffffff, VLOP7 (0x40) + VLIMM11 (0x7bf) },
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{ "waitq", { 0 }, 0xffffffff, VLOP7 (0x40) + VLIMM11 (0x3bf) },
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{ "xgkick", { LISREG }, MLOP7 + MDEST + MT + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x6fc) },
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{ "xitop", { LITREG }, MLOP7 + MDEST + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x6bd) },
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{ "xtop", { LITREG }, MLOP7 + MDEST + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x6bc) }
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{ "xgkick", { SP, LISREG }, MLOP7 + MDEST + MT + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x6fc) },
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{ "xitop", { SP, LITREG }, MLOP7 + MDEST + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x6bd) },
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{ "xtop", { SP, LITREG }, MLOP7 + MDEST + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x6bc) }
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};
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const int txvu_lower_opcodes_count = sizeof (txvu_lower_opcodes) / sizeof (txvu_lower_opcodes[0]);
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@ -590,12 +599,12 @@ txvu_lower_opcode_lookup_dis (insn)
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/* Value of DEST in use.
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Each of the registers must specify the same value as the opcode.
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??? Perhaps remove the duplication? */
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static int dest;
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static int mnemonic_dest;
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/* Value of BC to use.
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The register specified for the ftreg must match the broadcast register
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specified in the opcode. */
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static int bc;
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static int mnemonic_bc;
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/* Init fns.
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These are called before doing each of the respective activities. */
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@ -605,8 +614,8 @@ static int bc;
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void
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txvu_opcode_init_parse ()
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{
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dest = -1;
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bc = -1;
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mnemonic_dest = -1;
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mnemonic_bc = -1;
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}
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/* Called by the disassembler before printing an instruction. */
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@ -614,8 +623,8 @@ txvu_opcode_init_parse ()
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void
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txvu_opcode_init_print ()
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{
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dest = -1;
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bc = -1;
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mnemonic_dest = -1;
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mnemonic_bc = -1;
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}
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/* Multiple destination choice support.
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@ -694,14 +703,14 @@ parse_dotdest1 (pstr, errmsg)
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++*pstr;
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switch (**pstr)
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{
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case 'x' : case 'X' : dest |= TXVU_DEST_X; break;
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case 'y' : case 'Y' : dest |= TXVU_DEST_Y; break;
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case 'z' : case 'Z' : dest |= TXVU_DEST_Z; break;
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case 'w' : case 'W' : dest |= TXVU_DEST_W; break;
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case 'x' : case 'X' : dest = TXVU_DEST_X; break;
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case 'y' : case 'Y' : dest = TXVU_DEST_Y; break;
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case 'z' : case 'Z' : dest = TXVU_DEST_Z; break;
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case 'w' : case 'W' : dest = TXVU_DEST_W; break;
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default : *errmsg = "invalid `dest'"; return 0;
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}
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++*pstr;
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c == tolower (**pstr);
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c = tolower (**pstr);
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if (c == 'x' || c == 'y' || c == 'z' || c == 'w')
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{
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*errmsg = "only one of x,y,z,w can be specified";
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@ -717,6 +726,38 @@ parse_dotdest1 (pstr, errmsg)
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return dest;
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}
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/* Parse a `dest' spec with no leading '.', where only a single letter is
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allowed, but the encoding handles all four. The parsed value must match
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that recorded in `dest'. */
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static long
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parse_dest1 (pstr, errmsg)
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char **pstr;
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const char **errmsg;
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{
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char c;
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long dest;
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dest = _parse_dest (pstr);
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if (dest != TXVU_DEST_X
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&& dest != TXVU_DEST_Y
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&& dest != TXVU_DEST_Z
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&& dest != TXVU_DEST_W)
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{
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*errmsg = "expecting one of x,y,z,w";
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return 0;
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}
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if (dest != mnemonic_dest)
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{
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*errmsg = "`dest' suffix does not match instruction `dest'";
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return 0;
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}
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*errmsg = NULL;
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return dest;
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}
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static TXVU_INSN
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insert_dotdest (insn, operand, mods, value, errmsg)
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TXVU_INSN insn;
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@ -726,9 +767,7 @@ insert_dotdest (insn, operand, mods, value, errmsg)
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const char **errmsg;
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{
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/* Record the DEST value in use so the register parser can use it. */
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dest = value;
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if (errmsg)
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*errmsg = NULL;
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mnemonic_dest = value;
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return insn |= value << operand->shift;
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}
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@ -740,8 +779,8 @@ extract_dotdest (insn, operand, mods, pinvalid)
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int *pinvalid;
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{
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/* Record the DEST value in use so the register printer can use it. */
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dest = (insn >> operand->shift) & ((1 << operand->bits) - 1);
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return dest;
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mnemonic_dest = (insn >> operand->shift) & ((1 << operand->bits) - 1);
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return mnemonic_dest;
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}
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/* Utility to print a multiple dest spec. */
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@ -791,7 +830,7 @@ _parse_sdest (pstr, errmsg)
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default : *errmsg = "only one of x,y,z,w can be specified"; return 0;
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}
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++*pstr;
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c == tolower (**pstr);
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c = tolower (**pstr);
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if (c == 'x' || c == 'y' || c == 'z' || c == 'w')
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{
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*errmsg = "only one of x,y,z,w can be specified";
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@ -838,7 +877,7 @@ parse_bc (pstr, errmsg)
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if (*errmsg)
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return 0;
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/* Save value for later verification in register parsing. */
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bc = value;
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mnemonic_bc = value;
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return value;
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}
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@ -852,8 +891,8 @@ extract_bc (insn, operand, mods, pinvalid)
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int mods;
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int *pinvalid;
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{
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bc = insn & 3;
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return bc;
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mnemonic_bc = insn & 3;
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return mnemonic_bc;
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}
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static long
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@ -889,7 +928,7 @@ parse_vfreg (pstr, errmsg)
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*errmsg = "invalid `dest'";
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return 0;
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}
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if (reg_dest != dest)
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if (reg_dest != mnemonic_dest)
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{
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*errmsg = "register `dest' does not match instruction `dest'";
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return 0;
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@ -906,7 +945,7 @@ print_vfreg (info, insn, value)
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long value;
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "vf%02ld", value);
|
||||
_print_dest (info, insn, dest);
|
||||
_print_dest (info, insn, mnemonic_dest);
|
||||
}
|
||||
|
||||
/* FT register in broadcast case. */
|
||||
@ -941,7 +980,7 @@ parse_bcftreg (pstr, errmsg)
|
||||
reg_bc = _parse_sdest (&str, errmsg);
|
||||
if (*errmsg)
|
||||
return 0;
|
||||
if (reg_bc != bc)
|
||||
if (reg_bc != mnemonic_bc)
|
||||
{
|
||||
*errmsg = "register `bc' does not match instruction `bc'";
|
||||
return 0;
|
||||
@ -958,7 +997,7 @@ print_bcftreg (info, insn, value)
|
||||
long value;
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "vf%02ld", value);
|
||||
print_sdest (info, insn, bc);
|
||||
print_sdest (info, insn, mnemonic_bc);
|
||||
}
|
||||
|
||||
/* ACC handling. */
|
||||
@ -983,7 +1022,7 @@ parse_accdest (pstr, errmsg)
|
||||
*errmsg = "invalid `dest'";
|
||||
return 0;
|
||||
}
|
||||
if (acc_dest != dest)
|
||||
if (acc_dest != mnemonic_dest)
|
||||
{
|
||||
*errmsg = "acc `dest' does not match instruction `dest'";
|
||||
return 0;
|
||||
@ -1001,7 +1040,7 @@ print_accdest (info, insn, value)
|
||||
long value;
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "acc");
|
||||
_print_dest (info, insn, dest);
|
||||
_print_dest (info, insn, mnemonic_dest);
|
||||
}
|
||||
|
||||
/* XYZ operand handling.
|
||||
@ -1016,7 +1055,7 @@ insert_xyz (insn, operand, mods, value, errmsg)
|
||||
long value;
|
||||
const char **errmsg;
|
||||
{
|
||||
if (dest != (TXVU_DEST_X | TXVU_DEST_Y | TXVU_DEST_Z))
|
||||
if (mnemonic_dest != (TXVU_DEST_X | TXVU_DEST_Y | TXVU_DEST_Z))
|
||||
{
|
||||
*errmsg = "expecting `xyz' for `dest' value";
|
||||
return insn;
|
||||
@ -1109,7 +1148,6 @@ parse_freg (pstr, errmsg)
|
||||
char *str = *pstr;
|
||||
char *start;
|
||||
long reg;
|
||||
int reg_bc;
|
||||
|
||||
if (tolower (str[0]) != 'v'
|
||||
|| tolower (str[1]) != 'f')
|
||||
@ -1152,7 +1190,6 @@ parse_ireg (pstr, errmsg)
|
||||
char *str = *pstr;
|
||||
char *start;
|
||||
long reg;
|
||||
int reg_bc;
|
||||
|
||||
if (tolower (str[0]) != 'v'
|
||||
|| tolower (str[1]) != 'i')
|
||||
@ -1195,7 +1232,6 @@ parse_vi01 (pstr, errmsg)
|
||||
char *str = *pstr;
|
||||
char *start;
|
||||
long reg;
|
||||
int reg_bc;
|
||||
|
||||
if (tolower (str[0]) != 'v'
|
||||
|| tolower (str[1]) != 'i')
|
||||
@ -1250,6 +1286,19 @@ extract_luimm12 (insn, operand, mods, pinvalid)
|
||||
{
|
||||
return (((insn & MLUIMM12TOP) != 0) << 11) | VLIMM11 (insn);
|
||||
}
|
||||
|
||||
/* Lower instruction 12 bit unsigned immediate, upper 6 bits. */
|
||||
|
||||
static TXVU_INSN
|
||||
insert_luimm12up6 (insn, operand, mods, value, errmsg)
|
||||
TXVU_INSN insn;
|
||||
const struct txvu_operand *operand;
|
||||
int mods;
|
||||
long value;
|
||||
const char **errmsg;
|
||||
{
|
||||
return insn | VLUIMM12TOP ((value & (1 << 11)) != 0) | (value & 0x7c0);
|
||||
}
|
||||
|
||||
/* Lower instruction 15 bit unsigned immediate. */
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user